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W12 - CT173 - Integer Multiplication and Division

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0% found this document useful (0 votes)
11 views

W12 - CT173 - Integer Multiplication and Division

Uploaded by

phatb2203522
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Integer Multiplication

and Division

CT 173
Kiến trúc máy tính
Trường CNTT & TT - ĐHCT
Khoa Mạng máy tính & Truyền thông
Outline

❖ Unsigned Multiplication

❖ Signed Multiplication

❖ Unsigned Division

❖ Signed Division

❖ Multiplication and Division in MIPS


Unsigned Multiplication
❖ Paper and Pencil Example:
Multiplicand 11002 = 12
Multiplier × 11012 = 13
1100
Binary multiplication is easy
0000
0 × multiplicand = 0
1100
1 × multiplicand = multiplicand
1100
Product 100111002 = 156
❖ m-bit multiplicand × n-bit multiplier = (m+n)-bit product
❖ Accomplished via shifting and addition
Version 1 of Multiplication Hardware
❖ Initialize Product = 0 Start

❖ Multiplicand is zero extended


=1 =0
Multiplier[0]?
shift left
Multiplicand
1a. Product = Product + Multiplicand
64 bits

add
64-bit ALU 2. Shift the Multiplicand Left 1 bit

64 bits
write 3. Shift the Multiplier Right 1 bit
Product Control
64 bits
No
32nd Repetition?
shift right

Multiplier Yes
32 bits Multiplier[0] Done
Multiplication Example (Version 1)
❖ Consider: 11002 × 11012 , Product = 100111002
❖ 4-bit multiplicand and multiplier are used in this example
❖ Multiplicand is zero extended because it is unsigned
Iteration Multiplicand Multiplier Product
0 Initialize 00001100 1101 00000000
Multiplier[0] = 1 => ADD + 00001100
1
SLL Multiplicand and SRL Multiplier 00011000 0110
Multiplier[0] = 0 => Do Nothing 00001100
2
SLL Multiplicand and SRL Multiplier 00110000 0011
Multiplier[0] = 1 => ADD + 00111100
3
SLL Multiplicand and SRL Multiplier 01100000 0001
Multiplier[0] = 1 => ADD + 10011100
4
SLL Multiplicand and SRL Multiplier 11000000 0000
Observation on Version 1 of Multiply
❖ Hardware in version 1 can be optimized
❖ Rather than shifting the multiplicand to the left
Instead, shift the product to the right
Has the same net effect and produces the same results
❖ Reduce Hardware
 Multiplicand register can be reduced to 32 bits only
 We can also reduce the adder size to 32 bits

❖ One cycle per iteration


 Shifting and addition can be done simultaneously
Version 2 of Multiplication Hardware
❖ Product = HI and LO registers, HI=0
❖ Product is shifted right Start

❖ Reduced 32-bit Multiplicand & Adder


=1 =0
Multiplicand Multiplier[0]?
32 bits 32 bits

HI = HI + Multiplicand
add
32-bit ALU
33 bits
Shift Product = (HI,LO) Right 1 bit
32 bits shift right
carry Shift Multiplier Right 1 bit
HI LO Control
write
64 bits No
shift right 32nd Repetition?
Multiplier Yes
Multiplier[0] Done
32 bits
Refined Version of Multiply Hardware
❖ Eliminate Multiplier Register Start

❖ Initialize LO = Multiplier, HI=0 LO=Multiplier, HI=0

❖ Product = HI and LO registers


=1 =0
LO[0]?

Multiplicand
32 bits 32 bits HI = HI + Multiplicand

add
32-bit ALU Shift Product = (HI,LO) Right 1 bit
33 bits

32 bits shift right No


carry 32nd Repetition?
HI LO Control Yes
write
64 bits
Done
LO[0]
Multiply Example (Refined Version)
❖ Consider: 11002 × 11012 , Product = 100111002
❖ 4-bit multiplicand and multiplier are used in this example
❖ 4-bit adder produces a 5-bit sum (with carry)
Iteration Multiplicand Carry Product = HI, LO
0 Initialize (LO = Multiplier, HI=0) 1100 0000 1101
LO[0] = 1 => ADD + 0 1100 1101
1
Shift Right Product = (HI, LO) 1100 0110 0110
LO[0] = 0 => Do Nothing
2
Shift Right Product = (HI, LO) 1100 0011 0011
LO[0] = 1 => ADD + 0 1111 0011
3
Shift Right Product = (HI, LO) 1100 0111 1001
LO[0] = 1 => ADD + 1 0011 1001
4
Shift Right Product = (HI, LO) 1100 1001 1100
Next . . .

❖ Unsigned Multiplication

❖ Signed Multiplication

❖ Unsigned Division

❖ Signed Division

❖ Multiplication and Division in MIPS


Signed Multiplication
❖ So far, we have dealt with unsigned integer multiplication
❖ Version 1 of Signed Multiplication
 Convert multiplier and multiplicand into positive numbers
▪ If negative then obtain the 2's complement and remember the sign
 Perform unsigned multiplication
 Compute the sign of the product
 If product sign < 0 then obtain the 2's complement of the product

❖ Refined Version:
 Use the refined version of the unsigned multiplication hardware
 When shifting right, extend the sign of the product
 If multiplier is negative, the last step should be a subtract
Signed Multiplication (Pencil & Paper)
❖ Case 1: Positive Multiplier
Multiplicand 11002 = -4
Multiplier × 01012 = +5

Sign-extension 11111100
111100
Product 111011002 = -20

❖ Case 2: Negative Multiplier


Multiplicand 11002 = -4
Multiplier × 11012 = -3
11111100
Sign-extension
111100
00100 (2's complement of 1100)
Product 000011002 = +12
Signed Multiplication Hardware
❖ Similar to Unsigned Multiplier Start

❖ ALU produces a 33-bit result LO=Multiplier, HI=0

 Multiplicand and HI are sign-extended


 Sign is the sign of the result =1 =0
LO[0]?

Multiplicand First 31 iterations: HI = HI + Multiplicand


32 bits 32 bits Last iteration: HI = HI – Multiplicand

add, sub
33-bit ALU Shift Right Product = (HI, LO) 1 bit
33 bits

32 bits shift right No


sign 32nd Repetition?
HI LO Control Yes
write
64 bits Done
LO[0]
Signed Multiplication Example
❖ Consider: 11002 (-4) × 11012 (-3), Product = 000011002
❖ Multiplicand and HI are sign-extended before addition
❖ Last iteration: add 2's complement of Multiplicand
Iteration Multiplicand Sign Product = HI, LO
0 Initialize (LO = Multiplier) 1100 0000 1101
LO[0] = 1 => ADD + 1 1100 1101
1
Shift Product = (HI, LO) right 1 bit 1100 1110 0110
LO[0] = 0 => Do Nothing
2
Shift Product = (HI, LO) right 1 bit 1100 1111 0011
LO[0] = 1 => ADD + 1 1011 0011
3
Shift Product = (HI, LO) right 1 bit 1100 1101 1001
LO[0] = 1 => SUB (ADD 2's compl) 0100 + 0 0001 1001
4
Shift Product = (HI, LO) right 1 bit 0000 1100
Next . . .

❖ Unsigned Multiplication

❖ Signed Multiplication

❖ Unsigned Division

❖ Signed Division

❖ Multiplication and Division in MIPS


Unsigned Division (Paper & Pencil)
= 19 1 00112 Quotient
Divisor 10112 110110012 = 217 Dividend
-1011
10 Try to see how big a
101 number can be
subtracted, creating a
1010 digit of the quotient on
10100 each attempt
Dividend = -1011
Quotient × Divisor 1001 Binary division is
accomplished via
+ Remainder 10011
shifting and subtraction
217 = 19 × 11 + 8 -1011
10002 = 8 Remainder
First Division Algorithm & Hardware
❖ Initialize: Start
 Remainder = Dividend (0-extended)
 Load Upper 32 bits of Divisor 1. Shift the Divisor Right 1 bit
 Quotient = 0 Shift the Quotient Left 1 bit
Difference = Remainder – Divisor
shift right

Divisor ≥0 <0
Difference?
64 bits

sub
64-bit ALU 2. Remainder = Difference
sign Set least significant bit of Quotient
Difference
write
Remainder Control
64 bits No
32nd Repetition?
shift left Yes
Quotient Done
32 bits set lsb
Division Example (Version 1)
❖ Consider: 11102 / 00112 (4-bit dividend & divisor)
❖ Quotient = 01002 and Remainder = 00102
❖ 8-bit registers for Remainder and Divisor (8-bit ALU)
Iteration Remainder Divisor Difference Quotient
0 Initialize 00001110 00110000 0000
1: SRL, SLL, Difference 00001110 00011000 11110110 0000
1
2: Diff < 0 => Do Nothing
1: SRL, SLL, Difference 00001110 00001100 00000010 0000
2
2: Rem = Diff, set lsb Quotient 00000010 0001
1: SRL, SLL, Difference 00000010 00000110 11111100 0010
3
2: Diff < 0 => Do Nothing
1: SRL, SLL, Difference 00000010 00000011 11111111 0100
4
2: Diff < 0 => Do Nothing
Observations on Version 1 of Divide
❖ Version 1 of Division hardware can be optimized
❖ Instead of shifting divisor right,
Shift the remainder register left
Has the same net effect and produces the same results
❖ Reduce Hardware:
 Divisor register can be reduced to 32 bits (instead of 64 bits)
 ALU can be reduced to 32 bits (instead of 64 bits)
 Remainder and Quotient registers can be combined
Refined Division Hardware
❖ Observation: Start

 Shifting remainder left does the


same as shifting the divisor right 1. Shift (Remainder, Quotient) Left
Difference = Remainder – Divisor
❖ Initialize:
 Quotient = Dividend, Remainder = 0 ≥0 <0
Difference?

Divisor
2. Remainder = Difference
32 bits Set least significant bit of Quotient
sub
32-bit ALU
sign No
Difference 32nd Repetition?
write Yes
Remainder Quotient Control
shift left Done
32 bits 32 bits
set lsb
Division Example (Refined Version)
❖ Same Example: 11102 / 00112 (4-bit dividend & divisor)
❖ Quotient = 01002 and Remainder = 00102
❖ 4-bit registers for Remainder and Divisor (4-bit ALU)
Iteration Remainder Quotient Divisor Difference
0 Initialize 0000 1110 0011
1: SLL, Difference 0001 1100 0011 1110
1
2: Diff < 0 => Do Nothing
1: SLL, Difference 0011 1000 0011 0000
2
2: Rem = Diff, set lsb Quotient 0000 1001
1: SLL, Difference 0001 0010 0011 1110
3
2: Diff < 0 => Do Nothing
1: SLL, Difference 0010 0100 0011 1111
4
2: Diff < 0 => Do Nothing
Next . . .

❖ Unsigned Multiplication

❖ Signed Multiplication

❖ Unsigned Division

❖ Signed Division

❖ Multiplication and Division in MIPS


Signed Division
❖ Simplest way is to remember the signs
❖ Convert the dividend and divisor to positive
 Obtain the 2's complement if they are negative

❖ Do the unsigned division


❖ Compute the signs of the quotient and remainder
 Quotient sign = Dividend sign XOR Divisor sign
 Remainder sign = Dividend sign

❖ Negate the quotient and remainder if their sign is negative


 Obtain the 2's complement to convert them to negative
Signed Division Examples
1. Positive Dividend and Positive Divisor
 Example: +17 / +3 Quotient = +5 Remainder = +2

2. Positive Dividend and Negative Divisor


 Example: +17 / –3 Quotient = –5 Remainder = +2

3. Negative Dividend and Positive Divisor


 Example: –17 / +3 Quotient = –5 Remainder = –2

4. Negative Dividend and Negative Divisor


 Example: –17 / –3 Quotient = +5 Remainder = –2

The following equation must always hold:


Dividend = Quotient × Divisor + Remainder
Next . . .

❖ Unsigned Multiplication

❖ Signed Multiplication

❖ Unsigned Division

❖ Signed Division

❖ Multiplication and Division in MIPS


Multiplication in MIPS
❖ Two Multiply instructions
 mult $s1,$s2 Signed multiplication
 multu $s1,$s2 Unsigned multiplication

❖ 32-bit multiplication produces a 64-bit Product $0


$1
❖ Separate pair of 32-bit registers ..

 HI = high-order 32-bit $31

 LO = low-order 32-bit Multiply

 Result of multiplication is always in HI & LO Divide

❖ Moving data from HI/LO to MIPS registers HI LO


 mfhi Rd (move from HI to Rd)
 mflo Rd (move from LO to Rd)
Division in MIPS
❖ Two Divide instructions
 div $s1,$s2 Signed division
 divu $s1,$s2 Unsigned division

❖ Division produces quotient and remainder $0


$1
❖ Separate pair of 32-bit registers ..

 HI = 32-bit remainder $31

 LO = 32-bit quotient Multiply

 If divisor is 0 then result is unpredictable Divide

❖ Moving data to HI/LO from MIPS registers HI LO


 mthi Rs (move to HI from Rs)
 mtlo Rs (move to LO from Rs)
Integer Multiply/Divide Instructions
Instruction Meaning Format
mult Rs, Rt Hi, Lo = Rs × Rt op6 = 0 Rs5 Rt5 0 0 0x18
multu Rs, Rt Hi, Lo = Rs × Rt op6 = 0 Rs5 Rt5 0 0 0x19
div Rs, Rt Hi, Lo = Rs / Rt op6 = 0 Rs5 Rt5 0 0 0x1a
divu Rs, Rt Hi, Lo = Rs / Rt op6 = 0 Rs5 Rt5 0 0 0x1b
mfhi Rd Rd = Hi op6 = 0 0 0 Rd5 0 0x10
mflo Rd Rd = Lo op6 = 0 0 0 Rd5 0 0x12
mthi Rs Hi = Rs op6 = 0 Rs5 0 0 0 0x11
mtlo Rs Lo = Rs op6 = 0 Rs5 0 0 0 0x13
❖ Signed arithmetic: mult, div (Rs and Rt are signed)
 LO = 32-bit low-order and HI = 32-bit high-order of multiplication
 LO = 32-bit quotient and HI = 32-bit remainder of division
❖ Unsigned arithmetic: multu, divu (Rs and Rt are unsigned)
❖ NO arithmetic exception can occur
Integer to String Conversion
❖ Objective: convert an unsigned 32-bit integer to a string
❖ How to obtain the decimal digits of the number?
 Divide the number by 10, Remainder = decimal digit (0 to 9)
 Convert decimal digit into its ASCII representation ('0' to '9')
 Repeat the division until the quotient becomes zero
 Digits are computed backwards from least to most significant

❖ Example: convert 2037 to a string


 Divide 2037/10 quotient = 203 remainder = 7 char = '7'
 Divide 203/10 quotient = 20 remainder = 3 char = '3'
 Divide 20/10 quotient = 2 remainder = 0 char = '0'
 Divide 2/10 quotient = 0 remainder = 2 char = '2'
Integer to String Procedure
#--------------------------------------------------------
# int2str: Converts an unsigned integer into a string
# Parameters: $a0 = integer to be converted
# $a1 = string pointer (can store 10 digits)
#--------------------------------------------------------
int2str:
move $t0, $a0 # $t0 = dividend = integer value
li $t1, 10 # $t1 = divisor = 10
addiu $a1, $a1, 10 # start at end of string
sb $zero, 0($a1) # store a NULL byte
convert:
divu $t0, $t1 # LO = quotient, HI = remainder
mflo $t0 # $t0 = quotient
mfhi $t2 # $t2 = remainder
ori $t2, $t2, 0x30 # convert digit to a character
addiu $a1, $a1, -1 # point to previous char
sb $t2, 0($a1) # store digit character
bnez $t0, convert # loop if quotient is not 0
jr $ra

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