PRINCE SHRI VENKATESHWARA PADMAVATHY

ENGINEERING COLLEGE
(An Autonomous Institution)
Mambakkam - Medavakkam Main Road,
Ponmar, Chennai- 600127

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

22EC593-ANALOG AND DIGITAL COMMUNICATION

(B.E ECE – V SEMESTER)

Regulation 2022

Academic Year: 2024-2025

Name of the Students:

Register Number:

Year/ Semester:
 PRINCE SHRI VENKATESHWARA
PADMAVATHY ENGINEERING
COLLEGE
(An Autonomous Institution)

BONAFIDE CERTIFICATE

Name : ………………………………………………
Register No : ………………………………………………
Semester : ………………………………………………
Branch : ………………………………………………

Certified that this is a Bonafide Record of the work done by the above studentin the
22EC593 Analog And Digital Communication laboratory during the year 2024 - 2025.

Signature of Faculty In-Charge Signature of Principal/Dean

Submitted for Practical Examination held on ………………..

Internal Examiner External Examiner

VISION OF THE INSTITUTE

Be a prominent institution for technical education and research to meet the global
challenges and demand for societal needs.
MISSION OF THE INSTITUTE
 To develop the needed resources and infrastructure, and to establish
a conductive ambience for the teaching- learning process.
 To nurture in the students, professional and ethical values, and to instill
in them a spirit of innovation and entrepreneurship.
 To encourage in the students a desire for higher learning and research,
to equip them to face the global challenges.
 To provide opportunities for students to get the needed additional skills
to make them industry ready.
 To interact with industries and other organizations to facilitate transfer
of knowledge and know-how.

VISION OF THE DEPARTMENT

To become a Centre of excellence in the field of electronics and

communications to produce a resourceful self-confident engineer to meet the
global challenges and societal needs.

MISSION OF THE DEPARTMENT

M1. To imbue technical education through effective teaching learning process
and state-of-art infrastructure.
M2. To foster the culture of innovation, research to impart comprehensive and
multi- disciplinary projects to cater the global challenges.
M3. To imbibe professional ethics, leadership skills, social, cultural and environmental
awareness with passion for life- long learning.
PROGRAM OUTCOMES (POs)

1. Engineering knowledge: Apply the knowledge of mathematics,

science, engineering fundamentals, and an engineering specialization to the
solution of complex engineering problems.

2. Problem analysis: Identify, formulate, review research literature, and

analyze complex engineering problems reaching substantiated conclusions using
first principles of mathematics, naturalsciences, and engineering sciences.

3. Design/development of solutions: Design solutions for complex

engineering problems and design system components or processes that meet the
specified needs with appropriate consideration for the public health and safety,
and the cultural, societal, and environmental considerations.

4. Conduct investigations of complex problems: Use research-based

knowledge and research methods including design of experiments, analysis and
interpretation of data, and synthesis of the information to provide valid
conclusions.

5. Modern tool usage: Create, select, and apply appropriate techniques,

resources, and modern engineering and IT tools including prediction and modeling
to complex engineering activities with an understanding of the limitations.

6. The engineer and society: Apply reasoning informed by the contextual

knowledge to assess societal, health, safety, legal and cultural issues and the
consequent responsibilities relevant to the professional engineering practice.
7. Environment and sustainability: Understand the impact of the
professional engineering solutions in societal and environmental contexts, and
demonstrate the knowledge of, and need for sustainable development.

8. Ethics: Apply ethical principles and commit to professional ethics and

responsibilities and norms of the engineering practice.

9. Individual and team work: Function effectively as an individual, and as

a member or leader in diverse teams, and in multidisciplinary settings.

10. Communication: Communicate effectively on complex engineering

activities with the engineering community and with society at large, such as, being
able to comprehend and write effective reports and design documentation, make
effective presentations, and give and receive clear instructions.

11. Project management and finance: Demonstrate knowledge and

understanding of the engineering and management principles and apply these to
one’s own work, as a member and leader in a team, to manage projects and in
multidisciplinary environments.

12. Life-long learning: Recognize the need for, and have the preparation and
ability to engage in independent and life-long learning in the broadest context of
technological change.
PROGRAM EDUCATIONAL OBJECTIVES (PEOs)

PEO 1: Graduates will design, test and implement interdisciplinary and

innovative systems in their profession through global education standards.
PEO 2: Graduates will inculcate effective communication skills, team work,
professional ethics and preparing for leadership in a rapidly changing world.
PEO 3: Graduates will apply latest technologies of electronics and
communication engineering for thecurrent professional issues and come out with
innovative solutions for the betterment of the nation andsociety.

PROGRAM SPECIFIC OUTCOMES (PSOs)

PSO 1 To design and develop systems for real time problems in the areas
related to electronics andcommunication engineering using latest Communication
Systems, Embedded Systems and VLSI.
PSO 2 To develop innovative eco-friendly solutions and products in the field
of electronics and communication engineering using cutting-edge hardware and
software tools along with analytical skills.
 INSTRUCTIONS TO STUDENTS

 Before entering the lab the student should carry the following
things (MANDATORY)
1. Identity card issued by the college.
2. Class notes
3. Lab observation book
4. Lab Manual
5. Lab Record
 Student must sign in and sign out in the register provided when attending the
lab session without fail.
 Come to the laboratory in time. Students, who are late more than 15 min., will
not be allowed to attend the lab.
 Students need to maintain 100% attendance in lab if not a strict action will
be taken.
 All students must follow a Dress Code while in the laboratory
 Foods, drinks are NOT allowed.
 All bags must be left at the indicated place.
 Refer to the lab staff if you need any help in using the lab.
 Respect the laboratory and its other users.
 Workspace must be kept clean and tidy after experiment is completed.
 Read the Manual carefully before coming to the laboratory and be sure about
what you are supposed to do.
 Do the experiments as per the instructions given in the manual.
 Copy all the programs to observation which are taught in class before attending
the lab session.
 Students are not supposed to use floppy disks, pen drives without permission
of lab- in charge.
 Lab records need to be submitted on or before the date of submission.
 Syllabus

LIST OF EXPERIMENTS:

1. AM Modulation and Demodulation

2. DSBSC Generation & Detection
3. SSB Generation & Detection
4. VSB Generation & Detection
5. FM modulation and Demodulation
6. Pulse Amplitude Modulation
7. Pulse Position Modulation
8. Pulse Width Modulation
9. Sampling and Reconstruction
10. Time Division Multiplexing
11. Pulse Code Modulation and Demodulation
12. Delta Modulation and Demodulation
13. Simulation of ASK, FSK, BPSK-Generation and Detection
14. Simulation of QPSK Generation and Detection
15. Simulation of QAM Modulation and Demodulation
16. Simulation of DPSK Generation and Detection
17. Simulation of Convolution codes
18. Simulation of Linear Block codes
19. Simulation of Cyclic codes
20. Communication link simulation

COURSE OUTCOMES:

Upon completion of this course, student will be able to

COs Course Outcomes

CO1 To Summarise the basic concepts of amplitude modulation
CO2 To explain the concepts of phase and frequency modulation
CO3 To apply the concepts of pulse modulation techniques
CO4 To understand the concepts of digital modulation techniques.
CO5 To analyze and evaluate the different coding schemes of noise theory
 COURSE OUTCOMES:
Upon completion of this course, student will be able to

Cos Course Outcomes Experiments List

CO1 To Summarise the basic concepts of amplitude modulation 1,2,3,4
CO2 To explain the concepts of phase and frequency modulation 5,6
CO3 To apply the concepts of pulse modulation techniques 7,8
CO4 To understand the concepts of digital modulation techniques. 9,10,11,12,13,14,15,16
CO5 To analyze and evaluate the different coding schemes 17,18,19,20
of noise theory

Mapping of Course Outcomes with the POs and PSOs

CO PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2
/PO
CO1
3 3 1 1 1 - - 1 - 1 - 1 2 2
CO2
3 2 1 1 1 - - 1 - 1 - 1 1 2
CO3 3 2 2 1 1 1 1 2 2
1 - - - -
CO4
3 3 1 1 2 - - 1 - 1 - 1 2 2
CO5
3 2 2 1 2 - - 1 - 1 - 1 2 2
1-Low, 2-Meium, 3-High, ’-‘No correlation
 RELEVANCE OF COURSE OUTCOMES , PO AND PSOs
Exp. Relevance of
Title of Experiments Relevance of PO/PSOs
No. Cos
1 AM Modulation and Demodulation CO1 PO1,2,3,4,5,8,10,12, Pso1,2
2 Generation & Detection of DSBSC CO1 PO1,2,3,4,5,8,10,12, Pso1,2
3 Generation & Detection of SSB CO1 PO1,2,3,4,5,8,10,12, Pso1,2
4 Generation & Detection of VSB CO1 PO1,2,3,4,5,8,10,12, Pso1,2
5 FM modulation and Demodulation CO2 PO1,2,3,4,5,8,10,12, Pso1,2
6 Pulse Amplitude Modulation CO2 PO1,2,3,4,5,8,10,12, Pso1,2
7 Pulse Position Modulation CO3 PO1,2,3,4,5,8,10,12, Pso1,2
8 Pulse Width Modulation CO3 PO1,2,3,4,5,8,10,12, Pso1,2
9 Sampling and Reconstruction CO4 PO1,2,3,4,5,8,10,12, Pso1,2
10 Time Division Multiplexing CO4 PO1,2,3,4,5,8,10,12, Pso1,2
11 Pulse Code Modulation and Demodulation CO4 PO1,2,3,4,5,8,10,12, Pso1,2
12. Delta Modulation and Demodulation CO4 PO1,2,3,4,5,8,10,12, Pso1,2
13. Simulation of ASK, FSK, BPSK-Generation and CO4 PO1,2,3,4,5,8,10,12, Pso1,2
Detection
14. Simulation of QPSK Generation and Detection CO4 PO1,2,3,4,5,8,10,12, Pso1,2
15. Simulation of QAM Modulation and Demodulation CO4 PO1,2,3,4,5,8,10,12, Pso1,2
16. Simulation of DPSK Generation and Detection CO4 PO1,2,3,4,5,8,10,12, Pso1,2
17. Simulation of Convolution codes CO5 PO1,2,3,4,5,8,10,12, Pso1,2
18. Simulation of Linear Block codes CO5 PO1,2,3,4,5,8,10,12, Pso1,2
19. Simulation of Cyclic codes CO5 PO1,2,3,4,5,8,10,12, Pso1,2
20. Communication link simulation CO5 PO1,2,3,4,5,8,10,12, Pso1,2
Additional Experiments
21. Generation of QPSK signal using kit CO5 PO1,2,3,4,5,8,10,12, Pso1,2
22. Study of DPSK modulation technique using kit CO5 PO1,2,3,4,5,8,10,12, Pso1,2
Open Based or Design Based Experiments
23. Implementation of Line coding techniques using kit CO3 PO1,2,3,4,5,8,10,12, Pso1,2
 Table of Contents
Exp. No. Page
Title of Experiments Marks Signature
Date No.
1 AM Modulation and Demodulation
2 Generation & Detection of DSBSC
3 Generation & Detection of SSB
4 Generation & Detection of VSB
5 FM modulation and Demodulation
6 Pulse Amplitude Modulation
7 Pulse Position Modulation
8 Pulse Width Modulation
9 Sampling and Reconstruction
10 Time Division Multiplexing
11 Pulse Code Modulation and Demodulation
12. Delta Modulation and Demodulation
13. Simulation of ASK, FSK, BPSK-Generation
and Detection
14. Simulation of QPSK Generation and
Detection
Simulation of QAM Modulation and
15.
Demodulation
Simulation of DPSK Generation and
16.
Detection
17. Simulation of Convolution codes

18. Simulation of Linear Block codes

19. Simulation of Cyclic codes
20. Communication link simulation

Additional Experiments
21. Generation of QPSK signal using kit
22. Study of DPSK modulation technique
using kit

Open Based or Design Based Experiments

23. Implementation of Line coding techniques

using kit

PSVPEC/ECE/22EC593/ ADC
LAB
 EXP NO: DATE: AMPLITUDE MODULATION AND DEMODULATION

AIM:

APPARATUS REQUIRED:

Sl. List of components Type Range Quantity

No.

- -
1 AM trainer kit 1
- -
2 Power cable As Required
- -
3 Patch cords As Required
-
4 CRO 20 MHZ 1

THEORY

MODULATIO

The main problem is that a high frequency carrier wave is used to carry the audio
signal and that we need to know how the audio signal should be “added” to the carrier wave. The
solution lies in changing some characteristic of carrier wave in accordance with the signal.
Under such conditions, the audio signal will be contained in the resultant wave. This process is
called modulation. This modulation is of three types namely amplitude modulation, frequency
modulation, phase modulation. Here, we shall be discussing about amplitude modulation only.

DEMODULATION
In demodulation process, the modulated signal is to be passed through an demodulater to
get the original audio signal. The demodulator used may be an envelope detector. The envelope
detector will demodulate the modulator signal and therefore reproduce the original message
signal.
PSVPEC/ECE/22EC593/ ADC
LAB
AM TRANSMITTER (MODULATOR)

PSVPEC/ECE/22EC593/ ADC
LAB
 PROCEDURE:

1. A Modulating signal input is given to the amplitude modulator from the on-board

sine wave generator.

2. Modulating signal input to the amplitude modulator can also be given from an

external function generator or an audio frequency oscillator.

3. If an external signal source with every low voltage level(below 100 Mv) is used then

this signal can be amplified using the audio amplifier before connecting to the input of the

amplitude modulator.

4. . The amplitude and the time duration of the carrier signal are observed and noted

down from the output of the amplitude modulator by keeping the amplitude knob of

the sine wave generator at zero position.

5. Now increase the amplitude of the modulating signal to the required level.

6. The amplitude and time duration of the modulating signal are observed using a CRO

and tabulated.

7. Finally the amplitude modulated output is observed from the output of the amplitude

modulator stage and the amplitude and time duration of the AM wave are noted down.

8. Patch the modulated signal to the telescopic whip antenna in receiver.

9. The receiver circuit wiring is also done as shown in the wiring diagram.

10. The carrier frequency knob in the transmitter side is kept at a middle position.

11. The frequency tuning knob in the receiver is tuned slowly from one end to the other till

the point where the demodulated signal is obtained with minimum distortion & noise.

12. Now the amplitude and time duration of the received signal are noted down.

13. From the tabulated values the modulating signal, carrier signal, AM signal, &

demodulated message signal are plotted neatly.

14. The depth of modulation is also calculated.

PSVPEC/ECE/22EC593/ ADC
LAB
MODEL GRAPH

PSVPEC/ECE/22EC593/ ADC
LAB
 GENERATION OF AMPLITUDE MODULATION
& DEMODULATION USING MATLAB

PROGRAM:
clc;
clear all;
close
all;
Ac=input('enter the carrier signal amplitude');
Am= input('enter the message signal amplitude');
fc= input('enter the carrier frequency');
fm=input('enter the message frequency');
m=input('enter modulation index');
t=input('enter the timeperiod');
Ac=input('enter carrier signal amplitude');
Am=input('enter message signal amplitude');
fc=input('enter carrier frequency');
fm=input('enter message frequency');%
fm<fc m=input('enter modulation index');
t=input('enter time period');
t1=linspace(0,t,1000);
y1=sin(2*pi*fm*t1); % message
signal y2=sin(2*pi*fc*t1); % carrier
signal eq=(1+m.*y1).*(Ac.*y2);
subplot(3,1,1);
plot(t1,y1);
xlabel('Time');
ylabel('Amplitude');
title('Message
signal')
subplot(3,1,2);
plot(t1,y2);
xlabel('Time');
ylabel('Amplitude');
title('Carrier
signal');
subplot(3,1,3);
plot(t1,eq);
plot(t1,eq,'r')
;
xlabel('Time');
ylabel('Amplitude');
PSVPEC/ECE/22EC593/ ADC
LAB
title('Modulated
signal');

PSVPEC/ECE/22EC593/ ADC
LAB
VIVA QUESTIONS:

AIM & PROGRAM OUTPUT & VIVA TOTAL PO’S & TIMELY GRAND
PROCEDURE & EXECUTION RESULT VOICE (30) PSO SUBMISSION TOTAL
(5) (10) (10) (5) LEARNT (10) (40)

RESULT:

PSVPEC/ECE/22EC593/ ADC
LAB
OUTPUT:

COMMAND WINDOW:

enter carrier signal amplitude :1

enter message signal amplitude
:1 enter carrier frequency :500
enter message frequency
:20 enter modulation
index :1 enter time period
:1/8

WAVEFORM:

PSVPEC/ECE/22EC593/ ADC
LAB
EXP.NO:
DATE: GENERATION & DETECTION OF DSBSC SIGNAL

AIM:

SOFTWARE

REQUIRED:

PROCEDURE:

PROGRAM:
clc;
clear all;
close
all;
Ac=input('enter carrier signal amplitude');
Am=input('enter message signal
amplitude'); fc=input('enter carrier
frequency'); fm=input('enter message
frequency'); t=0:0.000001:0.001;
m1=Am*sin(2*pi*fm*t);
subplot(4,1,1);
plot(t,m1);
xlabel('Time');
ylabel('Amplitude');
title('Message signal');
c1=Ac*sin(2*pi*fc*t)
; subplot(4,1,2);
plot(t,c1);
xlabel('Time');
ylabel('Amplitude');
title('Carrier
signal'); s1=m1.*c1;
PSVPEC/ECE/22EC593/ ADC
LAB
subplot(4,1,3);
hold on;
plot(t,s1);
plot(t,m1,'r:')
;

PSVPEC/ECE/22EC593/ ADC
LAB
plot(t,-
m1,'r:'); hold
off;
xlabel('Time')
;
ylabel('Amplitude');
title('DSB-SC
signal'); r=s1.*c1;
[b,a]=butter(1,0.01);
mr=filter(b,a,r);
subplot(4,1,4);
plot(t,mr);

VIVA QUESTIONS

AIM & PROGRAM & OUTPUT & VIVA TOTAL PO’S & TIMELY GRAND
PROCEDURE EXECUTION RESULT VOICE (30) PSO’S SUBMISSION TOTAL
(5) (10) (10) (5) LEARNT (10) (40)

RESULT:

PSVPEC/ECE/22EC593/ ADC
LAB
OUTPUT:

COMMAND WINDOW:

enter carrier signal amplitude 1

enter message signal amplitude
1 enter carrier frequency 50000
enter message frequency 2000

PSVPEC/ECE/22EC593/ ADC
LAB
 EXP NO:3
DATE: GENERATION & DETECTION OF SSB

AIM:

SOFTWARE

REQUIRED:

PROCEDURE:

PROGRAM:
clc;
clear all;
close all
fs=8000
;
fm=20
;
fc=50;
Am=1;
Ac=1;
t=[0:0.1*fs]/fs;
subplot(3,2,1);
m1=Am*cos(2*pi*fm*t)
; plot(t,m1);
title('Message Signal');
m2=Am*sin(2*pi*fm*t);
subplot(3,2,2)
c1=Ac*cos(2*pi*fc*t);
plot(t,c1)
title('Carrier Signal');
c2=Ac*sin(2*pi*fc*t)
; subplot(3,2,3)
Susb=0.5*m1 .* c1-0.5*m2 .*
c2; plot(t,Susb);
title('SSB-SC Signal with
USB'); subplot(3,2,4);
Slsb=0.5*m1 .* c1+0.5*m2 .*
PSVPEC/ECE/22EC593/ ADC
LAB
c2; plot(t,Slsb);
title('SSB-SC Signal with
LSB'); r=Susb.*c1;
[b
a]=butter(1,0.00001);
mr=filter(b,a,r);

PSVPEC/ECE/22EC593/ ADC
LAB
 subplot(3,2,5);
plot(t,mr);
title('reconstructed
signal');

VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOAL PO’S & TIMELY GRAND
PROCEDURE & & VOICE (30) PSO’S SUBMISSION TOTAL
(5) EXECUTION RESULT (5) LEARNED (10) (40)
(10) (10)

RESULT

PSVPEC/ECE/22EC593/ ADC
LAB
OUTPUT:

PSVPEC/ECE/22EC593/ ADC
LAB
EXP NO:4
DATE: GENERATION & DETECTION OF VSB

AIM:

SOFTWARE

REQUIRED:

PROCEDURE:

PROGRAM:
clc;
clear all;
close
all; fm =
10;
fc = 100;
Am = 1;
Ac = 1;
fs = 1000;
t = 0:1/fs:1;
m=
Am*cos(2*pi*fm*t); c =
Ac*cos(2*pi*fc*t);
vsb = (m.*c) + 0.5*Am*Ac*sin(2*pi*(fc-
fm)*t); subplot(3,1,1);
plot(t,m);
xlabel('Time (s)');
ylabel('Amplitude');
title('message
signal');
subplot(3,1,2);
plot(t,c)
xlabel('Time (s)');
ylabel('Amplitude');
title('carrier

PSVPEC/ECE/22EC593/ ADC
LAB
signal');
subplot(3,1,3);
plot(t, vsb);
title('Vestigial Side Band (VSB) Signal');
xlabel ('Time (s)');
ylabel('Amplitude')

PSVPEC/ECE/22EC593/ ADC
LAB
VIVA QUESTIONS:

AIM & PROGRAM & OUTPUT VIVA TOTAL PO’S & TIMELY GRAND
PROCEDURE EXECUTION & VOICE (30) PSO’S SUBMISSION TOTAL
(5) (10) RESULLT (5) LEARNED (10) (40)
(10)

RESULT:

PSVPEC/ECE/22EC593/ ADC
LAB
OUTPUT:

PSVPEC/ECE/22EC593/ ADC
LAB
 EXP NO: 05 DATE: FREQUENCY MODULATION AND DEMODULATION

AIM:

APPARATUS REQUIRED:

List of
Sl. No. Type Range Quantity
components
- -
1 FM trainer 1
- -
2 Power As Per Required
- -
3 Patch cords As Per Required
-
4 CRO 20 MHZ 1

THEORY:
In radio transmission, it is necessary to send audio signal (eg. Music, speech etc) from a
broad casting station over great distances to a receiver. The audio signal cannot be sent directly over
the air for appreciable distance. Even if audio signal is converted into electrical signal, the latter
cannot be sent very far without employing large amount of power. The energy of a wave is directly
proportional to its frequency. At audio frequencies, (20Hz to 20KHz), the signal power is quite small
and radiation is not practicable. For it to be practicable, the frequency should be above 20KHz. If
audio signal is to be transmitted properly, some means must be devised which will permit
transmission to occur at high frequencies while it simultaneously allows the carrying of audio signal.
This is achieved by super imposing electrical audio signal on high frequency carrier. The resultant
waves are known as modulated waves or radio waves and the process is called “Modulation”. At the
radio receiver, the audio signal is extracted from the modulated wave by the process called
“Demodulation”.

PSVPEC/ECE/22EC593/ ADC
LAB
MODULATION
The main problem is that a high frequency carrier wave is used to carry the audio signal
and that we need to know how the audio signal should be “added” to the carrier wave. The solution
lies in changing some characteristic of carrier wave in accordance with the signal. Under such
conditions, the audio signal will be contained in the resultant wave. This process is called
modulation. This modulation is of three types namely amplitude modulation, frequency modulation,
phase modulation.

DEMODULATION
In demodulation process, the modulated signal is to be passed through an demodulater to
get the original audio signal. The demodulator used may be an envelope detector. The envelope
detector will demodulate the modulator signal and therefore reproduce the original message signal.

FM MODULATOR

PSVPEC/ECE/22EC593/ ADC
LAB
FM DEMODULATOR

PSVPEC/ECE/22EC593/ ADC
LAB
PROCEDURE

1. Connect the test point T1 and T7 of VCT - 12 using 2mm patch chord.

2. Switch ON the trainer.

3. Tune the amplitude control POT of Audio oscillator section to fully anticlock wise

direction (zero amplitude), now test point T7 is virtually connected to ground.

4. Connect the test point T8 to oscilloscope or spectrum analyser, set frequency

control POT at Frequency modulator section to minimum position (fully anticlockwise direction).

5. Turn Amplitude control POT P2 to fully clockwise Direction (Maximum amplitude).

Note down carrier frequency of VCO which is observed using oscilloscope (or) spectrum analyser

6. Slowly turn frequency control POT P1 towards clockwise direction and observe the

VCO‟s frequency which is increasing on spectrum analyser, set POT P1 to maximum position note

down carrier frequency of VCO which is observed in spectrum.

7. Set back carrier frequency to 100 MHz using P1 potentiometer. Display the test point

T1 on oscilloscope, increase amplitude control POT in Audio oscillator section and set sinusoidal

amplitude to 1Vpp, turn frequency control POT in Audio oscillator section and set frequency of

sinusoidal signal to 1KHz.

8. Display the frequency modulated waveform at test point T8 on spectrum analyser.

Reduce

the spectrum analyser band and observe the spectrum of FM signal.

9. Connect the test point T8 and T9 using 2 mm patch chord to transmit FM signal

through whip antenna.

10. Make the following settings and connections on (Refer connection diagram) (Fig) Set

RF Tunner to required frequency.

PSVPEC/ECE/22EC593/ ADC
LAB
TABULATION:

S.NO SIGNAL AMPLITUDE (V) TIME (ms) FREQUENCY (HZ)

1 Modulating Input

2 Carrier Input

3 FM Output

4 De mod output

MODEL GRAPH

PSVPEC/ECE/22EC593/ ADC
LAB
 GENERATION OF WIDEBAND AND NARROW BAND USING MATLAB

PROGRAM:
clc;
clear all;
close
all;
t = 0:0.001:1;
vm = input('Enter Amplitude (Message) =
'); vc = input('Enter Amplitude (Carrier) =
'); fM = input('Enter Message frequency =
');
fc = input('Enter Carrier frequency = ');
m = input('Enter Modulation Index =
'); msg = vm*sin(2*pi*fM*t);
subplot(2,2,1);
plot(t,msg);
xlabel('Time');
ylabel('Amplitude');
title('Message ');
carrier =
vc*sin(2*pi*fc*t);
subplot(2,2,2);
plot(t,carrier);
xlabel('Time');
ylabel('Amplitude');
title('Carrier Signal');
y=
vc*sin(2*pi*fc*t+m.*cos(2*pi*fM*t));
subplot(2,2,3);
plot(t,y);
xlabel('Time');
ylabel('Amplitude');
title('Wide band frequency modulator');
m1 = input('Enter Modulation Index =
');
y1 =
vc*sin(2*pi*fc*t+m1.*cos(2*pi*fM*t));
subplot(2,2,4);
plot(t,y1);
xlabel('Time');
ylabel('Amplitude');
title('narrow band frequency modulator');

PSVPEC/ECE/22EC593/ADC
VIVA QUESTIONS:

AIM & PROGRAM & OUTPUT VIVA TOTAL PO’S & TIMELY GRAND
PROCEDURE EXECUTION & VOICE (30) PSO’S SUBMISSION TOTAL
(5) (10) RESULLT (5) LEARNED (10) (40)
(10)

RESULT:

PSVPEC/ECE/22EC593/ADC
EXP NO:6
DATE: PULSE AMPLITUDE MODULATION

AIM:

SOFTWARE

REQUIRED:

PROCEDURE:

PROGRAM:
clc;
clear all;
close
all;
Ac=input('enter carrier signal amplitude=');
Am=input('enter message signal
amplitude='); fc=input('enter carrier
frequency='); fm=input('enter message
frequency='); m=input('enter modulation
index=');
t = 0:0.001:1;
m=
Am*sin(2*pi*fm*t);
subplot(3,1,1);
plot(t,m);
xlabel('Time');
ylabel('Amplitude');
title('Message signal');
c=Ac*square(2*pi*fc*t)+Ac;
subplot(3,1,2);
plot(t,c);
xlabel('Time');
ylabel('Amplitude');
title('Carrier
signal'); s=m.*c;
PSVPEC/ECE/22EC593/ADC
subplot(3,1,3);
plot(t,s);
xlabel('Time');
ylabel('Amplitude');
title('PM signal');

PSVPEC/ECE/22EC593/ADC
OUTPUT:

COMMAND WINDOW :

enter carrier signal

amplitude=0.5 enter message
signal amplitude=5 enter carrier
frequency=100
enter message
frequency=8 enter
modulation index=10

PSVPEC/ECE/22EC593/ADC
 VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE & & VOICE (30) LEARNED SUBMISSION TOTAL
(5) EXECUTION RESULT (5) (10) (40)
(10) (10)

RESULT:

PSVPEC/ECE/22EC593/ADC
 EXP NO: 7 PULSE POSITION MODULATION
DATE:

AIM:

SOFTWARE REQUIRED:

PROCEDURE:

PROGRAM:
clc;
clear all;
close
all;
fm=input('enter message frequency fm
='); fc=input('enter carrier frequency fc
='); fs=input('enter sampling frequency
fs=');
t = 0:2/fs:(2/fm-1/fs);
m = 0.4*cos(2*pi*fm*t)
+0.5; Y =
modulate(m,fc,fs,'ppm');
subplot(3,1,1);
plot(t,m);
xlabel('Time');
ylabel('Amplitude');
title('Message
signal');
subplot(3,1,2);
plot(Y);
xlabel('Time');
ylabel('Amplitude');
title('PAM signal');
Z=
demod(Y,fc,fs,'ppm');
subplot(3,1,3);

PSVPEC/ECE/22EC593/ADC
plot(Z);
xlabel('Time');
ylabel('Amplitude');
title('demodulated signal');

PSVPEC/ECE/22EC593/ADC
OUTPUT:

COMMAND WINDOW:

enter message frequency fm =200

enter carrier frequency fc =1000
enter sampling frequency
fs=10000

PSVPEC/ECE/22EC593/ADC
 VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE & & VOICE (30) LEARNED SUBMISSION TOTAL
(5) EXECUTION RESULT (5) (10) (40)
(10) (10)

RESULT:

PSVPEC/ECE/22EC593/ADC
 EXP NO:8
DATE: PULSE WIDTH MODULATION

AIM:

SOFTWARE

REQUIRED:

PROCEDURE:

PROGRAM:
clc;
clear all;
close
all;
fs=input('comparator sawtooth
frequency:'); fm=input('message
frequency(sine wave):'); am=input('enter
amplitude of message:'); t=0:0.0001:1;
stooth=2*am.*sawtooth(2*pi*fs*t);
subplot(3,1,1);
plot(t,stooth);
title('comparator wave');
msg=am.*sin(2*pi*fm*t);
subplot(3,1,2);
plot(t,msg);
title('message
signal'); for
i=1:length(stooth)
if(msg(i)>=stooth(i)
) pwm(i)=1;
else
pwm(i)=0
; end
end
subplot(3,1,3)
;
plot(t,pwm,'r');
title('pwm');
axis([0 1 0 1.1])

PSVPEC/ECE/22EC593/ADC
OUTPUT:

COMMAND WINDOW:

comparator sawtooth
frequency:10 message
frequency(sine wave):1 enter
amplitude of message:5

PSVPEC/ECE/22EC593/ADC
VIVA QUESTIONS :

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE & & VOICE (30) LEARNED SUBMISSION TOTAL
(5) EXECUTION RESULT (5) (10) (40)
(10) (10)

RESULT:

PSVPEC/ECE/22EC593/ADC
 EXP NO: 09 DATE:
SIGNAL SAMPLING AND RECONSTRUCTION

AIM:
.

APPARATUS REQUIRED:

Sl. No. List of components Type Range Quantity

1 Communication trainer kit - - 1

2 Power cable - - As per required
3 Patch cords - - As per required
4 CRO - 20 MHZ 1

THEORY OF SAMPLING

In analog communication systems like AM, FM, the instantaneous value of the information
signal is used to change certain parameter of the carrier signal.Pulse modulation systems differ
from these systems in a way that transmit a limited no.of discrete states of a signal at
predetermined time sampling can be defined as measuring the value of an information signal at
predetermined time intervals. The rate at which the signal is sampled is known as the sampling
rate or sampling frequency.

It is the major parameter which decides the quality of the reproduced signal. If the signal is
sampled quite frequently (whose limit is specified by Nyquist Criterian), then it can be
reproduced exactly at the receiver with no distortion.

NEEDS OF SAMPLING PROCESS

It however the message signal happens to be converted into digital form before it can be
transmitted by digital means. The sampling process is the first process performed in analog to
digital conversion. Two other process, quantizing and encoding are also involved in this
conversion.

NYQUIST CRITERION (SAMPLING THEOREM)

The Nyquist Criterion states that a continuous signal band limited to Fm Hz can be completely
represented by and reconstructed from the sample taken at a rate greater than or equal to
2Fm
PSVPEC/ECE/22EC593/ADC
 samples/second. This minimum sampling frequency is called as nyquist rate i.e. for faithful
reproduction of information signal Fs ≥ 2 Fm.

ALIASING

If the signal is sampled at a rate lower than stated by Nyquist criterion, then there is an overlap
between the information signal and the sidebands of the harmonics. Thus the higher and the lower
frequency components get mixed and causes unwanted signals to appear at the demodulator output.
This phenomenon is turned as Aliasing or Fold over Distortion.To avoid aliasing using anti aliasing
filter or the signal must satisfied the nyquist criterion (Fs ≥ 2 Fm )

LOW PASS FILTERS

The PAM system the message is recovered by a low pass filter. The type of filter used is very
important, as the signal above the cut-off frequency would affect the recovered signal if they are not
attenuated sufficiently.

IMPLEMENTATION OF

SAMPLING CONNECTION

DIAGRAM

NATURAL SAMPLING

PSVPEC/ECE/22EC593/ADC
 SAMPLE AND HOLD

FLAT – TOP SAMPLING

PSVPEC/ECE/22EC593/ADC
 PROCEDURE

1. Connection are given as per the given block diagram.

2. To give an modulating input and sampled input (square wave form) to the input block.
3. To verify the output using CRO.
4. The output as given to the input of de modulated block and taken the output reading
5. Plot the graph

TABULATION:

S.NO SIGNAL AMPLITUDE (V) TIME (ms) FREQUENCY (HZ)

1 Modulating Input

2 Sampling Input

3 Sampled Output

4 Flat top output

MODEL GRAPH

PSVPEC/ECE/22EC593/ADC
PROGRAM:
clc;
clear all;
close
all;
f=50;
t=0:1/100/f:1/f;
x=sin(2*pi*f*t)
; subplot(311);
plot(t,x);
title('analog signal
x(t)') xlabel('t');
ylabel('x(t)')
; n=50;
xs=sin(2*pi*(0:n)/n);
subplot(312);
stem((0:n),xs);
title('sampled signal
x[n]') xlabel('n');
ylabel('x[n]');

OUTPUT:

PSVPEC/ECE/22EC593/ADC
VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE & & VOICE (30) LEARNED SUBMISSION TOTAL
(5) EXECUTION RESULT (5) (10) (40)
(10) (10)

RESULT:

PSVPEC/ECE/22EC593/ADC
 EXP NO: 10 DATE:TIME DIVISION MULTIPLEXING

AIM:

APPARATUS REQUIRED:

Sl. No. List of components Type Range Quantity

1 TDM trainer kit - - 1

2 Power cable - - As Per Required
3 Patch cords - - As Per Required
4 CRO - 20 MHZ 1

THEORY

MULTIPLEXE

Multiplexing is the process of combining signals from different information sources so that they can
be transmitted to a common channel. This is under taken by a multiplexer. A digital multiplexer is a
combinational circuit that selects data from 2 n input lines (or) group of lines and transmit them
through a single output line (or group of lines). Multiplexing is advantageous in cases where it is
impracticable and uneconomical to provide separate links for the different information sources. The
two most commonly used methods of multiplexing are,
i. Frequency Division Multiplexing
ii. Time Division Multiplexing.

TIME DIVISION MULTIPLEXING

It is the process of taking the samples from different information signals, in time
domain so that they can be transmitted over the same channel. The main fact in the TDM technique
is that there are large intervals between the message samples. The samples from the other sources are
placed with in these time intervals. Thus every sample is separated from other in time domain.

PSVPEC/ECE/22EC593/ADC
Here, each signal is sampled over one sampling interval and transmitted one after the other along a
common channel. But the receiving end has to follow some constraints. i. It must receive and show
the signal as the transmitted.

It must start at the same time as the transmitting end and establish electrical contact with
the same channel of the input channel. When the two conditions are met then the receiver end is said
to be in synchronization with the transmitter end. If the 1st condition is not met then the samples
different sources would get mixed out the receiver end and if the 2nd condition is not met then the
information from source '1' will be received by same other channel which is not intending to accept
the information from that particular channel.

THREE WIRE SYSTEM

This mode of operation provides three links to be given directly from the transmitter end to
the receiver end for the transmission of signals. This is illustrated below.

In this mode of operation, the signals from all the channels are taken to the multiplexer and
are combined with the carrier signal produced by oscillator and the counter and then it is finally
multiplexed and sent through the transmission data signal (TXD) to the receiving data(RXD). The
clock signal is sent through CLK channel. The signals at the transmitter side are received at the
receiving side at respective points and the signals are demultiplexed and sent to respective channels
and the output is viewed out there.

PSVPEC/ECE/22EC593/ADC
 CIRCUIT DIAGRAM

CIRCUIT DIAGRAM FOR TDM

PROCEDURE
1. Switch ON the power supply to the boa rd.
2. Make initial settings on VCT- 02 as follows.
a) Set all sine wave voltages to 2V,
b) Make the wiring connections as in wiring diagram which is
provided at the end of this experiment.
3. Display the multiplexed signal at test point T14 on channel 1 and 250Hz sine wave

PSVPEC/ECE/22EC593/ADC
 at test point T2 on channel 2 of oscilloscope, note down waveforms.
4. Display the 500Hz sine wave at test point T3 on channel 2 in place of
250Hz, identify sampled version of this sine wave in TDM signal and
note down.
5. Similarly observe 1KHz and 2KHz waveforms at test point T4 and T5
respectively on oscilloscope and note down.
6. Display the TDM waveform (test point T14) on channel 1 and channel
synchronization signal (test point T13) on channel 2 of oscilloscope and note down
waveforms.
7. Display 250Hz sine wave at test point T2 on channel 1 and output sine wave
at test point T16 on channel 2 of oscilloscope and note down waveforms.
8. Similarly, observe input and output 500Hz, 1KHz and 2KHz sine waves on
oscilloscope and note down.
TABULATION

S.NO SIGNAL AMPLITUDE(V) TIME(ms) FREQUENCY(HZ)

1 Modulating Input channel-1
2 Modulating Input channel-2
3 Modulating Input channel-3
4 Mux output
5 De Modulating Input channel-1
6 De Modulating Input channel-2
7 De Modulating Input channel-3

MODEL GRAPH

PSVPEC/ECE/22EC593/ADC
PROGRAM:
clc;
clear all;
close
all;
fs=1000
; f1=50;
f2=100;
N=100;
n=0:N-1;
signal1=sin(2*pi*f1*n/fs);
signal2=cos(2*pi*f2*n/fs);
subplot(2,2,1);
plot(signal1);
title('signal 1');
ylabel('amplitude');
xlabel('time');
subplot(2,2,2);
plot(signal2);
title('signal 2');
ylabel('amplitude');
xlabel('time');
subplot(2,2,3);
stem(signal1);
title('sampled signal
1'); ylabel('amplitude');
xlabel('time');
subplot(2,2,4)
;
stem(signal2);
title(' sampled signal
2'); ylabel('amplitude');
xlabel('time');
l1=length(signal1);
l2=length(signal2);
for i=1:l1
signal(1,i)=signal1(i);
signal(2,i)=signal2(i);
end
tdmsignal=reshape(signal,1,2*l1);
figure
stem(tdmsignal);
title(' TDM
signal');
ylabel('amplitude');
xlabel('time');
demux=reshape(tdmsignal,2,l1);
for i=1:l1
signal3(i)=demux(1,i)
;
signal4(i)=demux(2,i)

PSVPEC/ECE/22EC593/ADC
 ;
end
figur
e
subplot(2,1,1)
;
plot(signal3);

PSVPEC/ECE/22EC593/ADC
 title('signal1');
ylabel('amplitude');
xlabel('time');
subplot(2,1,2)
;
plot(signal4);
title('signal2');
ylabel('amplitude'); xlabel('time');

VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE & & VOICE (30) LEARNED SUBMISSION TOTAL
(5) EXECUTION RESULT (5) (10) (40)
(10) (10)

RESULT:

PSVPEC/ECE/22EC593/ADC
OUTPUT:

PSVPEC/ECE/22EC593/ADC
 EXP NO: 11 DATE:
PULSE CODE MODULATION AND DEMODULATION

AIM:

APPARATUS REQUIRED:

Sl. No. List of components Type Range Quantity

- -
1 PCM trainer kit 1
- -
2 Power cable As Required
- -
3 Patch cords As Required
-
4 CRO 20 MHZ 1

THEORY

In pulse code modulation, each analog sample converted into eight bit code and they are transmitted
in serial form. The PCM system consists of a sample/hold circuit, analog to digital converter and
parallel to serial converter. The 1KHz on board sinewave signal can be used for studying modulation
and demodulation purpose. External sinewave can also be feed to the modulator section from an
external function generator which will be useful for studyingfrequency response of the system.

PSVPEC/ECE/22EC593/ADC
BLOCK DIAGRAM OF PULSE CODE MODULATION

BLOCK DIAGRAM OF PULSE CODE DEMODULATION

PSVPEC/ECE/22EC593/ADC
CONNECTION DIAGRAM OF PULSE CODE MODULATICONNECTION DIAGRAM

PSVPEC/ECE/22EC593/ADC
PROCEDURE
 Refer to the block diagram and carry out the following connections andswitch settings.

 Connect the Power Supply with proper polarity to the kit DCL-08 andswitch it on.

 Keep all the switch faults in OFF position.

 Put jumper JP3 to 2nd position.

 Connect the 1 KHz sine wave signal generated onboard 1 KHz post toPAM IN Post.

 Adjust the amplitude at 2Vp-p using pot P3.

TABULATION:

S.NO SIGNAL AMPLITUDE (V) TIME (ms) FREQUENCY (HZ)

1 Modulating Input
2 Carrier Input
3 PCM Output
4 De mod output

MODEL GRAPH:

PSVPEC/ECE/22EC593/ADC
 VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & TIMELY GRAND
PROCEDURE & & VOICE (30) PSO SUBMISSION TOTAL
(5) EXECUTION RESULT (5) LEARNED (10) (40)
(10) (10)

RESULT:

PSVPEC/ECE/22EC593/ADC
EXP NO: 12 DATE:
DELTA MODULATION AND DEMODULATION

AIM:

APPARATUS REQUIRED:

Sl. No. List of components Type Range Quantity

- -
DM / ADM kit
1 1
- -
2 Power cable As Required
- -
3 Patch cords As Required
-
4 CRO 20 MHZ 1

THEORY

DELTA MODULATOR
The modulator comprises of comparator, quantizer and Integrator. The input base band
sinusoidal signal and its quantized approximated signals (feedback signal from integrator) are
applied to comparator. A comparator as its name suggests simply makes a comparison between
inputs. The comparator gives a TTL signal is then latched into a D-flipflop which is clocked by
selected clock rates. The binary data stream from the flip flop is transmitted to receiver and is
fed to the integrator. The integrator output is then connected to the negative terminal of the
voltage comparator.

DELTA DEMODULATOR
The demodulator comprises of simple, integrator and low pass filter. The receive delta
modulator signal is applied to integrator, its output tries to follow the analog signal. The
integrator output contains sharp edges which is smoothened out by the 4th order low pass filter.

PSVPEC/ECE/22EC593/ADC
DISTORTION

The distortion in delta modulation can be broken into two distinct areas, quantization
noise and idle channel noise (during zero input signal). The two major parameters s which affect
the distortion in delta modulation are the sampling rate f and step size s „)‟. Ideally the step size )
should be small as possible and sampling rate f as large as possible. Practical and economic
considerations limits the minimum step size of s „)‟ and the maximum sampling rate of f . These
limitations give rise to two types of distortions, slope overload noise and granular noise.
IDLE CHANNEL NOISE

Usually delta modulation in an idle state (there is no or zero input signal), generates
series of one‟s and zero‟s consecutively. This generates a square waveform at the output of
accumulator (or) feedback section called step size. The frequency of the step size is equal to that
of sampling clock of the DM system. This unnecessary square waveform doesn‟t affect the
decoder because of frequency of the step size (which will be attenuated due to low pass filter).
Slope overload and Granular noise

The system is said to be slope overload if the error exceeds, where two or more steps are
required to achieve the input level. The slope overload can be reduced by increasing step size
Of the system. The system exhibits granular noise if the error falls by , where two or more steps
are required to achieve the input level. The granular noise can be reduced bydecreasing step size
of the system

DELTA MODULATOR

PSVPEC/ECE/22EC593/ADC
DELTA DEMODULATON

ADAPTIVE DELTA MODULATOR

PSVPEC/ECE/22EC593/ADC
PSVPEC/ECE/22EC593/ADC
PROCEDURE

1. Make wiring connection on the kit as shown in figure and connect the test points P1 to

P8 and P21 to P22 using patch chords provided with this training kit.

2. Ensure that all switches in switched faults block in OFF position and

all potentiometersPOT1 and POT2 in minimum position.

3. Keep 8KHz of sampling rate.

4. Display the modulating signal at test point P1 using a probe on channel1 of

oscilloscope.Increase sine wave amplitude by rotating POT1 in clockwise pp

direction and set sine wave amplitude to 3V and note down.

5. Displays the output waveform on channel 2 of oscilloscope and note

downthe waveform, amplitude level of the signal.

6. Replace channel 1 waveform by modulator output serial data (test point P21 and compare

it with the sample signal on channel 2, every sample has been transmitted with

corresponding 8- bits of data. Note down the modulator output waveform.

7. Plot all the noted waveforms such as modulating signal, S/H output and

modulator outputon a linear graph sheet.

8. Replace the channel 2 waveform by digital to analog converter (test point P33)

waveformwhich is the recovered sampled analog signal, note down the

waveform.

9. Observe the recovered sine wave at test point P34, note down waveforms. Plot all

the notedwaveforms such as integrator signal, and recovered sine wave on a linear

graph sheet.

PSVPEC/ECE/22EC593/ADC
TABULATION:

S.NO SIGNAL AMPLITUDE (V) TIME (MS) FREQUENCY (HZ)

1 Modulating Input

2 Sampled input

3 Delta modulator Output

4 Demodulated output

MODEL GRAPH:

PSVPEC/ECE/22EC593/ADC
 VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE & & VOICE (30) LEARNED SUBMISSION TOTAL
(5) EXECUTION RESULT (5) (10) (40)
(10) (10)

RESULT

PSVPEC/ECE/22EC593/ADC
 EXP NO: 13 DATE:
SIMULATION OF ASK, FSK, BPSK GENERATION & DETECTION

AIM:

APPARATUS REQUIRED:

1. System
2. MAT LAB software

THEORY

FSK is one method used to overcome the bandwidth limitation of the telephone system so
that digital data can be sent over the phone lines. The basic idea of FSK is to represent 1sand 0s
by two different frequencies within the telephone bandwidth. The standard frequencies for a full
duplex 300 baud FSK Modulator & Demodulator in the originate modes are 1070 Hz for a 0 (called
a space) and 1270 Hz for a 1 (called a mark). In the answer mode, 2025 Hz is a 0and 2225 Hz is a 1.
The relationship of these FSK frequencies and the telephone bandwidth is illustrated in figure 1.
Signals in both the originate and answer bands can exist at the same timeon the phone line and they
do not interfere with each other because of the frequency separation.
The baud rate is the number of changes of the transmitted data. This can be determined by taking the
reciprocal of the time of the shortest pulse transmitted. A FSK Modulator & Demodulator sends and receives
serial data at a rate of 300 bits or 300 baud. For a 300 baud data stream, maximum frequency occurs when
the data stream has 0's and 1's alternatively and the frequency of this will be 150 Hz. As mentioned earlier
the telephone network has a bandwidth between 300Hz & 3000Hz. So the maximum frequency of 300 baud
data stream falls out of the bandwidth range of the telephone lines. This prevents sending digital data in its
pure form over the phone lines. FSK Modulator & Demodulator is one method used to overcome the
bandwidth limitation of the telephone network for digital data transmission.
As mentioned earlier in FSK, the standard frequency for a space is either 1070Hz or 2025 Hz
depending on the FSK Modulator & Demodulator mode and that of a mark is either 1270 Hz or 2225
Hz. All these frequencies come under the permissible frequency range of the telephone lines. Thus
the bandwidth limitation of the telephone line is overcome by the use of FSK.

PSVPEC/ECE/22EC593/ADC
ALGORITHM:

1. Start.
2. Get the data bits and compute its length.
3. Get the input frequency.
4. Generate the BPSK waveforms with their corresponding carrier frequency.
5. Obtain the output waveform.
6. Stop

PROGRAM FOR ASK:

clc;
t=0:0.0001:0.15
;
m=square(2*pi*10*t)
; c=sin(2*pi*60*t);
y1=(m.*c);
for i=1:1500
if(m(i)==1
)
y1(i)=c(i)
; else
y1(i)=0;
end
end
figure(1
)
subplot(3,1,1);
plot(m);
xlabel('time');
ylabel('amplitude');
title('message
signal');
subplot(3,1,2);
plot(c);
xlabel('time');
ylabel('amplitude');
title('carrier
signal');
subplot(3,1,3);
plot(y1);
xlabel('time');
ylabel('amplitude');
title('ASK signal');

% FSK Waveform

clc;
clear all;
close
all;
PSVPEC/ECE/22EC593/ADC
t=0:0.0001:0.15;
m=square(2*pi*10*t)
; c1=sin(2*pi*60*t);
c2=sin(2*pi*120*t);
s1=(m.*c1);

PSVPEC/ECE/22EC593/ADC
for
i=1:1500
if(m(i)==1)
s1(i)=c2(i)
; else
s1(i)=c1(i);
en
d
en
d
figure(2);
subplot(4,1,1);
plot(m);
xlabel('time');
ylabel('amplitude');
title('message
signal');
subplot(4,1,2);
plot(c1);
xlabel('time');
ylabel('amplitude');
title('carrier signal
1'); subplot(4,1,3);
plot(c2);

PROGRAM FOR BPSK:

% BPSK Modulation
clc;
t=0:0.0001:0.15
;
c1=sin(2*pi*60*t);
m=square(2*pi*10*t);
c2=sin((2*pi*60*t)+pi);
s2=(m.*c1);
for
i=1:1500
if(m(i)==1)
s2(i) =c1(i);
else
s2(i)=c2(i); end
end
figure(3);
subplot(411)
; plot(m);
xlabel('time');
ylabel('amplitude');
title('message
signal');
subplot(412);
plot(c1);

PSVPEC/ECE/22EC593/ADC
xlabel('time');
ylabel('amplitude');
title('carrier signal
1'); subplot(413);
plot(c2);
xlabel('time');
ylabel('amplitude');

PSVPEC/ECE/22EC593/ADC
title('carrier signal
2'); subplot(414);
plot(s2);
xlabel('time');
ylabel('amplitude');
title('BPSK');

VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE & & VOICE (30) LEARNED SUBMISSION TOTAL
(5) EXECUTION RESULT (5) (10) (40)
(10) (10)

RESULT:

PSVPEC/ECE/22EC593/ADC
OUTPUT

: ASK

FSK OUTPUT:

PSVPEC/ECE/22EC593/ADC
BPSK OUTPUT

Output

PSVPEC/ECE/22EC593/ADC
 EXP NO: 14 SIMULATION OF QPSK GENERATION & DETECTION
DATE:

AIM:

APPARATUS REQUIRED:

Sl. No. List of components Type Range Quantity

- -
System
1 1
- -
2 MAT LAB Software

THEOR
Y QPSK

Quaternary phase shift keying (QPSK), or quadrature PSK as it is sometimes called, is another
form of angle-modulated, constant-amplitude digital modulation. QPSK is an M-ary encoding
technique where M = 4 (hence, the name “quaternary,” meaning “4" ). With DPSK four output phases
are possible for a single carrier frequency. Because there are four different output phases, there must be
four different input conditions. Because the digital input to a QPSK modulator is a binary (base 2)
signal, to produce four different input conditions, it takes more thana single input bit. With two bits,

there are four possible conditions: 00, 01, 10 and therefore, with QPSK, the binary input data are
combined into groups of two bits called dibits.
ALGORITHM:

1. Start.
2. Get the data bits and compute its length.
3. Get the input frequency.
4. Generate the BPSK waveforms with their corresponding carrier frequency.
5. Obtain the output waveform.
6. Stop

PSVPEC/ECE/22EC593/ADC
PROGRAM:
QPSK:
% Sampling rate of sine wave
fs = 100;
% Time for one bitt = 0: 1/fs : 1;
% This time variable is just forplot time =;
QPSK_signal = ;[Digital_signal];
[carrier_signal];
for ii = 1: 2: length(bit_stream)jj = ii + 1;
%Code for generation of Original Digital Signal Digital_signal
= [Digital_signal
(bit_stream(ii)==0)*zeros(1,length(t))+(bit_stream(jj)==1)*ones(1,length(t)
)];

% Code for generation of carrier signal

carrier_signal=[carrier_signal (sin(2*pi*f*t))];
%Code for genearting QPSK signal modulated signal if bit_stream(ii)==0 if bit_stream(jj)==0
bit00 = (bit_stream(ii)==0)*sin(2*pi*f*t + P1); QPSK_signal = [QPSK_signal (bit00)]; else
bit0 = (bit_stream(ii)==0)*sin(2*pi*f*t + P2); bit1 = (bit_stream(jj)==0)*sin(2*pi*f*t+ P2);
QPSK_signal = [QPSK_signal (bit0+bit1)
if bit_stream(ii)==1 if bit_stream(jj)==0
bit1 = (bit_stream(ii)==0)*sin(2*pi*f*t + P3); bit0 = (bit_stream(jj)==0)*sin(2*pi*f*t+ P3);
QPSK_signal=[QPSK_signal (bit1+bit0)];
else
bit11 = (bit_stream(jj)==1)*sin(2*pi*f*t + P4); QPSK_signal = [QPSK_signal (bit11) ]; end

end
time = [time
t]; t = t + 1;
end

% Plot the Original Digital Signal

subplot(3,1,1);
plot(time,Digital_signal,'r','LineWidth',2) ; xlabel('Time
(bit period)'); ylabel('Amplitude');
title('Original Digital Signal'); axis([0 8 -0.5 1.5]);
grid on;

PSVPEC/ECE/22EC593/ADC
% Plot the carrier
Signal
subplot(3,1,2);
plot(time,carrier_signal,'g','LineWidth',2) ;
xlabel('Time (bit period)'); ylabel('Amplitude');
title('carrier Signal'); axis([0 time(end) -1.5-1.5]);
grid on;
% Plot the QPSK Signal
subplot(3,1,3); plot(time)
QPSK_signal,'LineWidth',2)
; xlabel('Time (bit period)');
ylabel('Amplitude');
title('QPSK Signal with two Phase Shifts');
axis([0 8 -1.5 1.5]);
grid on;

MATLAB PROGRAM QPSK:

Program

N = 10^4 % number of bits or symbols

rand('state',100); % initializing the rand() function
randn('state',200); % initializing the randn()
function
ip = rand(1,N)>0.5; % generating 0,1 with equal
probability ipD = mod(filter(1,[1 -1],ip),2);

y[n]=y[n-1]+x[n]s = 2*ipD-1; 0 -> -1; 1 -> 0

n = 1/sqrt(2)*[randn(1,N) + j*randn(1,N)]; % white gaussian noise,
0dB varianceEb_N0_dB = [-3:10]; % multiple Eb/N0 values
for ii = 1:length(Eb_N0_dB)
y = s + 10^(-Eb_N0_dB(ii)/20)*n; % additive white gaussian
noise ipDHat_coh = real(y) > 0;

mod(filter([1 -1],1,ipDHat_coh),2);

PSVPEC/ECE/22EC593/ADC
nErr_dbpsk_coh(ii) = size(find([ip - ipHat_coh]),2); % counting the number of errors 10

end

simBer_dbpsk_coh = nErr_dbpsk_coh/N; theoryBer_dbpsk_coh =

erfc(sqrt(10.^(Eb_N0_dB/10))).*(1.5*erfc(sqrt(10.^(Eb_N0_dB/));

close all figure semilogy(Eb_N0_dB,theoryBer_dbpsk_coh,'b.-); hold

on semilogy(Eb_N0_dB,simBer_dbpsk_coh,'mx-');

axis([-2 10 10^-6 0.5])

grid on

legend ('theory', 'simulation');

xlabel('Eb/No, dB')
ylabel('Bit Error Rate')
title('Bit error probability curve for coherent demodulation of DBPSK')

VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE &EXECUTION &RESULT VOICE (30) LEARNED SUBMISSION TOTAL
(5) (10) (10) (5) (10) (40)

RESULT:

PSVPEC/ECE/22EC593/ADC
QPSK:

PSVPEC/ECE/22EC593/ADC
 EXP NO: 15 SIMULATION OF QAM MODULATION & DEMODULATION
DATE:

AIM:

APPARATUS REQUIRED:

Sl. No. List of components Type Range Quantity

- -
System
1 1
- -
2 MAT LAB Software

THEOR
Y QAM
Each dibit code generates one of the four possible output phases. Therefore, for each two -
bit dibit clocked into the modulator, a single output change occurs. Therefore, the rate ofchange at
the output (baud rate ) is onehalf of the input bit rate.
A block diagram of QPSK modulator is shown in above Figure. Two bits (a dibit) are
clocked into the bit splitter. After both bits have been serially inputted, they are simultaneously
parallel outputted. One bit is directed to the I channel and the other to the Q channel. The 1- bit
modulates a carrier that is in phase with the reference oscillator (hence, the name “I” for “in phase”
channel), and the Q bit modulates a carrier that is 90° out of phase or in quadrature with the
reference carrier (hence, the name “Q” for “quadrature” channel).
ALGORITHM:

1. Start.
2. Get the data bits and compute its length.
3. Get the input frequency.
4. Generate the BPSK waveforms with their corresponding carrier frequency.
5. Obtain the output waveform.
6. Stop

PSVPEC/ECE/22EC593/ADC
PROGRAM:
clc; clear all;close
all; M=16;
k=log2(M);n=3*1e5
; nsamp=8;
X=randint(n,1);
xsym = bi2de(reshape(X,k,length(X)/k).','left-msb');
Y_qam=modulate(modem.qammod(M),xsym);

Y_qpsk=modulate(modem.pskmod(M),xsym);

Ytx_qam = Y_qam;
Ytx_qpsk =
Y_qpsk; EbNo=30;
SNR=EbNo+10*log10(k)-10*log10(nsamp);
Ynoisy_qam = awgn(Ytx_qam,SNR,'measured');
Ynoisy_qpsk =
awgn(Ytx_qpsk,SNR,'measured'); Yrx_qam =
Ynoisy_qam;
Yrx_qpsk = Ynoisy_qpsk;
h1=scatterplot(Yrx_qam(1:nsamp*5e3),nsamp,0,'r.')
; hold on;
scatterplot(Yrx_qam(1:5e3),1,0, 'k*',h1);
title('constellation diagram 16 QAM');
legend('Received signal' ,'signal
constellation'); axis([-5 5 -5 5]);
hold off;
h2=scatterplot(Yrx
qpsk(1:nsamp*5e3),nsamp,0,'r.'); hold on;
scatterplot(Yrx qpsk(1:5e3),1,0,'k*',h2);
title('constellation diagram 16 PSK');
legend('Received signal' ,'signal
constellation'); axis([-5 5 -5 5]);
hold off

PSVPEC/ECE/22EC593/ADC
VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE &EXECUTION &RESULT VOICE (30) LEARNED SUBMISSION TOTAL
(5) (10) (10) (5) (10) (40)

RESULT:

PSVPEC/ECE/22EC593/ADC
OUTPUT
: QAM:

PSVPEC/ECE/22EC593/ADC
 EXP NO: 16 SIMULATION OF DPSK GENERATION AND DETECTION
DATE:

AIM:

APPARATUS REQUIRED:

Sl. No. List of components Type Range Quantity

- -
System
1 1
- -
2 MAT LAB Software

ALGORITHM:

1. Start.
2. Get the data bits and compute its length.
3. Get the input frequency.
4. Generate the BPSK waveforms with their corresponding carrier frequency.
5. Obtain the output waveform.
6. Stop

PROGRAM:

DPSK Modulation and Demodulation in MATLAB

clc; clear; close all;

%% Parameters
N = 10; % Number of bits in input signal
data = randi([0, 1], 1, N); % Random binary data
sequence Tb = 1; % Bit duration
fs = 100; % Sampling frequency
t = 0:1/fs:Tb-1/fs; % Time vector for one bit

%% DPSK Modulation
dpsk_signal = []; % Initialize modulated signal
ref_phase = 0; % Reference phase (initial)
modulated_bits = []; % Store modulated bit
phases

PSVPEC/ECE/22E593/ADC
for i = 1:N
% Determine phase change based on data bit (0 -> no change, 1 -> pi phase
shift) if data(i) == 1
ref_phase = ref_phase + pi; % 180 degree phase
shift end
modulated_bits = [modulated_bits, ref_phase]; % Store phase for analysis

% Generate DPSK modulated signal for each bit

bit_signal = cos(2*pi*t + ref_phase); % Carrier with phase shift
dpsk_signal = [dpsk_signal, bit_signal]; % Append to total signal
end

%% Add Noise (Optional)

noise_power = 0.5; % Noise
variance
noisy_signal = dpsk_signal + sqrt(noise_power) * randn(1, length(dpsk_signal));

%% DPSK
Demodulation
received_bits = [];
prev_phase = 0; % Previous bit's phase

for i = 1:N
% Extract the received bit
signal start_idx = (i-
1)*length(t) + 1; end_idx =
i*length(t);
bit_signal = noisy_signal(start_idx:end_idx);

% Calculate phase difference from previous bit

phase = angle(sum(bit_signal .* exp(-1j*2*pi*t))); % Estimate phase
phase_diff = mod(phase - prev_phase, 2*pi); % Phase difference

% Decode bit based on phase difference

if phase_diff > pi/2 && phase_diff <
3*pi/2 received_bits = [received_bits,
1];
else
received_bits = [received_bits,
0]; end

% Update previous phase

prev_phase = phase;
end

%% Display Results
disp('Original Data:');
disp(data);
disp('Received
Data:');
PSVPEC/ECE/22E593/ADC
disp(received_bits);
%% Plotting
figure;
subplot(3,1,1)
;

PSVPEC/ECE/22E593/ADC
stairs([data, data(end)], 'LineWidth', 2); % Plot original
data ylim([-0.5 1.5]); title('Original Binary Data'); grid on;

subplot(3,1,2);
plot(dpsk_signal, 'LineWidth', 1.5); % Plot DPSK modulated signal
title('DPSK Modulated Signal'); grid on;

subplot(3,1,3);
plot(noisy_signal, 'LineWidth', 1.5); % Plot noisy received signal
title('Noisy Received Signal'); grid on;

VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE & EXECUTION & RESULT VOICE (30) LEARNED SUBMISSION TOTAL
(5) (10) (10) (5) (10) (40)

RESULT:

PSVPEC/ECE/22E593/ADC
OUTPUT : DPSK

PSVPEC/ECE/22E593/ADC
 EXP NO: 17 SIMULATION OF CONVOLUTIONAL CODES
DATE:

AIM:

APPARATUS REQUIRED:

Sl. No. List of components Type Range Quantity

- -
System
1 1
- -
2 MAT LAB Software

THEORY

Convolutional codes are often described as continuous. However, it may also be said that convolutional
codes have arbitrary block length, rather than being continuous, since most real- world convolutional
encoding is performed on blocks of data. Convolutionally encoded block codes typically employ
termination. The arbitrary block length of convolutional codes can also be contrasted to classic block codes,
which generally have fixed block lengths that are determined by algebraic properties. The ability to perform
economical maximum likelihood soft decision decoding is one of the major benefits of convolutional codes.
This is in contrast to classic block codes, which are generally represented by a time-variant trellis and
therefore are typically hard-decision decoded. Convolutional codes are often characterized by the base code
rate and the depth (or memory) of the encoder .

ALGORITHM:

1. Start.
2. Get the data bits and compute its length.
3. Get the input frequency.
4. Generate the BPSK waveforms with their corresponding carrier frequency.
5. Obtain the output waveform.
6. Stop

PSVPEC/ECE/22E593/ADC
PROGRAM:
Clc;

m=input(‘enter the input

sequence‘); l=input(‘enter

constraint length’); Gl=input(‘enter

impulse response’);

G2=input(‘enter impulse ‘); t=poly2trellis ([l], [G1 G2]);

disp(t);

C=convenc (m,

t); disp (c);

%decoding

Opmode=’trunc’;

detype=’hard’ ;

R=input(‘enter received code’);

deco=vitdec (r, t, l, opmode,

detype); Disp (deco);

for n = 1:length(EbNoVec)

% Convert Eb/No to SNR

snrdB = EbNoVec(n) + 10*log10(k*rate);

% Noise variance calculation for unity average signal power.

Noise Var = 10.^(-snrdB/10);

% Reset the error and bit counters

[numErrsSoft,numErrsHard,numBits] =

deal(0); while numErrsSoft < 100 && numBits

< 1e7

PSVPEC/ECE/22E593/ADC
% Generate binary data and convert to

symbols dataIn = randi([0

1],numSymPerFrame*k,1);

PSVPEC/ECE/22E593/ADC
% Convolutionally encode the data dataEnc = convenc(dataIn,trellis);

% QAM modulate

txSig = qammod(dataEnc,M,'InputType','bit','UnitAveragePower',true);

% Pass through AWGN channel

rxSig = awgn(txSig,snrdB,'measured');

% Demodulate the noisy signal using hard decision (bit) and

% soft decision (approximate LLR) approaches.

rxDataHard = qamdemod(rxSig,M,'OutputType','bit','UnitAveragePower',true);

rxDataSoft = qamdemod(rxSig,M,'OutputType','approxllr', ...

'UnitAveragePower',true,'NoiseVariance',noiseVar);

% Viterbi decode the demodulated data

dataHard = vitdec(rxDataHard,trellis,tbl,'cont','hard'); dataSoft =

vitdec(rxDataSoft,trellis,tbl,'cont','unquant');

% Calculate the number of bit errors in the frame. Adjust for the

% decoding delay, which is equal to the traceback depth. numErrsInFrameHard

= biterr(dataIn(1:end-tbl),dataHard(tbl+1:end)); numErrsInFrameSoft =

biterr(dataIn(1:end-tbl),dataSoft(tbl+1:end));

% Increment the error and bit counters numErrsHard = numErrsHard + numErrsInFrameHard;

numErrsSoft = numErrsSoft + numErrsInFrameSoft;

numBits = numBits +

numSymPerFrame*k; Plot the estimated

hard and soft BER data.

Plot the theoretical performance for an uncoded 64-QAM channel.

semilogy(EbNoVec,[berEstSoft berEstHard],'-*')
hold on semilogy(EbNoVec,berawgn(EbNoVec,'qam',M))
legend('Soft','Hard','Uncoded','location','best')
PSVPEC/ECE/22E593/ADC
grid xlabel('Eb/No (dB)') , ylabel('Bit Error Rate')

PSVPEC/ECE/22E593/ADC
VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE &EXECUTION &RESULT VOICE (30) LEARNED SUBMISSION TOTAL
(5) (10) (10) (5) (10) (40)

RESULT:

PSVPEC/ECE/22E593/ADC
OUTPUT:
Enter the input sequence [1 0 1 1 0]

Enter constraint length 3

Enter impulse response

5 Enter impulse 7

Num Input Symbols:2

Num Output Symbols:4

Num states:4

nextStates: [4x2

double] outputs:[4x2

double]

1101001010
Enter received code

[1 1 0 1 0 0 1 0 1 0]
10110

PSVPEC/ECE/22E593/ADC
 EXP NO: 18 SIMULATION OF LINEAR BLOCK CODES
DATE:

AIM:

APPARATUS REQUIRED:

Sl. No. List of components Type Range Quantity

- -
System
1 1
- -
2 MAT LAB Software

THEORY

Linear block codes:

Its one of the error control coding. Linear codes means that sum of any two code vector gives
another code vector. Also it is a systematic code. Block codes in which the message bits are
transmitted in unaltered form are called systematic code.

Consider an (n, k) linear block code in which „k‟ is a message bit, „n‟ is block length and b=n-k
is a parity check bit.
Structure of code word
Message Vector m= [mo, m1, m2................mk-1]

Parity check vector b= [ b0, b1, b2,............bn-k-1]

Code vector X= [Xo, X1, X2.................Xn-1 ]

=m x P Where,

P00 P10…....................Pn-k-1, 0

P01
Define the k by n generator matrix G= {P: Ik}

PSVPEC/ECE/22E593/ADC
Define the (n-1) by k sub matrix H= [ Ik : P^T]

Parity check vector b= m x P

Code vector X= Message vector check vector

ALGORITHM:

1. Start.
2. Get the data bits and compute its length.
3. Get the input frequency.
4. Generate the BPSK waveforms with their corresponding carrier frequency.
5. Obtain the output waveform.
6. Stop

PROGRAM:

clc; clear; k=4;

for i=1:2^k for

j=k:- 1:1

if rem((i-1),2^(-j+k+1))>=2^(-j+k)

u(i,j)=1; else

u(i,j)=0

end echo off;

end

end echo on;

G=[1 0 0 0 1 1 1;

0 1 0 0 1 1 0;

0 0 1 0 1 0 1;

0 0 0 1 0 1 1]

c=rem(u*G,2);

disp(c);
w_min=min(sum((c(2:2^k,:))')); disp(w_min);

PSVPEC/ECE/22E593/ADC
OUTPUT:

G=[1 0 0 0 1 1 1;

0 1 0 0 1 1 0;

0 0 1 0 1 0 1;

0 0 0 1 0 1 1];

C=rem(U*G,2);

disp(C);

0 0 0 0 0 0 0

0 0 0 1 0 1 1

0 0 1 0 1 0 1

0 0 1 1 1 1 0

0 1 0 0 1 1 0

0 1 0 1 1 0 1

0 1 1 0 0 1 1

0 1 1 1 0 0 0

1 0 0 0 1 1 1

1 0 0 1 1 0 0

1 0 1 0 0 1 0

1 0 1 1 0 0 1

1 1 0 0 0 0 1

1 1 0 1 0 1 0

1 1 1 0 1 0 0

1 1 1 1 1 1 1

PSVPEC/ECE/22E593/ADC
VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE &EXECUTION &RESULT VOICE (30) LEARNED SUBMISSION TOTAL
(5) (10) (10) (5) (10) (40)

RESULT:

PSVPEC/ECE/22E593/ADC
 EXP NO: 19 SIMULATION OF CYCLIC CODES
DATE:

AIM:

APPARATUS REQUIRED:

Sl. No. List of components Type Range Quantity

- -
System
1 1
- -
2 MAT LAB Software

THEORY

Error control coding is the processor of adding redundant list to the information bits, So on to
simulate two level objectives at the receiver. Error detection and correction. A block code is linear if
any linear combination of its code words a code is cyclic, if any cyclic shift of a code and is also a
code word.
They are usually denoted by (n, k) in which the first position of k bits is always identical to the
message sequence to the transmitted. The block length is denoted by n.

ALGORITHM:

CYCLIC CODES

Initialize the message bits (k) and block length (m) Select

the message bits

Generate the polynomial Encode

the message bits

Introduce and in the encoded message bits

Decode the original message from the RX message Display the

Encoded & Decoded message

PSVPEC/ECE/22E593/ADC
PROGRAM:
%ENCODING

clc;

n=7; % CODE LENGTH

k=4; % NUMBER OF MESSAGE BITS disp('MESSAGE');

% RANDOM MESSAGE GENERATION

m=randint(2,k,[0,1]); disp(m);

disp('POLYNOMIAL'); % GENERATOR POLYNOMIAL

pol=cyclpoly(n,k,'min'); disp(pol);

disp('CODE VECTOR'); % CODE VECTOR GENERATION

code=encode(m,n,k,'CYCLIC/FMT',pol); disp(code);

disp('ERROR'); % RANDOM ERROR GENERATION

e=randerr(2,n,[1 0;0.8 0.2]); disp(e);

disp('RECEIVED MATRIX'); % RECEIVED MATRIX

r=rem(plus(code,e),2); disp(r);

[newmsg err cc]=decode(r,n,k,'CYCLIC'); % DECODING OF RECEIVED MESSAGE

disp('DECODED RECEIVED VECTOR');

disp(cc);
disp('DECODED MESSAGE');

disp(newmsg);

clc; clear all; close all;

n=7; k=4;
g=[1 0 1 1];
d= input ('enter the data seq'); c=encode(d,n,k,'cyclic',g);
c1(1)=c(4);c1(2)=c(5);c1(3)=c(6);c1(4)=c(7);c1(5)=c(1); c1(6)=c(2);c1(7)=c(3);
disp('code word'); disp(c); pol=cyclpoly(7,4);
[parmat,genmat,k]=cyclgen(7,pol);
trt=syndtable(parmat); recd=input('enter the received
codeword');

PSVPEC/ECE/22E593/ADC
syndrome=rem(recd * parmat',2);
syndrome1=bi2de(syndrome,'left-msb');
errorvect=trt(1+syndrome1,:);
disp('errorvect');

disp(errorvect); correctedcode=rem(errorvect+recd,2);
disp('correctedcode'); disp(correctedcode);
r=correctedcode;
m1(1)=r(5);m1(2)=r(6);m1(3)=r(7);m1(4)=r(1);m1(5)=r(2);
m1(6)=r(3);m1(7)=r(4);
m=decode(m1,n,k,'cyclic',g); disp('messageword'); disp(m);

enter the data seq[1 0 0 1]

code word1 1 0 0

enter the received codeword[1 1 1 1 1 1 1] errorvect

0 0 0 0 0 0 0

correctedcode
1 1 1 1 1 1 1
messageword
1 1 1 1

PSVPEC/ECE/22E593/ADC
OUTPUT:

MESSAGE

0 1 1 0

0 0 0 1

POLYNOMIAL

1 0 1

CODE VECTOR

0 0 1 0 1 1 0

0 1 1 0 0 0 1

ERROR

0 0 0 1 0 0 0

0 0 0 0 1 0 0

RECEIVED MATRIX

0 0 1 1 1 1 0

0 1 1 0 1 0 1

DECODED RECEIVED VECTOR

0 0 1 0 1 1 0

0 1 1 0 0 0 1

DECODED MESSAGE

0 1 1 0

0 0 0 1

PSVPEC/ECE/22E593/ADC
VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE &EXECUTION &RESULT VOICE (30) LEARNED SUBMISSION TOTAL
(5) (10) (10) (5) (10) (40)

RESULT

PSVPEC/ECE/22E593/ADC
EXP NO: SIMULATION OF LINEAR BLOCK CODES
DATE:

AIM:

APPARATUS REQUIRED:

1. System
2. MATLAB Software

THEORY:

Simulink is a block diagram environment for multidomain simulation and Model-Based

Design. It supports system-level design, simulation, automatic code generation, and

continuous test and verification of embedded systems. Simulink provides a graphical editor,

customizable block libraries, and solvers for modelling and simulating dynamic systems. It is

integrated with MATLAB,enabling you to incorporate MATLAB algorithms into models and

export simulation results to MATLAB for further analysis.

Digital Communication block diagram

PSVPEC/ECE/22E593/ADC
PROGRAM:
clc; clear all;

close all;

A=5;

fa=50;T=1/fa;

t=0: T/1000:2*T;

ya=3*sin (2*pi*fa*t);

figure (1);

subplot(3,1,1); plot(t,

ya); title('modulating

signal'); xlabel('time

(sec)');

ylabel('amp

(v)'); A=5;

fc=2000;

yc=A*sin

(2*pi*fc*t); figure

(1); subplot(3,1,2);

plot(t, yc);

title('carrier

signal'); xlabel('time

(sec)');

ylabel ('amp (v)');

ym= (A+ya). *sin

(2*pi*fc*t); figure (1);

subplot(3,1,3);

plot(t, ym);

PSVPEC/ECE/22E593/ADC
title('modulating

signal'); xlabel('time

(sec)');

ylabel('amp (v)');

PSVPEC/ECE/22E593/ADC
ym=tA+ya).*sin

(2*pi*fc*t); figure (2);

subplot (4,1,1);

plot(t, ym); title('received

signal'); xlabel('time

(sec)');

ylabel('amp (v)');

A=5; fc=2000;

yo=A*

sin(2*pi*f*t); figure

(2);

subplot (4,1,2)

plot(t,yc); title('carrier

signal'); xlabel('time

(sec)');

ylabel('amp (v)'); ym;

m=ym. *sin

(2*pi*fc*t); figure (2);

subplot(4,1,3);

plot(t, ymm);

title ('received signal after multiplication of carrier

signal'); xlabel('time (sec)');

ylabel('amp (v)');

wc=200/50000;

[a b]=butter (2,wc,

'low'); sig=filter (a, b,

PSVPEC/ECE/22E593/ADC
ymm) ; figure (2);
subplot (4,1, 4);

plot(t, 2*sig-5);

PSVPEC/ECE/22E593/ADC
title ('am demodulated signal');

xlabel ('time (sec)');

ylabel ('amp (v)');

OUTPUT:

PSVPEC/ECE/22E593/ADC
 VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE &EXECUTION &RESULT VOICE (30) LEARNED SUBMISSION TOTAL
(5) (10) (10) (5) (10) (40)

RESULT:

PSVPEC/ECE/22EC593 ADC
 EXP NO: 21 GENERATION OF QPSK SIGNAL USING KIT
DATE:

AIM:

APPARATUS REQUIRED:

1. QPSK Trainer Kit

2. Dual Trace oscilloscope

3. Digital Millimeter

4. Patch chords.

THEORY:

The Quadrature Phase Shift Keying , QPSK is a variation of BPSK, and it is also a Double Side Band

Suppressed Carrier DSBSCDSBSC modulation scheme, which sends two bits of digital information

at a time, called as bigits.Instead of the conversion of digital bits into a series of digital stream, it

converts them into bit pairs. This decreases the data bit rate to half, which allows space for the other

users.

PSVPEC/ECE/22EC593 ADC
CONNECTION DIAGRAM:

PSVPEC/ECE/22EC593 ADC
PROCEDURE:

1. Connect and switch on the power supply.

2. QPSK is selected by default and LEDs of corresponding technique will glow.

3. Select the bit pattern using push button i.e. 8 bit or 16 bit or 32 bit or 64 bit. Observe bit pattern

on TP-2.

4. Select data rate using push button i.e. 2 KHz or 4 KHz or 8 KHz 16 KHz.

Modulation:

5. Observe the input bit pattern at TP-2 by varying bit pattern using respective pushbutton.

6. Observe the data rate at TP-1 by varying data rate using respective pushbutton.

7. Observe the Two- bit encoding i.e. I-Channel (TP-3) and Q-Channel (TP-4).

8. Observe carrier signal i.e. cosine wave (TP-5) and sine wave (TP-6). Frequency of carrier signal

will change with respect to data rate

9. Observe I-Channel (TP-7) and Q-Channel (TP-8) modulated signal.

10. Observe QPSK modulated signal at TP-9 Demodulation:

11. Apply the QPSK modulated output to the demodulator input.

12. Observe the multiplied signal of QPSK and carrier signal, cosine at TP-12 and also observe

the multiplied signal of QPSK and carrier signal, sine atTP-13.

13. Observe the integrated output at I-channel (TP-14) and Q-channel(TP-15)

PSVPEC/ECE/22EC593 ADC
TABULATION:

MODEL GRAPH:

PSVPEC/ECE/22EC593 ADC
 VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE &EXECUTION &RESULT VOICE (30) LEARNED SUBMISSION TOTAL
(5) (10) (10) (5) (10) (40)

RESULT:

PSVPEC/ECE/22EC593 ADC
 EXP NO: 22 STUDY OF DPSK MODULATION TECHNIQUE USING KIT
DATE:

AIM:

APPARATUS REQUIRED:

1. DPSK Trainer Kit

2. Dual Trace oscilloscope

3. Digital Millimeter

4. C.R.O(30MHz)

5. Patch chords.

THEORY:

Differential phase shift keying (DPSK) is a common form of phase modulation that conveys data by
changing the phase of the carrier wave. As mentioned for BPSK and QPSK there is an ambiguity of
phase if the constellation is rotated by some effect in the communications channel through which the
signal passes. This problem can be overcome by using the data to change rather than set the phase.

For example, in differentially encoded BPSK a binary "1" may be transmitted by adding 180° to the
current phase and a binary "0" by adding 0° to the current phase. Another variant of DPSK is

Symmetric Differential Phase Shift keying, SDPSK, where encoding would be +90° for a "1" and
−90° for a "0".

In differentially encoded QPSK (DQPSK), the phase-shifts are 0°, 90°, 180°, −90°
corresponding to data "00", "01", "11", "10". This kind of encoding may be demodulated in the same
way as for non-differential PSK but the phase ambiguities can be ignored. Thus, each received
symbol is demodulated to one of the points in the constellation and a comparator then computes the
difference in phase between this received signal and the preceding one. The difference encodes the
data as described above. Symmetric differential quadrature phase shift keying (SDQPSK) is like
DQPSK, but encoding is symmetric, using phase shift values of −135°, −45°, +45° and +135°.

PSVPEC/ECE/22EC593 ADC
CONNECTION DIAGRAM:

PSVPEC/ECE/22EC593 ADC
PROCEDURE:

1. Connect carrier signal to carrier input of the PSK modulator.

2. Connect data signal from data input of the X-NOR gate.

3. Keep RO in dual mode.

4. Connect CH1 input of the CRO to data signal and CH2 input to the encoded data.

5. Observe the encoded data with respect to data input. The encoded data will be sequence.

6. Actual data signal to be given as

10101010101000001000 7. Encoded data signal

01100010110100001111

8. Now connect CH2 input of the CRO to the DPSK output and CH1 input to the encoded data

and observe the input and output waveforms and plot the same.

9. Compare the plotted waveforms as given in model graph.

PSVPEC/ECE/22EC593 ADC
TABULATION

S.NO SIGNAL AMPLITUDE (V) TIME (ms) FREQUENCY (HZ)

1 Modulating Input

2 Encoded data

3 DPSK signal

4 Demodulated signal

MODEL GRAPH:

PSVPEC/ECE/22EC593 ADC
VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE &EXECUTION &RESULT VOICE (30) LEARNED SUBMISSION TOTAL
(5) (10) (10) (5) (10) (40)

RESULT:

PSVPEC/ECE/22EC593 ADC
 EXP NO: 23 DATE: IMPLEMENTATION OF LINE CODING TECHNIQUES USING KIT

AIM:

To study and implement different types of line coding techniques.

APPARATUS REQUIRED:

Sl. No. List of components Type Range Quantity

- -
Line coding kit
1 1
- -
2 Power cable As Required
- -
3 Patch cords As Required
-
4 CRO 20 MHZ 1

THEORY

Unipolar RZ

In this line code, a binary „ 1' is represented by a non-zero voltage level during a portion of the
bit duration, usually for half of the bit period, and a zero voltage level for rest ofthe bit duration.
A binary „0' is represented by a zero voltage level during the entire bit duration.
The main advantage of unipolar RZ are case of generation requires single power supply and
which allows simple timing recovery. A number of disadvantages exists for thisline code. It has a
non-zero DC component and non-zero DC content, which can load to DCwander. A long string
of „0's will back pulse transition and could load to loss of synchronization. There is no error
detection capability. The bandwidth requirement is also higher than non-return to zero signal.

PSVPEC/ECE/22EC593 ADC
Polar RZ
In this scheme, a binary „1' is represented by alternating positive voltage levels, which return to
zero for a portion of the bit duration, generally half the bit period. A binary,0's is represented by a
negative voltage levels and return to zero for half bit duration.
This code has no DC component and zero DC content, completely avoiding +ve DC wander
problem. Timing recovery is rather easy by squaring, or full-wave rectifying. It requires low
bandwidth. The obvious disadvantage is that the error rate performance is worst. A long string of
0's or 1's could not appear and so improves in synchronization, and two power supplies are
required for this code.

Polar NRZ

In this line code, a binary 1 is represented by a positive voltage +v and a binary 0 is represented
by a negative voltage -v over the full bit period. This code is also referred to as NRZ(L), since a
bit is represented by maintaining a level during its entire period. This code can also be
represented by assigning negative voltage for logic 1 and positive voltage for logic0.
The advantage of polar NRZ includes a low-bandwidth requirements, very good errorprobability,
and great reduced DC because the waveform has a zero DC component. A majordisadvantage of
this code that there is no error detection capability and that a long string of 1's or 0's could result
in loss of synchronization and power supplies are required to generate this code.

PSVPEC/ECE/22EC593 ADC
Bipolar NRZ:

In this scheme, a binary „1' is represented by positive and negative voltage levels in
alternating mark level in full bit period. A binary „0' is represented by a zero voltage levels
during entire bit duration. This code also called as alternate mark inversion (AMI) since 1's are
represented by alternating positive and negative pulses.
This code has no DC component and zero DC content, completely avoiding the DC wander
problem. Because of the alternative polarity pulses for binary 1's, this code has error detection
and hence correction also possible. A long string of 0's could result in loss of synchronization,
and two power supplies are required for this code.

Bipolar RZ

In this scheme, a binary „1' is represented by alternating positive and negative voltage a
levels for a half bit period duration and maintaining zero for other of period. A binary „0' is
represented by a zero voltage levels during entire bit duration. This code also called as AMI. This
code has no DC component and zero DC Conant, completely avoiding the DC wander problem.
Because of alternative polarity pulses for binary 1's, this code has error detection and hence
correction also possible. A long string of 0's could result in loss of synchronization, and two
process supplier and required for this code.

Manchester Coding

In this scheme, a binary 1 is represented by a pulse that has positive voltage during the
first-half of the bit duration and negative voltage during second-half of the bit duration. A binary
„0' is represented by a pulse that has negative voltage during first-half of the bit duration and
positive voltage during second-half of the bit duration.
The advantage of this code includes a zero DC content and so avoiding DC-wandering
problems. The code having alternation positive and negative pulses and so timing recovery is
simple and it has good error rate performance. The main disadvantage of this scheme is larger
bandwidth. It has no error detection possibility.

PSVPEC/ECE/22EC593 ADC
CONNECTION DIAGRAM:

PROCEDURE:

1. Make wiring connection on the VCL 03 kit and simply connect the test points P1 to P8

and P21 to P22 using patch chords provided with this training kit.

2. Ensure that all switches in switched faults block in OFF position and

all potentiometersPOT1 and POT2 in minimum position.

PSVPEC/ECE/22EC593 ADC
3. Keep the input data in terms of 0 & 1

4. Display the modulating signal at test point P1 using a probe on channel1 of

oscilloscope.Increase sine wave amplitude by rotating POT1 in clockwise pp direction and

set sinewave amplitude to 3V and note down.

5. Displays the input square output waveform on channel 2 of oscilloscope and note downthe

waveform, amplitude level of the signal.

6. Replace channel 1 waveform by modulator output serial data (test point P21 and compare it

with the sample signal on channel 2, every sample has been transmitted with corresponding

8- bits of data. Note down the line coding output waveform.

7. Plot all the noted waveforms such as bipolar, polar , Manchester, signal, S/H output and

modulator outputon a linear graph sheet.

8. Replace the channel 2 waveform by digital to analog converter (test point P33)

waveform which is the recovered sampled analog signal, note down the waveform.

Observe the recovered sinewave at test point P34, note down waveforms. Plot all the

notedwaveforms such as DAC signal, and recovered sine wave on a linear graph sheet

TABULATION

S.NO SIGNAL AMPLITUDE(V) TIME(ms) FREQUENCY(HZ)

1 Modulating Input

2 Unipolar RZ

3 Polar RZ

4 Polar NRZ

5 Bipolar NRZ

6 Bipolar RZ

7 Manhester Coding

PSVPEC/ECE/22EC593 ADC
MODEL GRAPH

PSVPEC/ECE/22EC593 ADC
 VIVA QUESTIONS:

AIM & PROGRAM OUTPUT VIVA TOTAL PO’S & PSO TIMELY GRAND
PROCEDURE &EXECUTION &RESULT VOICE (30) LEARNED SUBMISSION TOTAL
(5) (10) (10) (5) (10) (40)

RESULT:

PSVPEC/ECE/22EC593 ADC