Chapter 3 - Multistage Amplifiers
Chapter 3 - Multistage Amplifiers
1
Content
Introduction
Cascade Configuration
Cascode Configuration
Darlington Configuration
Differential Amplifier
2
Introduction
In most applications, a single
transistor amplifier will not be
able to meet the combined
specifications of a given
amplification factor, input
resistance, and output resistance. A generalized three-stage amplifier
BJT
Name Comments
1st stage 2nd stage
Voltage Amp CE CE High Voltage Gain
Cascode CE CB High bandwidth
Op-Amp CE CC High Zin low Zout
Current buffer CB CC Higher Zout than CB/CG
Current buffer CB CE
Not common CB CB
Not common CC CE
Differential Amp CC CB High voltage gain and BW.
Darlington CC CC High current gain
3
Cascade Configuration
4
Cascade Configuration
v Two stage common-emitter
amplifier in a cascade
configuration: small signal
equivalent circuit.
b 1 = 173
b2 = 157
6
Cascade Configuration
Example 1: Determine the small-signal voltage gain of the following multi-transistor
circuit:
5V 5V
𝐼$%
𝐼#" 𝐼!%
𝐼!" 𝐼#%
𝐼$"
7
Cascade Configuration
Example 1: Determine the small-signal voltage gain of the following multi-transistor
circuit:
b 1 = 173
5V 5V
b2 = 157 𝐼#" - 𝐼!%
5V 5V
𝐼$%
𝐼!" 𝐼#"
𝐼!%
𝐼#%
𝑉!" = 0.7𝑉
𝐼$"
𝑅%
𝑉!! = 10× − 5𝑉
𝑅" + 𝑅%
8
Cascade Configuration
Example 1: Determine the small-signal voltage gain of the following multi-transistor
circuit:
𝑉)) = 𝐼)* ×𝑅) + 𝑉)+ + 𝛽* + 1 𝑅+* − 5
b 1 = 173
−1,67 = 𝐼)* ×33.3 + 0.7 + 𝛽* + 1 2 − 5
5V 5V
b2 = 157 𝐼#" - 𝐼!%
⇒ 𝐼)* = 6.9𝜇𝐴; 𝐼,* = 1.19𝑚𝐴
𝐼,*
𝐼$% 𝑔.* = = 46𝑚𝐴/𝑉
𝑉/
𝐼!" 𝐼#"
𝐼!% 5 = 𝐼+- ×𝑅+- + 𝑉+) − 𝑅,* 𝐼,* − 𝐼)- + 5
𝐼#%
𝑉!" = 0.7𝑉
𝐼$"
0 = 𝛽- + 1 𝐼)- ×2 + 0.7 − 5 1.19 − 𝐼)-
0 = 321×𝐼)- − 5.25
-1,67V -5V -5V ⇒ 𝐼)- = 16.35𝜇𝐴; 𝐼,* = 2.58𝑚𝐴
𝐼,-
𝑅% 𝑔.- = = 99𝑚𝐴/𝑉
𝑉!! = 10× − 5𝑉 𝑉/
𝑅" + 𝑅%
9
Cascade Configuration
Example 1: Determine the small-signal voltage gain of the following multi-transistor
circuit:
b 1 = 173 𝑹𝟏 ∥ 𝑹𝟐 ∥ 𝒓𝝅𝟏
𝑮𝒗 = 𝒈𝒎𝟐 𝑹𝑪𝟐 ∥ 𝑹𝑳 𝒈𝒎𝟏 𝑹𝑪𝟏 ∥ 𝒓𝝅𝟐 = 𝟓𝟒𝟗𝟐
𝑹𝟏 ∥ 𝑹𝟐 ∥ 𝒓𝝅𝟏 + 𝑹𝒔
b2 = 157
𝐼,*
𝑔.* = = 46𝑚𝐴/𝑉
𝑉/
𝛽*
𝑟0* = = 3.76𝑘Ω
𝑔.*
𝐼,-
𝑔.- = = 99𝑚𝐴/𝑉
𝑉/
𝛽-
𝑟0- = = 1.58𝑘Ω
𝑔.-
10
Cascade Configuration
Example 1: Determine the small-signal voltage gain of the following multi-transistor
circuit:
12
Cascade Configuration
Example 1: Determine the small-signal voltage gain of the following multi-transistor
circuit:
13
Cascade Configuration
Example 2: Consider the circuit shown in the following figure. The transistor parameters
are 𝑘1* = 0.5mA/𝑉 - , 𝑘1- = 0.2mA/𝑉 - and 𝑉/2* = 𝑉/2- = 1.2𝑉. The Q point is: 𝐼3* =
0.2𝑚𝐴, 𝐼3- = 0.5𝑚𝐴.
Determine the small-signal voltage gain of a multistage cascade circuit.
𝐼3 = 𝑘1 𝑉;7 − 𝑉61 -
1 𝑊
𝑘1 = 𝜇1 𝐶4<
2 𝐿
1
𝑅456 = 𝑅7- ∥
𝑔.-
𝑅81 = 𝑅* ∥ 𝑅-
𝑅7- ∥ 𝑅: 𝑅81
𝐺9 = − 𝑔.* 𝑅3* = −6.14 (𝑉/𝑉)
1 𝑅81 + 𝑅78
𝑅7- ∥ 𝑅: + 𝑔
.-
14
Cascade Configuration
Exercise 1: Consider the circuit shown in the following figure. The transistor parameters
are b = 125, 𝑉)+ (𝑜𝑛) = 0.7𝑉
a. Determine the small-signal voltage gain of the multistage cascade circuit.
b. Determine the input resistance and output resistance.
𝑅+- ∥ 𝑅:
𝐺9 = − ×⋯
𝑅+- ∥ 𝑅: + 𝑟=-
𝑅,* ∥ 𝑟0- + 𝑅+- ∥ 𝑅: 𝛽- + 1
…
𝑅+* + 𝑟=*
= −17.7 (𝑉/𝑉)
15
Cascode Configuration
v In cascode configuration, a Common-
Emitter (or Common-Source) amplifier
drives a Common-Base (or Common-
Gate) amplifier.
16
Cascode Configuration
Cascode Amplifier
18
Cascode Configuration
PSPICE Simulation: Use PSPICE to run simulation for the following CE-CB (cascode) amplifier.
The Beta DC of Q1,Q2 are 162 and 161 respectively. The mid-band gain of the amplifier from
PSPICE is 120. Validate the DC and AC analysis of the amplifier using circuit analysis? Note that
Beta AC gain of Q1, Q2 are 177 and 176 respectively.
19
Cascode Configuration
PSPICE Simulation: It is clear that the high-frequency (HF) 3dB cut-off frequency of the
Cascode amplifier is much higher than that of the circuit in Example 1 (CE-CE Amplifier).
20
Darlington Pair
v In some applications, it would be desirable to have a bipolar
transistor with a much larger current gain than can normally be
obtained.
v A Darlington configuration provides increased current gain.
𝜷𝑫𝑷 = 𝜷𝟏 𝜷𝟐 + 𝜷𝟏 + 𝜷𝟐
𝜷𝑫𝑷 = 𝜷𝟐 + 𝟐𝜷
A Darlington pair configuration
21
Darlington Pair
v The effective small-signal input resistance
of the Darlington pair is:
𝑟()(+,) = 𝛽. 𝑟/. + 𝑟() 012/ 3 ≃ 𝛽. 𝑟/. + 𝛽3 𝑟/3
where:
25𝑚𝑉 25𝑚𝑉
𝑟/. = 𝑟/3 =
𝐼4. 𝐼43
22
Darlington Pair
𝑣4
𝐶" 𝐶%
𝛽" 𝑖&"
𝑣8
⟹ 𝑟8 = = 𝛽* + 1 𝑟=* + 𝛽- + 1 𝑟=- ≅ 𝜷𝟏 𝒓𝒆𝟏 + 𝜷𝟐 𝒓𝒆𝟐
𝑖>*
𝑉/ 𝑉/
𝑟=* = 𝑟=- = 𝐼+- = 𝛽- + 1 𝐼+* ⟹ 𝑟=* = 𝛽- + 1 𝑟=- ≅ 𝛽- 𝑟=-
𝐼+* 𝐼+-
⟹ 𝑟8 ≅ 𝜷𝟏 𝒓𝒆𝟏 + 𝜷𝟐 𝒓𝒆𝟐 ≅ 𝟐𝜷𝟏 𝜷𝟐 𝒓𝒆𝟐
⟹ 𝑟4 = 𝑅,
23
Darlington Pair
𝑣4
𝐶" 𝐶%
𝛽" 𝑖&"
𝑣4 𝛽* + 𝛽- 𝛽* + 1
𝐴@ = = −𝑅,
𝑣8 𝛽* + 1 𝑟=* + 𝛽- + 1 𝑟=-
24
Darlington Pair
25
Darlington Pair
𝑅81 = 𝑅* ∥ 𝑅- ∥ 𝑟0* 𝑟=- 𝑅,
𝑅456 = 𝑅+- ∥ 𝑟=A + + ≈ 𝑟=A
𝛽A + 1 𝛽- + 1 𝛽A + 1
30
Differential Amplifier – DC Analysis
v Assume Q1 and Q2 are matched.
𝐼F
𝐼+* = 𝐼+- =
2
𝐼FG
𝑉,* = 𝑉,- = 𝑉 − 𝑅,
2
31
Diffrential Amp – Small Signal Operation
v If 𝑣8H ≠ 0:
𝐼,F
𝑣,* = 𝑉 G − + Δ𝐼 𝑅,
2
G
𝐼,F
𝑣,- = 𝑉 − − Δ𝐼 𝑅,
2
32
Diffrential Amp – Small Signal Operation
𝑉E* = −𝑔. 𝑉0* 𝑅,
v If 𝑣8H ≠ 0:
𝑉E- = −𝑔. 𝑉0- 𝑅,
v Since the two transistors are biased at the
same quiescent current:
𝑽𝝅𝟏 𝑽𝝅𝟐 𝑽𝒆
+ 𝒈𝒎 𝑽𝝅𝟏 + 𝒈𝒎 𝑽𝝅𝟐 + =
E1= E2 𝒓𝝅 𝒓𝝅 𝑹𝒐
𝟏+𝜷 𝟏+𝜷 𝑽𝒆
or: 𝑽𝝅𝟏 + 𝑽𝝅𝟐 =
𝒓𝝅 𝒓𝝅 𝑹𝒐
𝟏+𝜷 𝟏+𝜷 𝑽𝒆
𝑽𝝅𝟏 + 𝑽𝝅𝟐 =
𝒓𝝅 𝒓𝝅 𝑹𝒐
B1 C1 C2 B 𝑽𝝅𝟏 𝑽𝝅𝟐 𝑽𝒆
2 𝟏+𝜷 + =
𝒓𝝅 𝒓𝝅 𝑹𝒐
𝑽𝒃𝟏 − 𝑽𝒆 𝑽𝒃𝟐 − 𝑽𝒆 𝑽𝒆
𝟏+𝜷 + =
E1= E2 𝑹𝑩 + 𝒓𝝅 𝑹𝑩 + 𝒓𝝅 𝑹𝒐
𝟏+𝜷 𝑽𝒆
v Finally we have: 𝑽𝒃𝟏 + 𝑽𝒃𝟐 − 𝟐𝑽𝒆 =
𝒓𝝅 + 𝑹𝑩 𝑹𝒐
𝑽𝒃𝟏 + 𝑽𝒃𝟐
or: 𝑽𝒆 =
𝒓 + 𝑹𝑩
𝟐+ 𝝅
𝟏 + 𝜷 𝑹𝒐
34
Diffrential Amp – Small Signal Operation
v If 𝑣8H ≠ 0: 𝑽𝒃𝟏 + 𝑽𝒃𝟐
𝑽𝒆 =
𝒓 + 𝑹𝑩
𝟐+ 𝝅
𝟏 + 𝜷 𝑹𝒐
v One-sided output:
B1 C1 C2 B
2
𝒗𝒅 𝒗𝒅
𝑽𝒃𝟏 = 𝒗𝒄𝒎 + 𝑽𝒃𝟐 = 𝒗𝒄𝒎 −
𝟐 𝟐
𝑟0
E1= E2 𝑉E- = −𝑔. 𝑉0- 𝑅, = −𝑔. 𝑅, 𝑉 − 𝑉=
𝑅) + 𝑟0 >-
𝑟0
𝑉E* = −𝑔. 𝑉0* 𝑅, = −𝑔. 𝑅, 𝑉 − 𝑉= = 𝑨𝒅 𝑣H + 𝑨𝒄𝒎 𝑣E.
𝑅) + 𝑟0 >*
𝛽𝑅, 𝒗𝒅 𝑽𝒃𝟏 + 𝑽𝒃𝟐 𝜷𝑹𝑪
=− 𝒗𝒄𝒎 + − 𝑨𝒅 = −
𝑟0 + 𝑅) 𝟐 𝟐 + 𝒓𝝅 + 𝑹𝑩 𝟐 𝒓𝝅 + 𝑹𝑩
𝟏 + 𝜷 𝑹𝒐
−𝜷𝑹𝑪
𝜷𝑹𝑪 −𝜷𝑹𝑪 𝑨𝒄𝒎 =
=− 𝑣 + 𝑣 𝒓𝝅 + 𝑹𝑩 + 𝟐 𝟏 + 𝜷 𝑹𝒐
𝟐 𝒓𝝅 + 𝑹𝑩 H 𝒓𝝅 + 𝑹𝑩 + 𝟐 𝟏 + 𝜷 𝑹𝒐 E.
35
Diffrential Amp – Small Signal Operation
v If 𝑣8H ≠ 0: v Two-sided output:
𝒗𝒅 𝒗𝒅
𝑽𝒃𝟏 = 𝒗𝒄𝒎 + 𝑽𝒃𝟐 = 𝒗𝒄𝒎 −
𝟐 𝟐
B1 C1 C2 B
2 𝑟0
𝑉E* = −𝑔. 𝑉0* 𝑅, = −𝑔. 𝑅, 𝑉 − 𝑉=
𝑅) + 𝑟0 >*
𝑟0
𝑉E- = −𝑔. 𝑉0- 𝑅, = −𝑔. 𝑅, 𝑉 − 𝑉=
𝑅) + 𝑟0 >-
E1= E2
𝑟0 𝑟0
𝑉4 = 𝑉E- − 𝑉E* = −𝑔. 𝑅, 𝑉>- − 𝑉= + 𝑔. 𝑅, 𝑉 − 𝑉=
𝑅) + 𝑟0 𝑅) + 𝑟0 >*
𝑟0 𝜷𝑹𝑪
= 𝑔. 𝑅, 𝑉 − 𝑉>- = 𝒗 = 𝑨𝒅 𝒗𝒅
𝑅) + 𝑟0 >* 𝒓𝝅 + 𝑹𝑩 𝒅
𝜷𝑹𝑪
𝑨𝒅 = 𝑨𝒄𝒎 = 𝟎
𝒓𝝅 + 𝑹𝑩
36
Diffrential Amp – Small Signal Operation
v Two-sided output: Effect of RC mismatch
𝑉4 = 𝑉E- − 𝑉E*
𝑨𝒅 = 𝒈𝒎 𝑹𝑪
𝟏 𝚫𝑹𝑪
𝑨𝒄𝒎 = 𝒈𝒎 𝟐𝚫𝑹𝑪 ≈
𝟐 𝟏 + 𝜷 𝑹𝒐 𝑹𝒐
𝟏+
𝒓𝝅
v The Common Mode Rejection Ratio (CMRR) is:
𝑨𝒅 𝒈𝒎 𝑹𝒐
𝑪𝑴𝑹𝑹 = =
𝑨𝒄𝒎 𝚫𝑹𝑪 ⁄𝑹𝑪
37
Operational Amplifiers
v Practical transistor amplifiers consist of a number of stages connected in cascade.
v In addition to providing gain, the first (or input) stage is usually required to:
§ Provide a high input resistance.
§ In a differential amplifier the input stage must also provide large CMRR.
§ The middle stages of an amplifier cascade is to provide the bulk of the voltage gain.
§ The middle stages convert the signal from differential mode to single-ended mode.
§ The middle stages also shift the DC level of the signal in order to allow the output
signal to swing both positive and negative .
§ The last (or output) stage of an amplifier is to provide a low output resistance.
v In order to illustrate the circuit structure an method of analysis, two examples: a CMOS
Op-Amp and a bipolar Op-Amp will be investigated.
38
Diffrential Amp
39
A Bipolar OpAmp
Current Source
Differential Amplifier
Conversion from
differential to single-
ended
Shifting DC level
41
A Bipolar OpAmp – DC Analysis
Example 2:
a. Perform DC Analysis of
the bipolar Op-Amp.
b. Determine the small-
signal voltage gain, input
resistance and output
resistance of the circuit.
Rid = 20.2kW
Ro = 152W
GV = 8513
42
Exercise
43
Q&A
45