Electronic Devices

MOS Field Effect Transistors

BITS Pilani, K K Birla Goa Campus

MOSFETs: Devices with MOSCAP as control element

Channel formation and conduction is

primarily governed by the MOS
structure in the channel region
BITS Pilani, K K Birla Goa Campus
Understanding the working of a MOSFET
Insulator VGS = 0
VDS = 0
Gate(G)
Drain(D) Source(S)
n+ n+
n+ n+ p-Si
p-Si VSB = 0
Substrate (B)
n-channel MOSFET (nMOS)
EC EC
EF

EV EV

No conduction between D and S

BITS Pilani, K K Birla Goa Campus
Understanding the working of a MOSFET
Accumulation (high
hole density)
VGS = 0 VGS < 0
VDS ↑ VDS ↑

n+ n+ n+ n+

p-Si p-Si
VSB = 0 VSB = 0

EC EC
EF
EV EV
No conduction between D and S
BITS Pilani, K K Birla Goa Campus
Understanding the working of a MOSFET Inversion
(e− channel)
VGS > VT
VDS ↑

n+ n+
e+
ID p-Si
VSB = 0

EC EC

EV EV

Conduction between D and S

BITS Pilani, K K Birla Goa Campus 𝐼
Understanding the working of a MOSFET
𝐼𝐷 Pinch-off
Inversion
(e− channel) 𝑉𝐺𝑆3
VGS > VT
VDS ↑ 𝑉𝐺𝑆2
𝑉𝐺𝑆1
n+ n+ 𝑉𝐺𝑆3 > VGS2 > VGS1 > VT
e+
ID p-Si 𝑉𝐷𝑆
Output characteristics
𝐼𝐷
VSB = 0
𝑉𝐷𝑆
Conduction between D and S

Transfer characteristics
𝑉𝑇𝐻 𝑉𝐺𝑆
BITS Pilani, K K Birla Goa Campus
Output characteristics: Channel v/s VDS
What we want: Gate voltage should decide whether channel is formed or not
Drain voltage should only cause output current without disturbing the
channel
G (Gate)
S (Source) M D (Drain)
O
n+ S n+ n+ regions → no
potential drop

p-Si

B (Body terminal)

BITS Pilani, K K Birla Goa Campus

Output characteristics: Channel v/s VDS
What we want: Gate voltage should decide whether channel is formed or not
Drain voltage should only cause output current without disturbing the
channel
G (Gate)
S (Source) M D (Drain)
O
S n+ regions → no
potential drop

p-Si

B (Body terminal)

BITS Pilani, K K Birla Goa Campus

Output characteristics: Channel v/s VDS
What we want: Gate voltage should decide whether channel is formed or not
Drain voltage should only cause output current without disturbing the
channel
G

S D n+ regions → no
potential drop

p-Si

B (Body terminal)

BITS Pilani, K K Birla Goa Campus

Output characteristics: Channel v/s VDS
What we want: Gate voltage should decide whether channel is formed or not
Drain voltage should only cause output current without disturbing the
channel VGS> VT As 𝑉𝐺𝑆 > 𝑉𝑇 → inversion → An n-type
silicon connecting 𝑛+ drain and source
→ resistor
S
D
As VGS ↑ → 𝑄𝑛 ↑ → 𝑅 ↓
𝑄𝑛 is the inversion charge density
𝐼𝐷

p-Si VDS Increasing VGS

B (Body terminal)
𝑉𝐷𝑆

BITS Pilani, K K Birla Goa Campus

Output characteristics: Channel v/s VDS
What happens as you increase the drain Remember the condition for channel
voltage? formation or inversion?
VGS ↑ → A voltage drop of 𝑉𝑇 has to happen
S between the gate and the
D
semiconductor
→ Source is grounded → Whatever you
apply at gate → drops between gate
and semiconductor
p-Si VDS
→ Drain → As voltage is increased → the
B (Body terminal) effective potential drop across the
gate-semiconductor reduces

BITS Pilani, K K Birla Goa Campus

Output characteristics: Channel v/s VDS
What happens as you increase the drain Remember the condition for channel
voltage? formation or inversion?
VGS ↑ → A voltage drop of 𝑉𝑇 has to happen
S between the gate and the
D
semiconductor
→ Source is grounded → Whatever you
apply at gate → drops between gate
and semiconductor
p-Si VDS
→ Drain → As voltage is increased → the
B (Body terminal) effective potential drop across the
gate-semiconductor reduces

BITS Pilani, K K Birla Goa Campus

Output characteristics: Channel v/s VDS
What happens as you increase the drain
voltage?
VGS ↑
S
D

p-Si VDS

B (Body terminal)

BITS Pilani, K K Birla Goa Campus

Output characteristics: Channel v/s VDS
What happens as you increase the drain
As 𝑉𝐷𝑆 is increased → The channel
voltage?
potential near the drain end reduces →
VGS ↑
the electron density goes down
S
D
What happens when 𝑉𝐷𝑆 = 𝑉𝐺𝑆 − 𝑉𝑇 ?
The voltage drop across the gate-
semiconductor near drain
p-Si VDS = 𝑉𝐺𝑆 − 𝑉𝐷𝑆 < 𝑉𝑇
B (Body terminal) → Channel pinches off near the drain!!

BITS Pilani, K K Birla Goa Campus

Output characteristics: Channel v/s VDS
What happens as you increase the drain
As 𝑉𝐷𝑆 is increased → The channel
voltage?
potential near the drain end reduces →
VGS ↑
the electron density goes down
S
D
What happens when 𝑉𝐷𝑆 = 𝑉𝐺𝑆 − 𝑉𝑇 ?
The voltage drop across the gate-
semiconductor near drain
p-Si VDS = 𝑉𝐺𝑆 − 𝑉𝐷𝑆 < 𝑉𝑇
B (Body terminal) → Channel pinches off near the drain!!
→ 𝐼𝐷 ceases to increase or saturates
beyond this particular drain voltage
BITS Pilani, K K Birla Goa Campus
Output characteristics: Channel v/s VDS
What happens as you increase the drain
voltage?
VGS ↑
S
D

p-Si VDS

B (Body terminal)

BITS Pilani, K K Birla Goa Campus

Output characteristics: Channel v/s VDS
What happens when 𝑉𝐷𝑆 ≫ 𝑉𝐺𝑆 − 𝑉𝑇 ?

VGS ↑
S
D
E-field

p-Si VDS

B (Body terminal) VGS - VTH Assumption that Δ𝐿 ≪ 𝐿

𝐿
Δ𝐿
BITS Pilani, K K Birla Goa Campus