Chapter two

Applied Electronics II

Differential Amplifiers
 Introduction (1)

 In conventional amplifiers, the signal is

applied at single input terminal and
amplified output is obtained at single
output terminal.
 However, we can design an amplifier
circuit that accepts two input signals and
amplifies the difference between these
two signals, called a Differential
Amplifier (DA).

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 Introduction (2)
 The differential amplifier (DA) is a
type of electronic amplifier that
amplifies the difference between two
input voltages
 Output is ideally proportional to
the difference between the two
voltages.
 It is an analog circuit with two-input
terminals using at least two transistors
and two output terminals.

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Differential amplifier is development
 The two transistors Q1 and Q 2 have identical characteristics. The
resistances of the circuits are equal, i.e. R E1 = R E2 ,R C1 =
R C2 and the magnitude of +VCC is equal to the magnitude of
−VEE .

Fig. 3
 To make a differential amplifier, the two circuits are connected
as shown in fig.3. The two +VCC and −VEE supply terminals are
made common because they are same.
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Differential amplifier is development(2)
 The two emitters are also connected and the parallel
combination of R E1 and R E2 is replaced by a resistance R E .
The two input signals v1 and v2 are applied at the base
of Q1 and at the base of Q2. The output voltage is taken
between two collectors. The collector resistances are
equal and therefore denoted by R C = R C1 = R C2
 Ideally, the output voltage is zero when the two inputs are
equal. When v1 is greater then v2 the output voltage with
the polarity shown appears. When v1 is less than v2, the
output voltage the opposite polarity

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DA configurations
 The differential amplifiers are of different configurations. The four
differential amplifier configurations are following:
 Dual input, balanced output differential amplifier ( DIBO).
 Dual input, unbalanced output differential amplifier(DIUO).
 Single input balanced output differential amplifier(SIBO).
 Single input unbalanced output differential amplifier(SIUO )

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 Four differential Amplifier Configuration
These configuration are classified based on the number of input
signals used and the way an output voltage is measured. If use two
input signals, the configuration is said to be dual input, otherwise it is
a single input configuration . The equality of the matched
circuit components makes the DA circuit arrangement
completely symmetrical.

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DC Analysis for DIBO DA
 To obtain the operating point (ICC and VCEQ) for differential
amplifier dc equivalent circuit is drawn by reducing the input
voltages v1 and v2 to zero as shown in fig. below.

The internal resistances of the input

signals are denoted by RS because
RS1= RS2. Since both emitters biased
sections of the different amplifier are
symmetrical in all respects, therefore,
the operating point for only one
section need to be determined. The
same values of ICQ and VCEQ can be
used for second transistor Q2.
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DC Analysis for DIBO DA(2)
 Applying KVL to the base emitter loop of the transistor Q1.

The voltage at the emitter of Q1 is approximately equal to

-VBE if the voltage drop across R is negligible. Knowing the
value of IC the voltage at the collector VC is given by 9
DC Analysis for DIBO DA(2)

 𝑉𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶
 𝑉𝐶𝐸 = 𝑉𝐶 − 𝑉𝐸 , 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 + 𝑉𝐵𝐸
 𝑉𝐶𝐸 = 𝑉𝐶𝐶 + 𝑉𝐵𝐸 − 𝐼𝐶 𝑅𝐶 ………..(2)
 Using eqn(1) and eqn(2) , VCEQ and ICQcan be determined .
Example: The following specifications are given for the dual
input, balanced-output differential amplifier of fig.1: RC =
2.2kΩ, RB = 4.7kΩ, Rin1= Rin2= 50 Ω , +VCC = 10V, -VEE = -10 V,
𝛽dc=100 and VBE = 0.715V. Determine the operating points (ICQ
and VCEQ) of the two transistors.

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AC Analysis for DIBO DA(1)
 To find the voltage gain Ad and the input resistance Ri of the differential
amplifier, the ac equivalent circuit is drawn using r-parameters as shown in
fig below. The dc voltages are reduced to zero and the ac equivalent of CE
configuration is used.

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AC Analysis for DIBO DA(2)
 Since the two dc emitter currents are equal. Therefore,
resistance r'e1 and r'e2 are also equal and designated by r'e .
This voltage across each collector resistance is shown 180°
out of phase with respect to the input voltages v1 and v2.
This is same as in CE configuration. The collector C2 is
assumed to be more positive with respect to collector C1
even though both are negative with respect to ground.
 Applying KVL rule for both loop for above diagram, we have

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AC Analysis for DIBO DA(3)
 Again, assuming 𝑅𝑠1 𝛽and 𝑅𝑠2 𝛽 are very small in comparison with RE and re'
and therefore neglecting these terms, we have,

The output voltage VO is given by

𝑉0 =𝑉𝐶2 − 𝑉𝐶1
=−𝑅𝐶 𝑖𝐶2 − (−𝑅𝐶 𝑖𝐶1 ) = 𝑅𝐶 (𝑖𝐶1 −𝑖𝐶2 ) = 𝑅𝐶 (𝑖𝑒1 −𝑖𝑒2 )
Substituting the current expression 𝑅𝐶
𝑉0 = 𝑉1 − 𝑉2 ′
in here and rearranging the 𝑟𝑒
expression we have the output 𝐴𝑑 =
𝑉𝐶 𝑅𝐶
=
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voltage as 𝑉𝑑 𝑟 ′ 𝑒
 Differential Input Resistance (1)
 Differential input resistance is defined as the equivalent
resistance that would be measured at either input terminal with
the other terminal grounded. This means that the input
resistance Ri1 seen from the input signal source v1 is determined
with the signal source v2 set at zero. Similarly, the input signal v1
is set at zero to determine the input resistance Ri2 seen from the
input signal source v2. Resistance RS1 and RS2 are ignored because
they are very small

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Differential Input Resistance (2)

 Substituting the expression of ie1 from above eqn we have,

Similarly for Ri2

The factor of 2 arises because the re' of each

transistor is in series. To get very high input
impedance with differential amplifier is to use
Darlington transistors. Another ways is to use FET.

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Differential Output Resistance (1)
 Output resistance is defined as the equivalent resistance that would be
measured at output terminal with respect to ground. Therefore, the output
resistance RO1 measured between collector C1 and ground is equal to that of
the collector resistance RC. Similarly RO2 will be collector resistor RC.
 RO1 = RO2 = RC
 The current gain of the differential amplifier is undefined. Like CE
amplifier the differential amplifier is a small signal amplifier. It is
generally used as a voltage amplifier and not as current or power
amplifier.
 Example : The following specifications are given for the dual input, balanced-
output differential amplifier: RC = 2.2 kΩ, RB = 4.7kΩ, Rin1 = Rin2 = 50Ω,
+VCC= 10V, -VEE = -10 V, βdc =100 and VBE = 0.715V.
a. Determine the voltage gain.
b. Determine the input resistance
c. Determine the output resistance.
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Differential Output Resistance (2)
 The operating point of the transistors from previous example we have
ICQ = 0.988 mA VCEQ=8.54V

Therefore, substituting the known values in voltage gain

equation
 The input resistance seen from each input source is given
by
 The output resistance seen looking back into the circuit
from each of the two output terminals is given by
Ro1 = Ro2 = 2.2 k Ω
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Differential Output Resistance (3)
 Example - 2
For the dual input, balanced output differential amplifier of Example-1:

a. Determine the output voltage (vo) if vin1 = 50mV peak to peak (pp) at 1 kHz
and vin2 = 20 mV pp at 1 kHz.
b. What is the maximum peal to peak output voltage without clipping?

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Inverting & Non-inverting Inputs(2)
 In differential amplifier the output voltage 𝑉0 is given by
 𝑉0 = 𝐴𝑑 (𝑉1 − 𝑉2 ) When 𝑉2 = 0, 𝑉0 = 𝐴𝑑 𝑉1 and When 𝑉1 = 0 , 𝑉0 =−𝐴𝑑 𝑉2

 Therefore the input voltage 𝑉1 is called the non inventing

input because a positive voltage 𝑉1 acting alone produces a
positive output voltage 𝑉0 . Similarly, the positive voltage 𝑉2
acting alone produces a negative output voltage hence 𝑉2 is
called inverting input. Consequently B1 is called non-
inverting input terminal and B2 is called inverting input
terminal.

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 Inverting & Non-inverting Inputs(2)
When only one output terminal is available, the phase of the output of
single-ended input DA depends on which input receives the input
signal.

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Common mode Gain(1)
 A common mode signal is one that drives both inputs of a differential
amplifier equally. The common mode signal is interference, static and
other kinds of undesirable pickup etc.
 If a differential amplifier is operating in an environment with lot of
electromagnetic interference, each base picks up an unwanted
interference voltage. If both the transistors were matched in all respects
then the balanced output would be theoretically zero
 It discriminates against common mode input signals. In other words, it
refuses to amplify the common mode signals.

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Common mode Gain(2)
 The practical effectiveness of rejecting the common signal depends on the
degree of matching between the two CE stages forming the differential
amplifier. In practical differential amplifier, the output depends not only on
difference signal but also upon the common mode signal (average).
1
𝑉𝐶 = 𝑉1 + 𝑉2
2
The output voltage, under the condition that input 2 (1) is grounded.
, Since 𝑉𝑜1 = 𝐴1 𝑉1 − 0 and 𝑉𝑜2 = 𝐴2 −𝑉2
 Where A1 & A2 are the voltage amplification

The voltage gain for the

difference signal is Ad and for
the common mode signal is AC.22
Common mode rejection ratio (CMRR).
 The ability of a differential amplifier to reject a common mode signal is
expressed by its common mode rejection ratio (CMRR). It is the ratio of
differential gain Ad to the common mode gain AC.

Therefore, the differential amplifier should be designed so

that ρis large compared with the ratio of the common mode signal
to the difference signal. If ρ = 1000, 𝑉𝐶 = 1𝑚𝑉, 𝑉𝑑 = 1𝑚𝑉, then

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Dual Input, Unbalanced Output Differential
Amplifier(DIUO):
 In this case, two input signals are given however the
output is measured at only one of the two-collector w.r.t.
ground .
 DC analysis is exactly same as that DIBO

 AC Analysis:
 The output voltage gain in this case is given by

 Since at the output there is a dc error voltage, therefore,

to reduce the voltage to zero, this configuration is
normally followed by a level translator circuit.
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Differential amplifier with swamping
resistors
 By using external resistors R′ 𝐸 in series with each emitter, the dependence of
voltage gain on variations of r ′ 𝑒 can be reduced. It also increases the linearity
range of the differential amplifier.

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Biasing of Differential Amplifiers
Constant Current
 In the dc analysis of differential amplifier, we have seen that the emitter
current IE depends upon the value of 𝛽𝑑𝑐 . To make operating point stable
𝐼𝐸𝑄 current should be constant irrespective value of 𝛽𝑑𝑐 .

This means that 𝑅𝐸 should very high and also

maintain 𝐼𝐸𝑄 constant. This can be achieved
by having constant current biasing through
Q3 as shown in fig . Applying KVL in base of
Q3, we have

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Fig. DIBO constant current biased circuit
Constant Current Biasing (2)
 Because the two halves of the differential amplifiers are symmetrical, each
has half of the current IC3.

 The collector current, IC3 in transistor Q3 is fixed because no signal is injected

Into either the emitter or the base of Q3
 Besides supplying constant emitter current, the constant current bias also
provides a very high source resistance since the ac equivalent of the dc source
is ideally an open circuit. Therefore, all the performance equations obtained
for differential amplifier using emitter bias are also valid.

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Constant Current Biasing (3)

 As seen in the IE expressions, current depends upon the VBE3. If the

temperature changes, VBE changes and current IE also changes. To improve
the thermal stability, a diode is placed in series with the resistance R1as
shown in the figure 2.

Assuming Ib3≅ 0

Substituting equation
(*) in equation(**)

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Constant Current Biasing (4)

 By applying KVL to the base circuit of Q3.

Thus, the current IE3 is constant and

independent of the temperature due to the
added diode D. In the absence of D the
current would vary with temperature
because VBE3 decreases approximately
by 2mV/° C
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Constant Current Biasing (5)
 Zener diode can be used in place of the diodes and resistance as shown in
the figure 3. Zeners are available over the wide range of voltages and can
have the matching temperature coefficient
The voltage at base of transistor QB is

Figure 3

Value of R2 is selected so that I2 » 1.2 IZ(min) here IZ is minimum current

needed to cause the zener diode to conduct in reverse region, which is to
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block the rated voltage VZ.
1

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Example: Design a zener constant current bias circuit as shown in
fig. 5 according to the following specifications. (a). Emitter current -IE =
5 mA (b). Zener diode with Vz = 4.7 V and Iz = 53 mA. (c). βac = βdc =
100, VBE = 0.715V (d). Supply voltage - VEE = - 9 V.
Applying KVL

Practically we use RE = 820 kΩ

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2

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34
3

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