An Artificial Intelligence-Based Constraint Network
An Artificial Intelligence-Based Constraint Network
To cite this article: ROBERT E. YOUNG , ARTHUR GREEF & PETER O'GRADY (1992) An artificial intelligence-based
constraint network system for concurrent engineering, International Journal of Production Research, 30:7, 1715-1735, DOI:
10.1080/00207549208948116
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INT. J. PROD. RES., 1992, VOL. 30, No.7, 1715-1735
This paper presents a new approach to concurrent engineering, namely the use of
artificial intelligence constraint networks to advise the designer on improvements
that can be made to the design from the perspective of the product's life-cycle. The
difficultiesassociated with performing concurrent engineering are reviewed,and the
various approaches to concurrent engineering are discussed.The requirements for a
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1. Introduction
Concurrent engineering (sometimes called simultaneous engineering or life-cycle
engineering) involves the simultaneous consideration of product, function, design,
materials, manufacturing processes and cost, taking into account later-stage consider-
ations such as testability, serviceability, quality, reliability and redesign. In such a
manner, life-cycle factors are brought into consideration as early as possible in the life-
cycle, that is at the design stage.
This is of considerable importance to the manufacturing industry since it is at the
design stage that the life-cycle requirements are defined. After a product has passed
from the design stage it is then often too late to make significant changes to reduce life-
cycle expenditures. For example, it has been reported that upwards of 70% of a
product's manufacturing cost is dictated by design decisions (Andreasen et al. 1983,
Maddux and Jain 1986, National Science Foundation 1987). The experience of Ford
Motor Company illustrates this point: Ford estimates that although product design
constitutes 5% of total product cost, design's influence on product cost is 70% (Plastics
World, December 1988).
Although the evidence is largely anecdotal, it appears that concurrent engineering is
not generally performed well in western manufacturing industry in that design is
carried out without due regard to the various life-cycle factors. This can result in
designs that are expensive to manufacture, test, service, maintain and redesign.
This paper presents a new approach to concurrent engineering, namely the use of
artificial intelligence constraint networks to advise the designer on improvements that
can be made to the design from the perspective of the product's life-cycle.The format of
the paper is as follows: the difficulties associated with performing concurrent
engineering are reviewed, the various approaches to concurrent engineering are
discussed and the requirements for a system to support concurrent engineering are
indicated. An overview of constraint networks is given and this leads into a description
of SPARK, an artificial intelligence constraint network system for concurrent
engineering. The operation of SPARK is illustrated by considering an example printed
wiring board (PWB) application.
Ruizand Koenigsberger 1970, Harfmann 1987,Baxter 1984, Peck 1973, Runciman and
Swift 1985).
2.1. Characteristics of the design process
Design is thought to involve the separation of the design problem into stages. These
stages are conceptual design, detailed design, and analysis and evaluation. It is also
thought that designers divide up each stage into a number of subproblems. Design is
then carried out by iteratively solving each subproblem until the overall design is
thought to be adequate. H problems occur then the designer backtracks to alter the
solutions to individual subproblems. It is this division into stages and the further
division into subproblems that is the first source of difficulty in achieving integrated
concurrent engineering in that this division of the design problem can result in 'sub-
optimization' where the designer concentrates on narrow issues while ignoring the
overall concurrent engineering problem (Chieng and Hoeltzel1986, 1987, Rosen et al.
1986).
2.2. Volume and variety of life-cycle knowledge
The second source of difficulty in achieving integrated concurrent engineering is the
volume and variety of the knowledge required to consider life-cycle factors. The
knowledge required is voluminous since it will include design, manufacturing,
manufacturing control, testing, servicing and redesign. Furthermore the required
knowledge will have a large degree of variety, including both quantitative and
qualitative knowledge. The problem is compounded in that much of the life-cycle
knowledge is interrelated. This large volume and variety oflife-cycle knowledge results
in designers developing their knowledge in relatively narrow functional domains while
ignoring the rest of the life-cycle knowledge (Swift and Doyle 1988, Kalay 1987, Kroll
. et al. 1988, Bishop 1986, Dieter 1983, Eversheim and Muller 1984, Murthy and
Addanki 1988, Medland 1986).
The overall result of these three major sources of difficulties is that designers
frequently defer considering life-cycle requirements until late in the design process
(Gairola 1986), or abdicate responsibility to the relevant life-cycle function within the
company (Evans 1988, Riley 1983).
One way of integrating design and life cycle is by the use of design teams. This
approach requires early and frequent interaction between design and the other life-
cycle functions. It has traditionally been accomplished with post-design reviews which
are usually considered to be less effective than reviewing the design while it is being
developed (Heller 1971). A better approach is to have team members actually design the
product and process together (Maddux and Jain 1986,Evans 1988). Group approaches
do provide alternate perspectives to the design problem, and the group approaches can
also be useful for initial idea generation. However, group decision making (for creative
tasks, in particular) is difficult (Harfmann 1987). The operation of design teams would
be further improved by the use of suitable techniques and systems that advise on good
designs from the life-cycle perspective.
3.2. Handbooks
The most conventional approach to advising on design is to provide compiled life-
cycle experience in handbooks, standards, and design guides. The designer is then
responsible for considering and integrating this documented information into design
decisions (Bralla 1986,Trucks 1987, Stein and Strasser 1986). However, this approach
has not been entirely satisfactory since the designers still have to cope with the high
volume, variety and interdependence associated with life-cycle knowledge.
operate, especially for the medium/small volume producer. There are also difficulties
associated with ensuring that team members have the necessary up-to-date expertise.
As an alternative to design teams, we therefore propose the use of a computerized
support tool to bring up-to-date life-cycle information to the designer in a readily
usable form. This support tool will, in effect, emulate a good design team by suggesting
changes that will improve the design from the life-cycle perspective. The requirements
for such a support tool are rigorous and encompass a number of substantial research
issues.
Designers can typically undertake the design process by a number of routes
depending on such factors as the information available and the application. Personal
preference also plays a part. The support tool should therefore be flexible enough to
allow the design problem to be approached from a variety of viewpoints.
Design may also have to be initiated in the absence of complete information. Indeed
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it may be well into the final design stages ..before full information is available. The
support tool should therefore allow the designer to design in the absence of complete
information.
When it is considered that concurrent engineering includes design, manufacturing,
testing and redesign, then it can be readily seen that the information requirements are
immense. The support tool should therefore be capable of handling this large volume
and variety of information.
The information may come from a variety of sources including the user, domain
experts, CAD and database management systems. The support tool should therefore
have a good user interface and readily link to CAD and database management systems.
It should also be able to explain itself in a manner comprehensible to humans.
As a product goes through its life-cycle, it may have to be redesigned. If the
information is kept as to why design decisions were made, then this can significantly
improve the redesign process. A further requirement for the concurrent engineering
support tool is therefore that it should support such design audits.
Overall, therefore, the following are the principal requirements of a computerized
system to support concurrent engineering (Bowen and O'Grady 1989):
• it should be flexibleenough to allow the design problem to be approached from a
variety of viewpoints;
• it should allow the designer to design despite the absence of complete
information;
• it should handle the large volume, variety, and interdependence of life-cycle
information;
• it should readily interface to database management and CAD systems;
• it should have a good user interface and be able to explain itself in a manner
comprehensible to humans;
• it should support design audits.
5. Constraint networks
It is widely accepted that design activities can be regarded as involving search to
satisfy constraints (Gross et at. 1987, Wu 1988). This model of design has been applied
to a wide variety of design domains including electrical circuits (Tong 1987),
mechanical design (Ishii et at. 1988) and VLSI design (Wu 1988).
A constraint network is a collection or constraints which are interconnected by ,
virtue ofsharing variables. An example is shown in Fig. 1.The variables (ovals in Fig. 1) ,
....,
~
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Minimum ca.lallatedbolediameter
• nomiDa.I lead diameter + :z • platinl thicmc:ss
+ oYe1Sizc of insenionbole y
hoIe"",,"_
il 4 onJyif pLlting thickness. 0 ~
::0;,
unsupponed
C§0f~)hoIe_ c::
1 0.6' s:
....ppomd 2 O.so
unsupponed 3 <E
r
0.33
uQ$Upponed
uasvppol1ec1
•s 0.25
0.10
~
placed lima 1 0.33 ~
pla1ed -lima 2 0.33 Determine numberof
pllted-lima 3 0.25 existing holesacs from
plated=tlma • tbe Iis1 of existing bole
0
0.10
pla~ed}hru j 0.10 ,;",
mk U the drillsize: for
';;
hole is in the lisr: of
standard drillsizes
then put it in the
Minimum ltd bolediameter
• < drill me for bole list of C<isting hoi. ~
sizes for the PWB
Figure I. An example constraint network for selecting component lead hole sizes for printed wiring boards.
A I constraint network for concurrent engineering 1721
link the constraints (rectangles in Fig. I). The network contains the constraints that
must be considered in determining a hole diameter in a printed wiring board. This
example will be discussed in more detail later in this paper.
The problem of selecting and testing the values of the variables can be done by a
combination of computers and humans. If done by computer then it is termed
constraint satisfaction (Fikes 1970). Constraint satisfaction is analogous to automatic
design in concurrent engineering and carries crippling disadvantages: the computation
involved can prove to be impractical and there can be severe problems in ensuring that
all relevant information is included. At the other extreme, full human selection and
testing of variable values can, because ofthe time and effort involved for even relatively
small constraint networks, also be impractical.
If however the selection and testing of variable values is carried out by a
combination of humans and computer then it becomes a practical proposition for
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users can initiate a solution at whatever place their experience suggests is the most
appropriate. This allows users to use a SPARK-based constraint network in a manner
consistent with their own personal problem-solving approach. Thus, in the example
shown, an inexperienced user may be instructed to start at a specific node and proceed
through the network in a prescribed manner; whereas an experienced user would start
at whatever node seemed the most appropriate for the problem at hand.
at the location of the error and an error message is presented to the user. Once the
program is successfully scanned and parsed, an initial constraint propagation is made
by the inference engine and the results are displayed on the program interface.
The inference engine is a theorem prover that tries to find values for variables in the
constraints that will make the constraints true. The inference engine uses a three-valued
logic so that a constraint can be either true, false or undetermined. If values are
unknown for any variable in a constraint, then the constraint is logically undetermined
and the inference engine will attempt to find values through local propagation. If it is
not successful then it returns control to the user and the user must assign values. If it is
successful in finding the missing values then the inference determines whether the
constraint is logically true or false. A logically true constraint is a satisfied constraint
and a logically false constraint is a constraint violation. When a constraint is violated
the violation detection system traces the possible sources of the violation and displays
them to the user. Correcting a violation usually involves changing the value of a
variable.
When a variable's value is changed the truth maintenance system retracts the value
from the variable and traces through all the dependency links to retract the other
••
+ ..
•+ ++
•+
Figure 2. SPARK system architecture.
AI constraint network for concurrent engineering 1723
variable's values and the constraint's truth values that are dependent upon them. The
system then performs a constraint propagation and the variable values are redeter-
mined and constraints re-evaluated. This may result in the constraint being satisfied, its
still being violated, or another constraint being violated. When all variables have been
assigned values and all constraints are satisfied, then a solution to the problem has been
found.
The program interface supports the user in finding a set of variable values that
satisfy the constraints through its spreadsheet-like representation and its mouse-driven
interaction with the user. Using the mouse, variables and constraints are selected for
detailed examination and for assigning values to variables. When a value is assigned to
a variable it is automatically propagated throughout the network by the inference
engine. Constraint propagation is shown on the screen as it occurs. Variables with
assigned values appear as a different colour to those without values. Satisfied
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7 plating_spec [
7a 'plating thickness' (plate), [0,0),
7b 'solder plating thickness' (solder), [1,0) (0.0005),
70 'copper plating thickness' (copper), [2,0] (0.001) : number].
8 hole_spec [
8a 'nominal lead diameter' (lead_di), [0,0] (0.02),
8b 'minimum calculated hole diameter' (calc_di), [1,0],
80 'minimum standard hole diameter' (min_dia), [2,0],
84 'maximum standard hole diameter' (max_dia), [3,0] : number].
9 unplated_hole [
9a 'hole type' (holetyp) [0,0] (plated_thru) : hole_type,
9b 'standard oversize' (std_ovr) [1,0] : std_ovr_type,
90 'drill size for lead hole' (drill), [2,0],
94 'oversize of insertion hole' (oversiz) [3,0] : number,
ge r inherited structure */ hole data [4,0) : hole_spec].
10 general_hole [
lOa r inherited structure 0/ basic_hole [0,0) : unplated_hole,
lOb r inherited structure */ plating_data [8,0] : plating_spec].
Figure 3. (a) A SPARK program for hole specification in a printed wiring board: domain and
frame-based inheritance structure declarations.
Al constraint network for concurrent engineering 1725
Figure 3. (b) A SPARK program for hole specification in a printed wiring board: variable
declarations.
1726 R. E. Young et at.
Figure 3. (c) A SPARK program for hole specification in a printed wiring board: relation
declarations and constraint statements.
AI constraint network for concurrent engineering 1727
SPARK system will not allow the user to assign it a value outside the programmer-
defined domain. Definitions defining domains for some of the SPARK variables are
shown in lines 2 to 5. Diverse domains are possible in SPARK. The syntax for a
programmer defined domain declaration is:
domain name = {list of possible values}.
structures.
Inheritance allows us to organize properties into groups and subsequently
incorporate the groups into other structures. A frame consists of a structure name, such
as plating..spec in line 7 of Fig. 3 (a), and a variable name for each property, such as
those in lines 7a-7c. Variables may also be references to other structures as shown in
lines ge, and lines 1Oaand lOb.The variable name to structure name linkage creates the
inheritance reference. As inheritance implies, the properties and default values in an
inherited structure are automatically available to the structure in which they are
incorporated.
In the example program we grouped the plating thickness properties together
under the structure plating..spec and the hole diameter properties under the structure
hole...,spec. To specify an unsupported hole (i.e. a hole that is not plated through), we
created the structure unplatelLhole with the properties of hole type, standard hole
oversize, drill size for the lead hole, and the oversize of insertion hole. These properties
are defined by giving values to the variables holetyp, std_ovr, drill, and oversiz (lines
9a-d). Since hole diameter properties are also needed to complete the specification of
an unsupported hole, they are included by specifying a structure instance hole_data
(line ge) of the structure hole...,spec. This allows the structure unplated_hole to inherit all
the properties of the structure hole...,spec.
platiog_spec
\
unplated_hole
generalproperties of objects
grouped usinginheritance
structures
~/ general , hole
1 specificinstances of objects
created inter~ctiv:Jy. ~ the
} userthrough instantiation
A general hole contains all the properties of an unplated hole and also contains the
plating specifications. The structure generaLbole is constructed by grouping the
unplated hole properties together with the plating specification properties by
combining a structure instance basic.hole ofthe unplated.hole structure (line lOa)with
a structure instance plating....data of the plating....spec structure (line lOb). Thus, the
structure general.hole inherits all properties from an unplated hole and inherits the
properties needed to specify the plating thickness.
Frame-based inheritance allow us to group properties together in a common
structure, and then define more complex groups of properties by combining structures
into super-structures. The super-structures inherit properties from the combined
structures. The structures and super-structures define general properties for general
objects. When we need to describe a specific object, such as a specific hole in a circuit
board, we create an instance of the general object and assign it a unique name. The
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name acts as a unique identifier for each instance. To denote a specific object's
properties we assign values to the variables for each instance. In the example, we would
denote a specific hole's properties by assigning values to the variables for each hole we
instantiated. In Fig. 3 (b), line 12 creates the first instance of a specific hole. Other
instances of holes are created dynamically at the user interface by the user as they work
through all the holes on a PWB. Consequently, the example in Fig. 3 is a generic
program that can be used to determine hole specifications for a PWB with any number
of holes.
Figure 5 is an example of a user introduced instantiation. It is a screen image from
the spreadsheet-like interface. It shows variables (column 0), the constraints Cl
through Cl5 (column 2), and the first instantiation ofa hole (column 4). Let us suppose
that the user wants to describe the characteristics of a second hole in a PWB. The user
would type inst bole2 [4,5]: generaLhole on the command line as shown. When
executed, the command results in a second instantiation of a hole placed in column 5 as
shown in Fig. 6. Continuing in this way, a user would work through a PWB
instantiating a hole in the program for each hole in the PWB. Also shown in Figs 5 and
6 are screen labels. The SPARK language includes a screen labelling capability. Lines
20a through 20k in Fig. 3 (b) created the labels shown in the figures. .
F = = = = = = = = = = = spark User Interface ===========,
o 1 2 3 4 5 6 7 8
o variabl constra holes
1 hole_l hole_2 hole_3 hole_4 hole_5
2 xxxxxxx xxxxxxx xxxxxxx xxxxxxx xxxxxxx xxxxxxx xxxxxxx xxxxxxx xxxxxxx
3 "Cl"
4 "C2" holetyp
5 "C3<1 std ovr
6 mag_Biz "C4" drill
7 board "CS .. oversiz
8 no hole "C6 4 lead di
9 std drl "C7" calc-di
10 holelst "CO" min dia
11 factor "Cg4 max-dia
12 class "CIO" plate
13 "CII· solder
14 "C12" copper
15 ..elJ ..
16 "C14"
17 ..CIS ..
18
g>inst hole2 [4,5] : general_hole.
SPARK Ver 1.0 copyright (C) 1990 NCSU Industrial Engineering Department
Enter command. <CR> to process. <ESC> to cancel.
Figure 5. Screen printout of the SPARK spreadsheet-like interface for the example with
instantiation command for hole 2 entered on the command line.
1730 R. E. Young et al.
where there are i= I, ... ,m rows and j= I, ... ,n columns of values, Vij' in the table.
If n- I values are assigned to n variables in a relation, the missing variable value will
be determined by the inference engine by searching the table.
which have the same general properties, it says nothing about how we should apply
constraints to the instances that define specific objects. To specify how constraints are
to be applied to instantiated objects we have included universal quantification for
structures. This is similar to universal quantification for predicate calculus except that
it is restricted to structures. The syntax for universally quantifying inheritance
structures is:
All (is.(X), ... , isn(X)) [CSI>"" csm ]
where is" i = I, ... , n are the inheritance structures to be quantified, and cSj ' j = I, ... , m
are the constraints within the quantified structure. The syntax for constraints is defined
in section 7.1.6. A constraint, CSj, can contain variables applicable to all objects and
variables applicable to instances of an object. Variables applicable to instances of an
object are preceded by a capital letter, such as X, and a period.
In the example, to differentiate between values applicable to all holes and values
uniquely applicable to a specific instance of a hole we quantified the structure
generaLhole as shown in line 26 of Fig. 3 (c) in which All (generaLhole(X)) appears.
Line 26 specifies that the set of values for each instance of a hole is propogated through
the constraints enclosed within the left and right square brackets. The variables
preceded by an X. appear within the super-structure generaLhole. As a new value is
assigned to a variable within an instance of a hole all the variables within the instance's
structure are propagated through the constraints. In this way, the constraint network
of Fig. 1 is applied to each instance of a hole for the PWB.
Constraints are defined using logical operators. Constraints in Fig. 3 (c) contain
both atomic and logic constraints. Examples of atomic constraints with equality ( =)
and with inequality (= <) are shown in lines 24 through 25. Examples of atomic
constraints with the set operators, inclusion testing (elemenLof) and element insertion
(- > ), are shown in line 26m. Another set operator, cardinality (card), is shown in line
24. Logic constraints are composed from atomic constraints using negation (the 'not'
operator), conjunction (the 'and' operator, &), disjunction (the 'or' operator, #), logical
implication (the 'implies' operator, = = > ), and logical equivalence (the 'equivalence'
operator, < = ». Conjunction, disjunction and negation are not included in this
example; however, an example or logical equivalence ( < = > ) is shown in line 2M.
Conditional constraints using implication (= = > ) are shown in lines 26g, 26h and in
line 26m. In a conditional constraint, the antecedent (i.e. X.holetyp = plated_thru in line
26h) acts as a guard expression for the consequent (X.stovr = 0.028). The consequent is
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8. Operation of SPARK
To illustrate the operation of SPARK, let us assume the designer has instantiated a
new hole, say hole four, and now proceeds to determine a drill for it. Let us also assume
that the following values for variables in hole4's structure have been set:
hole type (holetyp) plated_thru
solder plating thickness (solder) 0·0005
copper plating thickness (copper) 0·001
maximum standard hole diameter (max_dia) 0·048
mimimum standard hole diameter (min_dia) 0'025
In addition, let us assume that as a result of specifying variable values for previous
holes, the list of existing holes is:
list of existing hole sizes (holelst) 0,031, 0'045, 0·063
The designer now proceeds to select a drill size (drill) for hole4 which has a minimum
calculated hole diameter (calc_di) of 0'043. Since the minimum calculated hole diameter
(calc.di) now exceeds the minimum standard hole diameter (min_dia) for this hole,
constraint 11 in line 26j will never be violated; thus, for this hole, the minimum
calculated hole diameter defines the minimum range value. If the designer decides to
use a value (such as 0·052 as shown in Fig. 7) outside the range defined by the calculated
hole diameter (calc.di) or the maximum standard hole diameter (max_dia), 0·043
through 0'048, SPARK detects a violation of either constraint 12 or constraint 13 and
will notify the designer. Figure 8 shows a violation of constraint 12. If the designer
decides to use a non-standard drill size, SPARK also detects a violation of constraint
14.
Suppose, however, that the designer decides to use a standard drill size of 0'043,
which satisfies the constraints or being a standard drill size and of being within the
minimum or maximum range for this hole (constraints 12, 13 and 14). SPARK then
detects a violation of constraint 2 and will then point out to the designer that the
number of bits would exceed the capacity of the drill magazine.
1732 R. E. Young et al.
0
0
variabl
1 2
constra
J
• 5 6
holes
7 8
a>
SPARK Ver 1.0 Copyright (C) 1990 NCSU Industrial Engineering Department
Use arrow key or mouse to select variable or constraint.
.
Please enter the new variable value. (It must be a number)
Figure 7. Variable assignment window shown with 0-052 assigned to variablefor the selected
drill size.
At this stage, the designer could decide to use a different drill machine with a larger
drill magazine size, or the designer could choose a different drill size. Of these options,
the more sensible approach would be to use a drill size of 0·045 inches. If this is done,
SPARK will check the network for constraint violations and finding none will report
this to the designer. In this way a designer would work through all the hole sizes in a
printed wiring board by instantiating a hole and then assigning values to the variables
in the hole's frame-based inheritance structure until all variables in all structures for all
holes have been assigned values that do not violate any constraints.
This example illustrates how the constraint networks in SPARK provide life-cycle
information to a designer that results in hole specifications for a printed wiring board
using standard drill sizes while remaining within drill magazine capacity, thereby
reducing both potential manufacturing problems and cost.
AI constraint network for concurrent engineering 1733
0: SOB.J->drill
o 1 6 7 8
o variabl holes
1 , - - - - - - - - - - - - VIOLATIONS - - - - - - - - - - - - - - ,
2
3 Constraint 12.001 is violated due to the following user assignments:
4 general_hole:holel+unplated_hole:basic_hole.drill = 0
5 .052
6 qeneral_hole:holel+unplated_hole:baslc_hole+hole_spec:hole_da
7 ta.1ead di a 0.02 .
8 -general_hole:holel+unplated_hole:basic_hole.holetyp c plated_
9 thru
10
11
12 Do you want to save this in the
13 VIOLATE.TXT file? (Yin):
14
15
16
17
18
=>
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SPARK Ver 1.0 Copyright (e) 1990 NCSU Industrial Engineering Department
Please enter the new variable value. (It must be a nUmber)
Figure 8. Constraint violation window showing that constraint 12 have been violated.
Acknowledgment
This work was funded in part by the National Science Foundation, grant number
DDM-89 14200.
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