Chapter Four

Register Transfer and Microoperations

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 Chapter contents

• Register Transfer Language

• Register Transfer

• Bus and Memory Transfers

• Arithmetic Microoperations

• Logic Microoperations

• Shift Microoperations

• Arithmetic Logic Shift Unit

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 4.1 Register Transfer Language (RTL)
• Digital System: An interconnection of hardware
modules that do a certain task on the
information.
• Registers + Operations performed on the data
stored in them = Digital Module
• Modules are interconnected with common data
and control paths to form a digital computer
system

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4.1 Register Transfer Language cont.

• Microoperations: operations executed on data

stored in one or more registers.
• For any function of the computer, a sequence of
microoperations is used to describe it
• The result of the operation may be:
– replace the previous binary information of a
register or
– transferred to another register
Shift Right Operation
101101110011 010110111001

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 4.1 Register Transfer Language cont.

• The internal hardware organization of a

digital computer is defined by specifying:
• The set of registers it contains and their function
• The sequence of microoperations performed on
the binary information stored in the registers
• The control that initiates the sequence of
microoperations
• Registers + Microoperations Hardware +
Control Functions = Digital Computer

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4.1 Register Transfer Language cont.

• Register Transfer Language (RTL): a

symbolic notation to describe the
microoperation transfers among registers
Next steps:
– Define symbols for various types of
microoperations,
– Describe the hardware that implements these
microoperations

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 4.2 Register Transfer (our first microoperation)
• Computer registers are designated by
capital letters (sometimes followed by
numerals) to denote the function of the
register
• R1: processor register
• MAR: Memory Address Register (holds an address
for a memory unit)
• PC: Program Counter
• IR: Instruction Register
• SR: Status Register
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4.2 Register Transfer cont.

• The individual flip-flops in an n-bit

register are numbered in sequence from 0
to n-1 (from the right position toward the
left position)

R1 7 6 5 4 3 2 1 0

Register R1 Showing individual bits

A block diagram of a register

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 4.2 Register Transfer cont.
Other ways of drawing the block diagram of a register:

15 0
PC
Numbering of bits

15 87 0
Upper byte PC(H) PC(L) Lower byte
Partitioned into two parts

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 4.2 Register Transfer cont.

• Information transfer from one register to another is

described by a replacement operator: R2 ← R1
– This statement denotes a transfer of the content of register R1
into register R2
• The transfer happens in one clock cycle
• The content of the R1 (source) does not change
• The content of the R2 (destination) will be lost and
replaced by the new data transferred from R1
• We are assuming that the circuits are available from
the outputs of the source register to the inputs of the
destination register, and that the destination register
has a parallel load capability

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 4.2 Register Transfer cont.

• Conditional transfer occurs only under a

control condition
• Representation of a (conditional) transfer
P: R2 ← R1
• A binary condition (P equals to 0 or 1)
determines when the transfer occurs
• The content of R1 is transferred into R2
only if P is 1

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 4.2 Register Transfer cont.
Hardware implementation of a controlled transfer: P: R2 ← R1
Block diagram: Control P Load
R2 Clock
Circuit

R1

t t+1

Timing diagram
Clock
Synchronized
Load
with the clock
Transfer occurs here

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 4.2 Register Transfer cont.

Basic Symbols for Register Transfers

Symbol Description Examples
Letters & Denotes a register MAR, R2
numerals
Parenthesis ( ) Denotes a part of a R2(0-7), R2(L)
register
Arrow ← Denotes transfer of R2 ← R1
information
Comma , Separates two R2 ← R1, R1 ← R2
microoperations
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 4.3 Bus and Memory Transfers
• Paths must be provided to transfer
information from one register to another
• A Common Bus System is a scheme for
transferring information between registers in a
multiple-register configuration
• A bus: set of common lines, one for each bit
of a register, through which binary
information is transferred one at a time
• Control signals determine which register is
selected by the bus during each particular
register transfer
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4.3 Bus and Memory Transfers
Register A Register B Register C Register D

Bus lines

Register D Register C Register B Register A

3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0

D 3 D2 D1 D 0 C3 C2 C 1 C0 B3 B2 B1 B0 A3 A2 A1 A0

D3 C 3 B 3 A 3 D2 C2 B 2 A 2 D1 C1 B 1 A 1 D0 C0 B 0 A 0

3 2 1 0 3 2 1 0 3 2 1 0
3 2 1 0 S0
S0 S0 S0
MUX3 MUX2 MUX1 MUX0 S1
S1 S1 S1

4.Line Common Bus

MUX :Multiplexer 15
 4.3 Bus and Memory Transfers
• The transfer of information from a bus into one
of many destination registers is done:
– By connecting the bus lines to the inputs of all
destination registers and then:
– activating the load control of the particular
destination register selected
• We write: R2 ← C to symbolize that the content
of register C is loaded into the register R2 using
the common system bus
• It is equivalent to: BUS ←C, (select C)
R2 ←BUS (Load R2)

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 4.3 Bus and Memory Transfers:
Three-State Bus Buffers
• A bus system can be constructed with three-state buffer gates
instead of multiplexers
• A three-state buffer is a digital circuit that exhibits three states:
logic-0, logic-1, and high-impedance (Hi-Z).
• Two of the states are signals equivalent to logic 1 and 0 as in a
conventional gate.
• The third state is a high-impedance state. The high-impedance
state behaves like an open circuit, which means that the output is
disconnected and does not have a logic significance.
Control input C

Normal input A Output B

Three-State Buffer
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4.3 Bus and Memory Transfers:
Three-State Bus Buffers cont.

C=1

Buffer
A B A B

C=0

Open Circuit
A B A B

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 4.3 Bus and Memory Transfers:
Three-State Bus Buffers cont.

S1 0
Select
S0 1
Bus line for bit 0
2×4 A0
Decoder 2
Enable E
3

B0

C0

Bus line with three-state

buffer (replaces MUX0 in the
previous diagram) D0

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• The above Fig. is distinguished from a normal buffer
by having both a normal input and a control input.
• The control input determines the output state.
– When the control input is equal to 1, the output is
enabled and the gate behaves like any conventional
buffer, with the output equal to the normal input.
– When the control input is 0, the output is disabled and
the gate goes to a high-impedance state, regardless of
the value in the normal input.
• The high-impedance state of a three-state gate
provides a special feature not available in other gates.
– Because of this feature, a large number of three-state gate
outputs can be connected with wires to form a common bus
line without endangering loading effects.
– When the enable input of the decoder is 0, all of its four
outputs are 0, and the bus line is in a high-impedance state
because all four buffers are disabled. 20
 4.3 Bus and Memory Transfers:
Memory Transfer
• Memory read : Transfer from memory
• Memory write : Transfer to memory
• Data being read or wrote is called a memory
word (called M).
• It is necessary to specify the address of M when
writing /reading memory
• This is done by enclosing the address in square
brackets following the letter M
• Example: M[0016] : the memory contents at
address 0x0016
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 4.3 Bus and Memory Transfers:
Memory Transfer cont.
• Assume that the address of a memory unit
is stored in a register called the Address
Register AR
• Lets represent a Data Register with DR,
then:
• Read: DR ← M[AR]
• Write: M[AR] ← DR

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4.3 Bus and Memory Transfers:
Memory Transfer cont.
AR
x0C 19
x12 x0E 34
R1 x10 45
100 x12 66
x14 0
x16 13
R1←M[AR] x18 22

RAM

R1 R1
100 66

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 4.4 Arithmetic Microoperations
• The microoperations most often encountered
in digital computers are classified into four
categories:
– Register transfer microoperations
– Arithmetic microoperations (on numeric data
stored in the registers)
– Logic microoperations (bit manipulations on
non-numeric data)
– Shift microoperations

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 4.4 Arithmetic Microoperations cont.
• The basic arithmetic microoperations
are: addition, subtraction, increment,
decrement, and shift
• Addition Microoperation:
R3 ←R1+R2
• Subtraction Microoperation:
R3 ←R1-R2 or : 1’s complement

R3 ←R1+R2+1
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4.4 Arithmetic Microoperations cont.
• One’s Complement Microoperation:
R2 ←R2
• Two’s Complement Microoperation:
R2 ←R2+1
• Increment Microoperation:
R2 ←R2+1
• Decrement Microoperation:
R2 ←R2-1
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 Half Adder/Full Adder
Half Adder x y c s x
0 0 0 0 c = xy s = xy’ + x’y c
y
0 1 0 1 =x  y
1 0 0 1 s
1 1 1 0
Full Adder
y y
x y cn-1 cn s
0 0 0 0 0 0 0 0 1
0 0 1 0 1 0 1 c 1 0 c
n-1
n-1
0 1 0 0 1 x 1 1 x 0 1
0 1 1 1 0 0 1 1 0
1 0 0 0 1 cn s
1 0 1 1 0
1 1 0 1 0 cn = xy + xcn-1+ ycn-1
1 1 1 1 1 = xy + (x  y)cn-1

x s = x’y’cn-1+x’yc’n-1+xy’c’n-1+xycn-1
y = x  y  cn-1 = (x  y)  cn-1
S
cn-1
cn
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4.4 Arithmetic Microoperations
Binary Adder

B3 A3 B2 A2 B1 A1 B0 A0

C3 C2 C1
FA FA FA FA C0

C4 S3 S2 S1 S0

4.bit binary adder

(connection of FAs)

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4.4 Arithmetic Microoperations
Binary Adder-Subtractor
B3 A3 B2 A2 B1 A1 B0 A0

C3 C2 C1 C0
FA FA FA FA

C4 S3 S2 S1 S0

4.bit adder-subtractor

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 4.4 Arithmetic Microoperations
Binary Adder-Subtractor
• For unsigned numbers, this gives A – B if A≥B or
the 2’s complement of (B – A) if A < B
(example: 3 – 5 = -2= 1110)
• For signed numbers, the result is A – B provided
that there is no overflow.

C3 1, if overflow
V=
C4 0, if no overflow

Overflow detector for signed numbers

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4.4 Arithmetic Microoperations Binary
Adder-Subtractor cont.
• What is the range of unsigned numbers
that can be represented in 4 bits?
• What is the range of signed numbers that
can be represented in 4 bits?
• Repeat for n-bit?!

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4.4 Arithmetic Microoperations Binary
Incrementer
A3 A2 A1 A0 1

x y x y x y x y

HA HA HA HA

C S C S C S C S

C4 S3 S2 S1 S0

4.bit Binary Incrementer

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 4.4 Arithmetic Microoperations
Binary Incrementer
• Binary Incrementer can also be implemented
using a counter
• A binary decrementer can be implemented by
adding 1111 to the desired register each
time!

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 4.5 Logic Microoperations
• Specify binary operations on the strings of bits in registers
– Logic microoperations are bit-wise operations, i.e., they work on the
individual bits of data
– useful for bit manipulations on binary data
– useful for making logical decisions based on the bit value
• There are, in principle, 16 different logic functions that
can be defined over two binary input variables
A B F0 F1 F2 … F13 F14 F15
0 0 0 0 0 … 1 1 1
0 1 0 0 0 … 1 1 1
1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1
• However, most systems only implement four of these
– AND (), OR (), XOR (), Complement/NOT
• The others can be created from combination of these
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 4.5 Logic Microoperations
List Of Logic Microoperations
• List of Logic Microoperations
- 16 different logic operations
n
with 2 binary vars.
2
- n binary vars → 2 functions
• Truth tables for 16 functions of 2 variables and the
corresponding 16 logic micro-operations
x 0011 Boolean Micro-
Name
y 0101 Function Operations
0000 F0 = 0 F0 Clear
0001 F1 = xy FAB AND
0010 F2 = xy' F  A  B’
0011 F3 = x FA Transfer A
0100 F4 = x'y F  A’ B
0101 F5 = y FB Transfer B
0110 F6 = x  y FAB Exclusive-OR
0111 F7 = x + y FAB OR
1000 F8 = (x + y)' F  A  B)’ NOR
1001 F9 = (x  y)' F  (A  B)’ Exclusive-NOR
1010 F10 = y' F  B’ Complement B
1011 F11 = x + y' FAB
1100 F12 = x' F  A’ Complement A
1101 F13 = x' + y F  A’ B
1110 F14 = (xy)' F  (A  B)’ NAND
1111 F15 = 1 F  all 1's Set to all 1's
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 4.5 Logic Microoperations
The four basic microoperations
OR Microoperation
• Symbol: , +

• Gate:

• Example: 01001102  10101102 = 11101102

OR OR

P+Q: R1←R2+R3, R4←R5 R6

ADD 36
 4.5 Logic Microoperations
The four basic microoperationscont.
AND Microoperation
• Symbol: 

• Gate:

• Example: 01001102  10101102 = 00001102

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 4.5 Logic Microoperations
The four basic microoperationscont.
Complement (NOT) Microoperation
• Symbol:


• Gate:

• Example: 10101102 = 01010012

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 4.5 Logic Microoperations
The four basic microoperationscont.
XOR (Exclusive-OR) Microoperation
• Symbol: 

• Gate:

• Example: 01001102  10101102 = 11100002

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 4.5 Logic Microoperations
Other Logic Microoperations
Selective-set Operation
• Used to force selected bits of a register into logic-1 by using the OR
operation. Example: 01002  10002 = 11002

In a processor register Loaded into a register from memory to

perform the selective-set operation
• Or, In a selective set operation, the bit pattern in B is used to set
certain bits in A
1 1 0 0 At
1010B
1 1 1 0 At+1 (A  A + B)
• If a bit in B is set to 1, that same position in A gets set to 1,
otherwise that bit in A keeps its previous value

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 4.5 Logic Microoperations
Other Logic Microoperationscont.
Selective-complement (toggling) Operation
• Used to force selected bits of a register to be complemented by
using the XOR operation. Example: 00012  10002 = 10012
In a processor register Loaded into a register from memory to
perform the selective-complement
operation
• Or, In a selective complement operation, the bit pattern in B is
used to complement certain bits in A
1 1 0 0 At
1010 B
0 1 1 0 At+1 (A  A  B)
• If a bit in B is set to 1, that same position in A gets complemented
from its original value, otherwise it is unchanged
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 4.5 Logic Microoperations
Other Logic Microoperationscont.
Insert Operation
• An insert operation is used to introduce a specific bit
pattern into R1 register, leaving the other bit positions
unchanged
• This is done as
– A mask operation to clear the desired bit positions, followed by
– An OR operation to introduce the new bits into the desired
positions
• Example: suppose R1 = 0110 1010, and we desire to
replace the leftmost 4 bits (0110) with 1001 then:
– Step1: 0110 1010  0000 1111
– Step2: 0000 1010  1001 0000
•  R1 = 1001 1010
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 4.5 Logic Microoperations
Other Logic Microoperationscont.
NAND Microoperation

• Symbols:  and


• Gate:

• Example: 1001102  10101102 = 11110012

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 4.5 Logic Microoperations
Other Logic Microoperationscont.
NOR Microoperation

• Symbols:  and


• Gate:

• Example: 1001102  10101102 = 00010012

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 4.5 Logic Microoperations
Other Logic Microoperationscont.
Set (Preset) Microoperation
• Force all bits into 1’s by ORing them with a
value in which all its bits are being assigned to
logic-1
• Example: 1001102  1111112 = 1111112
Clear (Reset) Microoperation
• Force all bits into 0’s by ANDing them with a
value in which all its bits are being assigned to
logic-0
• Example: 1001102  0000002 = 0000002
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 4.5 Logic Microoperations
Hardware Implementation
• The hardware implementation of logic
microoperations requires that logic gates
be inserted for each bit or pair of bits in
the registers to perform the required
logic function
• Most computers use only four (AND, OR,
XOR, and NOT) from which all others can
be derived.

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 4.5 Logic Microoperations
Hardware Implementation cont.

S1
4×1 Operatio
S0
MUX S1 S0 Output n
Ai
0 0 E=AB XOR
Bi
0
0 1 E=AB OR

1 0 E=AB AND
1 Ei
1 1 E=A Complem
ent

3 This is for one bit i

Figure B 47
 4.6 Shift Microoperations
• Used for serial transfer of data
• Also used in conjunction with arithmetic, logic,
and other data-processing operations
• The contents of the register can be shifted to
the left or to the right
• As being shifted, the first flip-flop receives its
binary information from the serial input
• Three types of shift: Logical, Circular, and
Arithmetic

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 4.6 Shift Microoperations cont.

Serial Input r2 Serial Output

rn-1 r3 r1 r0

Determines Shift Right

the “shift”
type

Serial Output Serial Input

rn-1 r3 r2 r1 r0

Shift Left

**Note that the bit ri is the bit at position (i) of the register

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 4.6 Shift Microoperations:
Logical Shifts
• Transfers 0 through the serial input
• Logical Shift Right: R1←shr R1
The same

• Logical Shift Left: R2←shl R2

The same

? rn-1 r3 r2 r1 r0 0

Logical Shift Left

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 4.6 Shift Microoperations:
Circular Shifts (Rotate Operation)
• Circulates the bits of the register around
the two ends without loss of information
• Circular Shift Right: R1←cir R1
The same

• Circular Shift Left: R2←cil R2

The same

rn-1 r3 r2 r1 r0

Circular Shift Left

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 4.6 Shift Microoperations
Arithmetic Shifts
• Shifts a signed binary number to the left or right
• An arithmetic shift-left multiplies a signed
binary number by 2: ashl (00100): 01000
• An arithmetic shift-right divides the number by 2
ashr (00100) : 00010
• An overflow may occur in arithmetic shift-left,
and occurs when the sign bit is changed (sign
reversal)

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 4.6 Shift Microoperations
Arithmetic Shifts cont.

rn-1 r3 r2 r1 r0
?

Sign Arithmetic Shift Right

Bit

? rn-1 r3 r2 r1 r0 0
Sign
Arithmetic Shift Left
Bit

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 4.6 Shift Microoperations
Arithmetic Shifts cont.
• An overflow flip-flop Vs can be used to detect an
arithmetic shift-left overflow : Vs = Rn-1  Rn-2
Rn-1 1  overflow
Vs=
Rn-2 0  no overflow

• An left arithmetic shift operation must be checked for

the overflow

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 4.6 Shift Microoperations cont.

• Example: Assume R1=11001110, then:

– Arithmetic shift right once : R1 = 11100111
– Arithmetic shift right twice : R1 = 11110011
– Arithmetic shift left once : R1 = 10011100
– Arithmetic shift left twice : R1 = 00111000
– Logical shift right once : R1 = 01100111
– Logical shift left once : R1 = 10011100
– Circular shift right once : R1 = 01100111
– Circular shift left once : R1 = 10011101
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 4.7 Arithmetic Logic Shift Unit
• Instead of having individual registers
performing the microoperations directly,
computer systems employ a number of
storage registers connected to a common
operational unit called an Arithmetic
Logic Unit (ALU)

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