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Cao 9

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]

[ 2CEIT507 –COMPUTER ARCHITECTURE & ORGANIZATION

Practical: 9

AIM- Study of 8085 and 8086 Microprocessor Architecture. (Including


types of instruction, addressing modes, flag register)

Department of Computer Engineering


2CEIT507-Computer Architecture &Organization Practical-9

Practical: 9

Aim: Study of 8085 and 8086 Microprocessor Architecture. (Including types of


instruction, addressing modes, flag register)

Introduction :
The 8085 microprocessor is an 8-bit microprocessor that was developed by Intel in the mid-
1970s. The architecture of the 8085 microprocessor consists of several key components, including
the accumulator, registers, program counter, stack pointer, instruction register, flags register, data
bus, address bus, and control bus.
The accumulator is an 8-bit register that is used to store arithmetic and logical results. It is the
most commonly used register in the 8085 microprocessor and is used to perform arithmetic and
logical operations such as addition, subtraction, and bitwise operations.
The 8085 microprocessor has six general-purpose registers, including B, C, D, E, H, and L, which
can be combined to form 16-bit register pairs. The B and C registers can be combined to form the
BC register pair, the D and E registers can be combined to form the DE register pair, and the H
and L registers can be combined to form the HL register pair.
8085 is an 8-bit, general-purpose microprocessor. It consists of the following functional units:

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2CEIT507-Computer Architecture &Organization Practical-9

Arithmetic and Logic Unit (ALU) :


It is used to perform mathematical operations like addition, multiplication, subtraction, division,
decrement, increment, etc. Different operations are carried out in ALU: Logical operations, Bit-
Shifting Operations, and Arithmetic Operations

Flag Register
It is an 8-bit register that stores either 0 or 1 depending upon which value is stored in the
accumulator. Flag Register contains 8-bit out of which 5-bits are important and the rest of 3-bits
are “don’t Care conditions ”.The data bus is an 8-bit bus that is used to transfer data between the
microprocessor and memory or other devices.
flag register is a status register and it is used to check the status of the current operation
which is being carried out by ALU.
Different Fields of Flag Register:
1. Carry Flag
2. Parity Flag
3. Auxiliary Carry Flag
4. Zero Flag
5. Sign Flag

The address bus is a 16-bit bus that is used to address memory and other devices. The address bus
is used to select the memory location or device that the microprocessor wants to access.
The control bus is a set of signals that controls the operations of the microprocessor, including the
read and write operations. The control bus includes signals such as the read signal, write signal,
interrupt signal, and reset signal.
General Purpose Registers:
There are six general-purpose registers. These registers can hold 8-bit values. These 8-bit registers
are B,C,D,E,H,L. These registers work as 16-bit registers when they work in pairs like B-C, D-E,
and H-L. Here registers W and Z are reserved registers. We can’t use these registers in arithmetic
operations.

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2CEIT507-Computer Architecture &Organization Practical-9

Program Counter :
Program Counter holds the address value of the memory to the next instruction that is to be
executed. It is a 16-bit register.
Stack Pointer :
It works like a stack. In stack, the content of the register is stored that is later used in the program.
It is a 16-bit special register. The stack pointer is part of memory but it is part of Stack operations,
unlike random memory access. This pointer is very useful in stack-related operations like PUSH,
POP, and nested CALL requests initiated by Microprocessor. It reserves the address of the most
recent stack entry.
Temporary Register:
It is an 8-bit register that holds data values during arithmetic and logical operations.
Instruction register and decoder:
It is an 8-bit register that holds the instruction code that is being decoded. The instruction is
fetched from the memory.
Timing and control unit:
The timing and control unit comes under the CPU section, and it controls the flow of data from the
CPU to other devices. It is also used to control the operations performed by the microprocessor
and the devices connected to it. There are certain timing and control signals like Control signals,
DMA Signals, RESET signals and Status signals.
Interrupt control:
Whenever a microprocessor is executing the main program and if suddenly an interrupt occurs, the
microprocessor shifts the control from the main program to process the incoming request. After
the request is completed, the control goes back to the main program. There are 5 interrupt signals
in 8085 microprocessors: INTR, TRAP, RST 7.5, RST 6.5, and RST 5.5.
Priorities of Interrupts: TRAP > RST 7.5 > RST 6.5 > RST 5.5 > INTR
Address bus and data bus:
The data bus is bidirectional and carries the data which is to be stored. The address bus is
unidirectional and carries the location where data is to be stored.
In the 8085 microprocessor, the address bus and data bus are two separate buses that are used for
communication between the microprocessor and external devices.
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2CEIT507-Computer Architecture &Organization Practical-9

The Address bus is used to transfer the memory address of the data that needs to be read or
written. The address bus is a 16-bit bus, allowing the 8085 to access up to 65,536 memory
locations.
The Data bus is used to transfer data between the microprocessor and external devices such as
memory and I/O devices. The data bus is an 8-bit bus, allowing the 8085 to transfer 8-bit data at a
time. The data bus can also be used for instruction fetch operations, where the microprocessor
fetches the instruction code from memory and decodes it.
Serial Input/output control:
It controls the serial data communication by using Serial input data and Serial output data.
Serial Input/Output control in the 8085 microprocessor refers to the communication of data
between the microprocessor and external devices in a serial manner, i.e., one bit at a time.
The 8085 also has two special purpose registers, the Serial Control Register (SC) and the Serial
Shift Register (SS), which are used to control and monitor the serial communication

The flow of an Instruction Cycle in 8085 Architecture :


• Program Counter: Initiates execution by pointing to the next instruction address in
memory.
• Multiplexed Address/Data Bus: Acts as an address bus initially to fetch the instruction.
After fetching, it switches to a data bus to carry data. The Address Latch Enable (ALE) pin
controls this switch (ALE=1 for address bus, otherwise for data bus).
• Instruction Register: Stores fetched instructions, ready for decoding by the instruction
decoder.
• Timing and Control Circuit: Sends signals to indicate READ/WRITE actions and
specifies MEMORY or I/O device operations.
• ALU and Flag Register: ALU performs logical/arithmetic operations, while the flag
register updates dynamically based on results.
• Serial I/O Pins (SID/SOD): Used for data input/output with external devices.
• Interrupt Handling: On detecting an interrupt, the microprocessor pauses current
execution to run the Interrupt Service Routine (ISR), then resumes normal operation.

Uses of the 8085 Microprocessor:


• Embedded Systems: Used in industrial control, automotive electronics, and medical
devices.
• Computer Peripherals: Found in printers, scanners, and disk drives.
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2CEIT507-Computer Architecture &Organization Practical-9

• Communication Systems: Utilized in modems and network interfaces.


• Instrumentation and Control: Applied in temperature and pressure controllers.
• Home Appliances: Incorporated in washing machines, refrigerators, and microwaves.
• Educational Purposes: Commonly used in academic settings for teaching.
• Research and Development: Used for prototyping and testing in R&D projects.
• Retro Computing: Popular among enthusiasts for historical and educational projects.

Common Issues with the 8085 Microprocessor:


• Overheating: Can malfunction if not properly cooled.
• Power Supply Issues: Sensitive to voltage fluctuations.
• Timing Issues: Requires stable clock signals for proper operation.
• Memory Interface Issues: Faulty memory chips or connection issues may cause
malfunctions.
• Hardware Interface Issues: Communication errors with devices due to incorrect
wiring or faulty hardware.
• Programming Issues: Syntax or logic errors in assembly language can lead to
incorrect outputs.

Architecture of 8086
Introduction :
The 8086 microprocessor, introduced by Intel in the late 1970s, is a 16-bit processor that is
part of the x86 family, widely used in early personal computers. Here are the key points about
its architecture and features:
• CISC Architecture: The 8086 uses a Complex Instruction Set Computing (CISC) architecture,
supporting a wide range of instructions, many of which can perform multiple operations in one
cycle.
• 20-bit Address Bus: It can address up to 1 MB of memory, with a 16-bit data bus for data
transfer.
• Segmented Memory Architecture: Memory is divided into segments, accessed via a
combination of segment registers and offsets, allowing efficient addressing of larger memory.

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• Execution Units: The microprocessor has two main units: the Bus Interface Unit (BIU) for
fetching instructions and data, and the Execution Unit (EU) for executing instructions.
• Registers: It features 14 internal 16-bit registers, including general-purpose registers, segment
registers, and special registers like the flags register and instruction pointer.
• No Integrated RAM/ROM: The 8086 doesn't have internal memory like RAM or ROM, relying
on external memory through the system bus.
• Pipelining Support: The 8086 supports pipelining, allowing more efficient instruction execution.

8086 Architecture

Memory segmentation:
• In order to increase execution speed and fetching speed, 8086 segments the memory.
• Its 20-bit address bus can address 1MB of memory, it segments it into 16 64kB segments.
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The internal architecture of Intel 8086 is divided into 2 units: The Bus Interface Unit (BIU),
and The Execution Unit (EU).

1. The Bus Interface Unit (BIU):


It provides the interface of 8086 to external memory and I/O devices via the System Bus.
BIU performs the following functions are as follows:
▪ It generates the 20-bit physical address for memory access.
▪ It fetches instructions from the memory.
▪ It transfers data to and from the memory and I/O.
▪ Maintains the 6-byte pre-fetch instruction queue(supports pipelining).
BIU mainly contains the 4 Segment registers, the Instruction Pointer, a pre-fetch queue, and
an Address Generation Circuit.
Instruction Pointer (IP):
• It is a 16-bit register. It holds offset of the next instructions in the Code Segment.
• IP is incremented after every instruction byte is fetched.
• IP gets a new value whenever a branch instruction occurs.
Address Generation Circuit:
• The BIU has a Physical Address Generation Circuit.
• It generates the 20-bit physical address using Segment and Offset addresses using the formula:
• In Bus Interface Unit (BIU) the circuit shown by the Σ symbol is responsible for the calculation
unit which is used to calculate the physical address of an instruction in memory.
6 Byte Pre-fetch Queue:
• It is a 6-byte queue (FIFO).
• Fetching the next instruction (by BIU from CS) while executing the current instruction is called
pipelining.
• Gets flushed whenever a branch instruction occurs.

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• The pre-Fetch queue is connected with the control unit which is responsible
for decoding op-code and operands and telling the execution unit what to do
with the help of timing and control signals.
• The pre-Fetch queue is responsible for pipelining and because of that 8086
microprocessor is called fetch, decode, execute type microprocessor.

Prefetch Unit:
In the 8086 microprocessor, the Prefetch Unit fetches instructions from memory and stores them in
a queue. By fetching multiple instructions in advance, it reduces wait times and improves
performance, allowing the processor to execute instructions from the queue while waiting for new
data from memory.

2 .Execution Unit (EU):


The Execution Unit performs arithmetic and logic operations, manages data within the processor,
and sends control signals for instruction execution. The main components of the EU include:
• General Purpose Registers (AX, BX, CX, DX): These 16-bit registers (divided into 8-bit high
and low parts) store data during operations. Each has specific uses:
o AX: Accumulator for arithmetic/string operations.
o BX: Holds memory addresses in indirect addressing.
o CX: Counts loops and shifts.
o DX: Assists AX in handling 32-bit data.
• Arithmetic Logic Unit (ALU): Handles arithmetic and logical operations on 8- and 16-bit data.
• Special Purpose Registers (Stack Pointer, Base Pointer, Source Index, Destination Index):
These 16-bit registers act as offset pointers to specific memory segments (Code, Data, Stack,
Extra) within the program.
• Instruction Register & Decoder: The instruction register holds the opcode from memory, which
is decoded for execution.
• Flag/Status Register: A 16-bit register with 9 flags indicating the microprocessor's status:
o Status Flags: Carry, Parity, Auxiliary Carry, Zero, Sign, Overflow (updated after each
operation).
Control flags:
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1. Trap flag(TF)
2. Interrupt flag(IF)
3. Direction flag(DF)

Decode Unit:
The Decode Unit in the 8086 microprocessor translates fetched machine code instructions into
micro-operations for execution. Working alongside the Prefetch Unit, it reads instructions from the
queue and decodes them into operations that the Execution Unit can process. It handles complex
instructions like jumps and loops by breaking them into simpler steps, facilitating efficient and
accurate execution of tasks.
Control Unit:
The Control Unit coordinates the microprocessor’s operations, managing data flow and instruction
sequencing across components like the Decode, Execution, and Prefetch Units. It handles fetching,
decoding, and executing instructions while monitoring the processor’s state, managing interrupts,
and performing system tasks. By orchestrating these actions, it ensures efficient operation and
optimal performance.
8086 Buses:
1. Address Bus (16-bit): Sends memory addresses for data or instructions, enabling access to up to
64 KB of memory.
2. Data Bus (16-bit): Transfers 16-bit data words between the microprocessor and memory.
3. Control Bus: Carries control signals (e.g., read, write, interrupts) and status information between
the microprocessor and system components.

Execution of whole 8086 Architecture:

In the 8086 microprocessor, instruction execution involves three main steps: fetching, decoding,
and executing, all happening in parallel thanks to pipelining.

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1. Fetch: The Bus Interface Unit (BIU) calculates the physical address using the Code Segment and
Instruction Pointer registers. Once the address is ready, the instruction is fetched from memory
and stored in a pre-fetch queue, which follows a First-In-First-Out (FIFO) approach.
2. Decode: When the fetched instruction reaches the front of the queue, it is passed to the Execution
Unit (EU) for decoding. The control unit generates an opcode, determining the operation to be
performed. This information is then sent across the microprocessor to direct the necessary
components.
3. Execute: The Execution Unit retrieves the required data from General Purpose Registers (GPRs)
and performs the specified operation in the Arithmetic Logic Unit (ALU). Flag registers update
according to the result of operations like ADD, SUB, MUL, or DIV.
While instructions are decoded and executed, the BIU continues fetching instructions, keeping the
pre-fetch queue ready. This simultaneous fetch-decode-execute process, known as pipelining,
boosts the efficiency of the 8086 by allowing operations to overlap.

Advantages of 8086 Architecture:


• Wide Instruction Set: Supports a diverse range of instructions for complex programming.
• Segmented Memory: Can address up to 1 MB of memory using 16-bit addresses.
• Efficient Execution: Dual units (Execution Unit and Bus Interface Unit) enable parallel
instruction execution and data handling.
• Rich Registers: Multiple general, segment, and special-purpose registers for efficient data
manipulation and control.
• Backward Compatibility: Compatible with earlier 8-bit microprocessors, easing software
portability.

Disadvantages of 8086 Architecture:


• Complex Programming: Challenging for beginners due to assembly language and segmented
memory.
• Performance Limitations: Slower clock speed and fewer execution units compared to modern
processors.
• Limited Memory Addressing: Can address only up to 1 MB, restricting memory-intensive
applications.

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• Lacks Modern Features: No built-in hardware floating-point support or virtual memory


management.

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