5720 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO.

6, JUNE 2019

Piecewise Analytical Transient Model for Power

Switching Device Commutation Unit
Bochen Shi , Student Member, IEEE, Zhengming Zhao , Fellow, IEEE,
and Yicheng Zhu , Student Member, IEEE

Abstract—Taking switching transients of switching devices into and transient model for power switching devices is the basis
consideration in design and simulation of power electronic sys- for such investigations. The similar aforementioned perturba-
tems has long been a huge obstacle. Sufficient accuracy has to be tions associated with switching operations turn out to be critical
ensured, meanwhile more significantly the transient model has to
be practical, i.e., providing a convergent result with an acceptable for not only power electronic switching devices, but also other
solving speed and a convenient parameter extraction technique. power switches such as high-voltage circuit breakers [1] and
Aiming at both targets, this paper proposes a piecewise analyti- spark gaps (SF6, N2, and vacuum) [2], [3]. The corresponding
cal transient (PAT) model for switching device commutation unit, investigations on modeling, analysis, and control of switching
taking an IGBT–p-i-n diode pair as an example. A piecewise time- operations become significant in a wide range of applications
varying voltage source-current source pair is utilized to model the
IGBT–p-i-n diode pair. With sufficient accuracy, PAT modeling and can share similar methodologies.
methodology noticeably increases the solving speed and improves In order to simulate and analyze the transient operation of
the convergence of converter simulations. Model expressions and devices in power electronic systems, accuracy and practicabil-
datasheet-driven parameter extractions are illustrated in detail. ity are two critical requirements. To be accurate is to precisely
Experimental and simulated results are presented and compared describe the transient behavior of the switching devices with
to validate both the accuracy and the practicability of the proposed
PAT model, expected to be employed in transient simulations of sufficient accuracy, and to be practical is to ensure an accept-
power electronic systems. able simulation speed, a convergent result, and an efficient and
simple method for parameter extraction without supplementary
Index Terms—Event-driven simulation, power switching device
modeling, switching transients.
experiments.
In the past decades, extensive investigations have been con-
I. INTRODUCTION ducted concerning transient models for power switching de-
vices, yet few managed to achieve both targets mentioned above,
OWER switching devices are usually considered as ideal
P switching devices in design, analysis, and simulation of
power electronic systems. With zero switching time, zero power
and therefore was unlikely to be utilized in system simulations.
Taking IGBT as an example, Sheng et al. [4] listed most of
the vertical IGBT models published from 1985 to 2000, and
loss and zero peak voltage and current, the ideal model is simple
discussed their advantages and disadvantages. These transient
and practical, especially for large time-scale system-level simu-
models can be mainly classified into two categories: physical
lations. Nevertheless, the transient operation of power switching
model, which refers to analytical model based on semiconductor
devices cannot be described with ideal model, associating with
physics, and behavioral model, which simulates IGBT behavior
various problems. For instance, in system design and device se-
without considering its physical mechanisms. Physical models
lection, device capability determined by transient peak voltage
such as Hefner model [5]–[8], Kraus model [9], and Kuang
and current, and dead-time determined by switching transient
Sheng model [10] are powerful to precisely simulate the IGBT
duration, cannot be analyzed quantitatively without transient
switching transients. However, in power electronic systems in
model. Furthermore, it is evident that diverse system faults orig-
which numerous devices are combined together, the complexity
inate from switching transient issues, and such analysis has been
of these models can constantly lead to divergent result and slow
an obstacle. In addition, for better switching characteristics, in-
calculation speed. Besides, most of the parameters concerning
vestigations on transient operation control become significant,
semiconductor physics must be extracted through additional ex-
periments [11], which is not practical for system design and
Manuscript received February 14, 2018; revised April 14, 2018, May 17, simulation.
2018, and July 23, 2018; accepted August 25, 2018. Date of publication August
28, 2018; date of current version April 20, 2019. This work was supported by Behavioral models, such as Sudhoff model [12] and Hammer-
the Major Program of the National Natural Science Foundation of China under stein model [13], tend to be more portable and convenient, with
Grants 51490680 and 51490683. Recommended for publication by Associate higher speed. However, such models may fail to consider the
Editor M. Nawaz. (Corresponding author: Zhengming Zhao.)
The authors are with the Department of Electrical Engineering, Tsinghua parameter variations under different conditions, and therefore
University, Beijing 100084, China (e-mail:, [email protected]; zhaozm@ cannot overcome the challenge of accuracy. Also, supplemen-
tsinghua.edu.cn; [email protected]). tary experiments are still necessary [12]. In recent years, another
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. behavioral model for real-time simulation of MMC on FPGA
Digital Object Identifier 10.1109/TPEL.2018.2867735 is proposed in [14] and [15]. Utilizing behavioral curve fitting,

0885-8993 © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications standards/publications/rights/index.html for more information.

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 SHI et al.: PIECEWISE ANALYTICAL TRANSIENT MODEL FOR POWER SWITCHING DEVICE COMMUTATION UNIT 5721

this model guarantees fast simulation speed, which is highly

significant in real-time simulations. Yet such techniques may
lack universality in different topologies, and the model deter-
mines both the current and the voltage of the devices, therefore
it may violate Kirchhoff’s current law (KCL) and Kirchhoff’s
voltage law (KVL).
Taking an IGBT–p-i-n diode commutation unit for example,
this paper aims at proposing a piecewise analytical transient
(PAT) model satisfying both the aforementioned requirements,
i.e., adequate accuracy and high practicability, seeking to utilize
the PAT model in the analysis and simulation of power electronic
systems. Three highlights are included in the proposed PAT Fig. 1. IGBT basic commutation unit in the commutation circuit.
model.

A. Modeling Object PAT model is an analytical model. Switching transients are

decoupled and separately described in different stages, and in
In power electronic converters, a switching device is not op-
each stage either physical description or behavioral fitting is
erated alone. Instead, it is combined and interacted with other
adopted, which ensures a concise and relatively accurate model
devices. The transient behavior of the device depends not only
result. For commutation units composed of other devices like
on itself, but also on other devices in the commutation unit. Un-
IGCT and MOSFET, the similar PAT modeling methodology can
like conventional modeling which focuses on a single device,
be utilized as well.
this paper proposes a model for commutation units, decreasing
Section II-A illustrates the modeling object, the commuta-
the complexity and improving the efficiency of the model.
tion unit, after which the decoupling technique is discussed in
Section II-B. Section II-C presents the analyses of the switch-
B. Modeling Technique ing transient, based on which Section II-D demonstrates PAT
PAT modeling is based on the decoupling of the switching modeling details. Finally, the parameter extraction methods are
transients. During switching transients, diverse physical mech- illustrated in Section II-E.
anisms are coupled together, resulting in a huge complexity. This
paper manages to decouple the complicated transient processes A. IGBT–p-i-n Diode Commutation Unit
through time slicing, and during each stage only the dominant
During transient commutation, two devices are combined to-
physical mechanism is considered. This ensures a reduced-order
gether, composing a basic commutation unit, as shown in Fig. 1.
piecewise analytical model, which only consists of one volt-
S1 and S2 are IGBTs, and DS 1 and DS 2 are p-i-n diodes as free-
age source and one current source, securing both accuracy and
wheeling diode (FWD). The identification of the commutation
practicability.
unit in complicated converters with numerous devices can be
conducted according to the initial and final current paths during
C. Parameter Extraction switching transient.
With the aforementioned decoupling technique, complex A basic commutation unit consists of two complementary
physical mechanisms during switching transients of the com- switches (sometimes more devices are included, which is not
mutation unit can be simplified, so that all PAT model param- discussed in this paper). As shown in Fig. 1, the switches are
eters can be extracted from manufacturer datasheets, avoiding connected to a capacitor CDC (usually the bus capacitor) and an
supplementary experiments. Curves and data in datasheets are inductor Lload (usually the load inductor). Typically, switching
utilized to acquire physical parameters of the device, so that transients are fast enough so that the changes of VDC and IL can
model results are accurate under different conditions, such as be ignored. As a result, CDC and Lload are normally regarded as
different bus voltages, load currents, and gate drives. a constant voltage source and a constant current source during
This paper is organized as follows. Section II introduces the transient commutation. Load current IL has two directions, de-
PAT modeling methodology and presents the model expressions termining the devices participating in the commutation: either
in detail. Section III compares the model results with the exper- S1 –DS 2 or S2 –DS 1 , as shown in Fig. 2. Ls refers to the stray
imental results of a typical double-pulse experiment, aiming at inductance. For simplicity, it is assumed that Ls exists only near
validating the accuracy of PAT model. Section IV illustrates the the dc bus in the following analyses.
simulation of a simple dc–ac converter with PAT model, in order
to evaluate its practicability. Finally, the conclusions are drawn B. Decoupling of Switching Transient
in Section V.
Transient commutation is dominated by different physical
mechanisms, such as the MOS channel effect and the junc-
II. PAT MODELING METHODOLOGY
tion capacitance effect in IGBT, the minority carrier storage
In this section, the PAT modeling method is introduced, tak- effect in p-i-n diode and so on. Conventional approaches tend to
ing an IGBT–p-i-n diode commutation unit as an example. model all the mechanisms together by one equivalent circuit or

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 5722 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 6, JUNE 2019

represent the current and the voltage of the diode, while irr
represents the reverse recovery current. Note that the directions
of the voltage and the current are opposite from the commonly
used direction from anode to cathode, to make sure vD > 0
when sustaining the dc bus voltage.
Device packaging, assembling, and connections introduce
stray parameters and greatly affect switching transients. Among
all the stray parameters, those introduced by dc bus bar are the
most important. Yuan et al. [16] presented detailed modeling
and analysis for the bus bar stray parameters, in which different
Fig. 2. Different directions of load current will result in different switching
segments of the bus bar were modeled separately with different
devices participating in the transient commutation. stray inductances. This model is relatively accurate, yet can be
time-consuming in converter simulations. In fact, in most cases,
not all details of the switching transients are of high impor-
tance. Modeling the dc bus bar with a dc-link capacitor CDC and
a lumped stray inductance Ls , as shown in Fig. 3, is accurate
enough to simulate the first peak voltage (also the highest un-
der most circumstances) and dv/dt during switching transients.
This will be further illustrated and proven with the experimental
results presented in Section III (see Figs. 12 and 13). Hence,
the lumped stray inductance model is adopted in the PAT model
for IGBT-diode pair, where Ls represents the sum of the bus bar
stray inductance and the stray inductance inside IGBT. The form
is related to module assembling and connection, and the latter is
related to device packaging. This helps improve the simulation
efficiency and convergence.
The accurate modeling for the BJT part depends on compli-
cated semiconductor physics equations and parameters, which
are to be avoided in a practical model. Hence, only the two most
Fig. 3. IGBT commutation unit equivalent circuit for transient commutation significant mechanisms of BJT are considered, i.e., the ampli-
analysis.
fication effect during the switching-ON transient, and the tail
current effect caused by the minority carriers sweeping during
the switching-OFF transient. In other stages, the BJT part is fre-
a set of coupling differential equations. Such models are usually
quently neglected, so that IGBT can be simplified as an MOSFET
high-order models. When solving such circuits or equations, dif-
with three capacitances.
ferent mechanisms are considered together, all the time through-
Among the three capacitances in Fig. 3, two are critical in
out the whole commutation process, resulting in an unacceptable
the PAT model for the IGBT–p-i-n diode pair. The first is Cge ,
solving speed or even a divergent solution.
gate–emitter capacitance, which can be considered as a constant
In fact, one specific stage of the transient commutation is
capacitance. The second is Cgc , gate–collector capacitance, also
dominated by one key mechanism. In PAT model, through
known as the Miller capacitance. Cgc is related to the gate struc-
time slicing, with reasonable simplifications, different mech-
ture of IGBT, which can be equivalently regarded as the series
anisms can be decoupled and considered separately, leading to
combination of the gate–drain oxide capacitance Coxd and the
a more practical reduced-order model with sufficient accuracy.
gate–drain depletion capacitance Cgdj . Coxd is a constant ca-
PAT modeling method is presented in detail in Sections II-C
pacitance, while Cgdj is a nonlinear capacitance related to Vdg ,
and II-D.
described by (1), where λ is a coefficient [16]
C. Decoupling Analyses of IGBT–p-i-n Diode λ
Cgdj =  (1)
Transient Commutation Vdg + 0.7
In this part, an IGBT–p-i-n diode commutation unit as a case Coxd Cgdj
is studied, after which the corresponding PAT model can be Cgc = . (2)
Coxd + Cgdj
established in Section II-D. IGBT can be modeled as an MOSFET-
driven transistor [5]. The following analyses are based on the As for Cce , its charging current has a relatively small influence
equivalent circuit presented in Fig. 3. CDC is the bus capacitance, on the switching transients of IGBT–p-i-n diode pairs in most
Lload and Rload are the load inductance and resistance, and Ls cases. However, for other commutation units such as silicon
is the stray inductance. VGon , VGoff , RGon , and RGoff represent carbide (SiC) MOSFET-silicon carbide (SiC) Schottky barrier
the gate drive circuit, while RGint represents the internal gate diode (SBD) pair, the influence of Cce is frequently significant
resistance of the IGBT module. For the FWD part, iD and vD and cannot be ignored.

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 SHI et al.: PIECEWISE ANALYTICAL TRANSIENT MODEL FOR POWER SWITCHING DEVICE COMMUTATION UNIT 5723

During Stage 2, vce slowly declines, due to the voltage drop

on the stray inductance, described by
dic
vce = VDC − Ls . (6)
dt
The change of vce during current rise is commonly small,
therefore gate charging can still be described by (3). Current
rise time is defined as tr = t2 –t1 , during which ic rises from
0 to IL . Correspondingly, vge rises from VT to Vml , the Miller
plateau voltage, i.e.,
Vml = vge (t2 ) = vge (ic = IL ). (7)
c) Stage 3. t2 –t3 : When ic = IL , vce cannot fall instan-
taneously, in that the charge stored in the p-i-n diode has to be
swept. In Stage 3, ic continues to rise due to the reverse recov-
ery of the FWD, and arrives Icmax on t3 . A corresponding rise
in vge is depicted in Fig. 4, but usually with small magnitude.
Therefore, it can be assumed that vge ≈ Vml from t2 to t5 .
Fig. 4. Switching-ON waveforms of the IGBT-diode unit in the equivalent The time when vce starts to fall depends on the reverse re-
circuit. (a) Waveforms of IGBT current, voltage, and gate voltage. (b) Wave- covery of the FWD, usually between t2 and t3 . For simplicity,
forms of p-i-n diode current, voltage, and switching-ON command signal. it is assumed that vce starts to fall on t3 , which approximately
coincides with the experimental results presented in Section III.
d) Stage 4. t3 –t4 : The reverse recovery of the FWD ends
Based on Fig. 3, through time slicing and transient decou- on t4 , when ic = IL . Reverse recovery time is defined as trr =
pling, the transient commutation of the IGBT–p-i-n diode unit t4 –t2 .
can be analyzed. Switching-ON and switching-OFF transients are e) Stage 5. t4 –t5 : vce falls rapidly after t3 . Due to Miller
discussed respectively in the following analyses. effect, vge holds during Stages 4 and 5, and gate charging current
1) Switching-on Transient: Switching-ON transient is di- ig flows through Miller capacitance Cgc , i.e.,
vided into six stages, as depicted in Fig. 4. Definitions for vce , VGon − Vml
ic , vge , vD , and iD have been illustrated in Fig. 3. Signal refers ig = (8)
RGon + RGint
to the switching-ON command signal given by a controller.
a) Stage 1. t0 –t1 : After switching-ON signal is generated, dCgc (vce − Vml )
= −ig . (9)
a signal delay usually exists before vge starts to rise. On t0 , gate dt
drive power supply changes from VGoff to VGon . From t0 to t1 , Cgc varies with vce , as shown in (1) and (2).
vge rises from VGoff to threshold voltage VT , described by (3), f) Stage 6. t5 –t6 : When vce is small, Cgc becomes larger,
where τ1 = (Cge + Cgc )(RGon + RGint ) and Cgc = Cgc (VDC ) ≈ which results in a slow decline of vce , i.e., small dvce /dt. vce in
0.5
λ/VDC  Cge . Turn-ON delay time is defined as tdon = t1 –t0 , Stage 6 can also be described by (8) and (9). When vge rises to
which can be derived from VGon , the switching-ON transient ends.
2) Switching-OFF Transient: Switching-OFF transient is
vge (t) = VGon + (VGoff − VGon ) e−(t−t 0 )/τ 1 . (3) also divided into six stages, as a dual process of the switching-ON
transient, depicted in Fig. 5.
b) Stage 2. t1 –t2 : When vge = VT , the MOS channel is a) Stage 1. t7 –t8 : On t7 , the gate power supply changes
opened and ic starts to rise. Device voltage is vce ≈ VDC during from VGon to VGoff . From t7 to t8 , vge falls from VGon to
Stage 2. As a result, if non-quasi-static effect [5] is neglected, Miller plateau voltage Vml , described by (10), where τ2 =
MOS channel current imos can be described by (4), where KP is (Cge + Cgc )(RGoff + RGint ) and Cgc = Cgc (vce ≈ 0) ≈ Coxd .
the transconductance of the MOSFET Turn-OFF delay time is defined as tdoff = t8 –t7 , which can
1 be derived from (10). Notice that the definition here is different
imos = KP (vge (t) − VT )2 . (4) from the typical tdoff parameter defined in the manufacturer
2
datasheet
Taking the p-n-p bipolar transistor into consideration, ic can vge (t) = VGoff + (VGon − VGoff ) e−(t−t 0 )/τ 2 . (10)
be described by (5) [18]. β0 is the amplification coefficient of
the transistor, and K is defined as the transconductance of the b) Stage 2. t8 –t9 : From t8 , vce starts to climb. Before
IGBT. To be more rigorous, K is not a constant parameter, but it arrives VDC , the FWD will sustain part of the dc voltage,
varies with the collector current instead. Here for simplicity, K therefore no current flows through the diode. As a result, ic
is assumed constant holds constant, except for a small drop due to the diode junction
capacitance. In Stage 2, vce rises slowly, similar to Stage 6 in
ic = (1 + β0 )imos = K(vge (t) − VT )2 . (5) the switching-ON transient.

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 5724 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 6, JUNE 2019

Fig. 6. Modeling the basic commutation unit with a combination of voltage

source-current source. Two modes are defined as VCS and CVS.

Fig. 5. Switching-OFF waveforms of the IGBT-diode unit in the equivalent

circuit. (a) Waveforms of IGBT current, voltage, and gate voltage. (b) Wave-
forms of p-i-n diode current, voltage, and switching-OFF signal.

c) Stage 3. t9 –t10 : Stage 3 is the rapid rise stage of vce , a

dual stage of Stage 5 in the switching-ON transient. On t10 , vce
reaches VDC .
d) Stage 4. t10 –t11 : From t10 , ic decreases. Due to the Fig. 7. VCS/CVS models are employed according to different stages in
stray inductance and the forward recovery of FWD, vce has an switching transients. In the VCS mode, v ce (t) and iD (t) are the output variables
of the PAT model, while in the CVS mode ic (t) and v D (t) become the output
overshoot, described by (11), where vfr is the forward recovery variables. Waves of the output variables are marked in red.
voltage of FWD. Stage 4 is the first stage of the rapid fall of ic ,
during which dic /dt increases. If neglecting vfr , vce will reach
maximum voltage on t11 problems, in that the current and voltage waves are continuous
at t3 and t10 .
dic After determining the model mode of each stage, the ex-
vce = VDC − Ls + vfr . (11)
dt pressions of the voltage source and current source have to
e) Stage 5. t11 –t12 : Stage 5 is the second stage of the be determined, as well as the time duration of each stage.
rapid fall of ic , during which dic /dt decreases. On t12 , ic falls Table I demonstrates the switching-ON model expressions for
to tail current Itail . each stage.
f) Stage 6. t12 –t13 : Stage 6 is the current tail stage of ic . Stage 1 and Stage 2 expressions have been illustrated in
On t13 , ic falls to zero, and the switching-OFF transient ends. Section II-C. In Stage 3, Irr is defined as the maximum current of
the reverse recovery stage of the p-i-n diode. Irr can be extracted
from the datasheet, which will be discussed in Section II-E. As a
D. PAT Model for IGBT–p-i-n Diode Commutation Unit
result, the maximum collector current Icmax = Irr + IL . In Stage
Based on the analyses above, a PAT model is established. In 4, it is assumed that iD changes linearly from Irr to 0, leading to
the PAT model, a voltage source–current source combination a linear drop of the IGBT current ic . The total reverse recovery
is utilized to model the IGBT–diode combination, as shown in time is defined as trr = t4 –t2 , also extracted from datasheets.
Fig. 6. PAT model has two modes. When the IGBT is mod- In Stage 4 and Stage 5, the expressions of vce are derived
eled as a voltage source, FWD will be modeled as a current by solving the differential equation (9). In this stage, vce is
source, defined as voltage-current source (VCS) mode, other- large, therefore Coxd is neglected in (2), making Cgc ≈ Cgdj ≈
√
wise a current-voltage source (CVS) mode. Consequently, the λ/ vcg . When vce is small in Stage 5, Coxd cannot be neglected.
voltage of the current source and the current of the voltage It is assumed that when vcg < Vlim , Cgc ≈ Coxd . Such model for
source are determined by external circuits. Whether VCS or the nonlinear miller capacitance Cgc will be further discussed in
CVS mode is adopted depends on whether the voltage of the Section II-E.
IGBT or the current of the IGBT is controlled by gate drive. Table II demonstrates the switching-OFF model expressions
Different stages in switching transients can be categorized into for each stage. Stage 1 has been discussed in Section II-C, and
VCS and CVS modes, as shown in Fig. 7. Sudden switch from Stages 2 and 3 are the dual processes of Stages 4–6 in switching-
one mode of CVS and VCS to another will not cause transient ON model.
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 SHI et al.: PIECEWISE ANALYTICAL TRANSIENT MODEL FOR POWER SWITCHING DEVICE COMMUTATION UNIT 5725

TABLE I
SWITCHING-ON MODEL EXPRESSIONS

TABLE II
SWITCHING-OFF MODEL EXPRESSIONS

For Stages 4–6 in switching-OFF model, the critical issue

is the modeling of the current fall period. Accurate modeling
demands complicated expressions and parameters of semicon-
ductor physics, which extremely increase the burden of model
solving; hence, behavioral fitting is applied in the PAT model.
Three parameters are introduced: tfast , the duration of the
fast fall stage of the current fall; ttail , the duration of the
current tail; and Itail , the initial value of the tail current. Let Fig. 8. Waveforms of ic and dic /dt during Stages 4–6 in switching-OFF
t12 –t11 = t11 –t10 = tfast /2, and t13 –t12 = ttail . It is assumed model.
that dic /dt changes linearly during each stage, as shown in
Fig. 8. In that case, if neglecting the forward recovery of FWD, a rough approximation, where ε < 1 is an empirical coefficient
vce derived from (11) would be a polygonal line waveform sim- and ε tends to be larger when IL decreases.
ilar to dic /dt waveform, in concordance with the experimental As shown in Tables I and II, the expressions describing the
results. Note that Itail , the initial value of the tail current, is a switching transients are all algebraic equations instead of differ-
manually introduced parameter to behaviorally describe the cur- ential equations. Thus, the PAT model can be implemented as
rent fall process, by which the current fall stage is divided into a VCS and CVS mode, instead of high-order equivalent circuits.
fast fall stage and a tail stage. Experimental results showed that Instead of state variables such as capacitor voltage and induc-
Itail is positively related to IL . Here we define Itail = ε(IL )IL as tor current in the conventional models, the PAT model utilizes
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 5726 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 6, JUNE 2019

the current of the voltage source and the voltage of the current Table III. With the parameter extraction techniques illustrated in
source as the variables. When considering switching transients Appendix A, the PAT model parameters are calculated and listed
in system simulation, the reduced-order PAT model can secure as follows: VT = 7.5 V, K = 34.2 A/V2 , Cge = 80.9 nF, λ =
a fast speed and the convergence of the result. 5.66 nF·V1/2 , Vlim = 1 V, Coxd = 168 nF, A = 105.1, B =
0.25, C = 0.41, D = 0.1.
E. Datasheet-Driven Parameter Extraction Extracting stray inductance is significant in switching tran-
In system design, analysis and simulation, supplementary ex- sient simulations. Two types of methods can be adopted [24],
periments for model parameter extraction are not practical. As a namely calculation methods and experimental methods. During
substitute, the PAT model parameters can be directly extracted designing, the calculation methods such as the finite element
from the manufacturer datasheet. From the performance curves method and the partial element equivalent circuit method can be
provided in datasheets, model parameters are extracted by curve utilized [25]–[27], with the help of calculation tools such as the
fitting. Hence, the accuracy of this model depends on the accu- Ansoft Q3D Extractor software. Fig. 11 shows the 3-D model
racy of the characteristics provided in the device datasheet. This for the tested IGBT module built in Ansoft Q3D Extractor. The
can be considered as a tradeoff between accuracy and practica- calculated result of the stray inductance in total is 596.41 nH.
bility when designing the converters. The experimental results Another method to extract the stray inductance is by experi-
shown in Section III confirm that such extraction is of suffi- ments. This method can be utilized when the prototype has been
cient accuracy for system design and simulation. Additional de- built. Jiang et al. [24] proposed an experimental method for ex-
tails of the extraction of PAT model parameters are provided in tracting the stray inductance with the results of the double-pulse
Appendix A, taking Mitsubishi IGBT CM1200HC-90R (4500 V, tests. Utilizing this method, the calculated result is 645 nH, as
1200 A) as an example [19]. After building the experimental shown in Table III.
prototypes, experimental results can be utilized to correct the In Fig. 3, the current and the voltage of the device can be
parameters. derived by KCL and KVL, as described in (12). As a result,
In addition, device parameters are sensitive to temperature. with the PAT model, the current and the voltage of IGBT and
Consequently, the junction temperature Tj is included as a vari- diode can be calculated, and the comparisons of the results can
able to determine the PAT model parameters. Based on ex- be observed in Fig. 12, together with the error of the key char-
pressions which have been verified in previous literatures [7], acteristics marked on each plot. Accurate measurements of the
[20], [35]–[41], the temperature dependence of the device pa- ultrafast experimental switching transient waves can be an obsta-
rameters can be determined. Datasheets usually provide elec- cle, especially for high voltage devices. Techniques such as the
trical characteristics at certain reference temperatures, such as capacitive voltage divider proposed and discussed in [28]–[30]
Tj = 25 ◦ C and Tj = 125 ◦ C, with which the coefficients in the can be adopted to improve the measuring ability of ultrafast
temperature-dependent expressions can be derived, and the PAT switching transients in high voltage applications
model parameters can be calculated. The detailed discussions
IL = ic − iD
are given in Appendix B.
To obtain an accurate junction temperature, establishing a dic
VDC = Ls + vce + vD . (12)
precise thermal model is critical. Many investigations have been dt
conducted concerning thermal modeling of semiconductor de-
The comparisons prove that the PAT model results generally
vices. A practical solution is to utilize equivalent RC thermal
coincide with the experimental results of different load current
network for thermal simulation [20]–[23]. Future work will fo-
and dc bus voltage, especially in the current rise stage during
cus on combining such thermal models with the PAT model, cre-
switching-ON transients, and the voltage rise and fall stages.
ating an accurate and practical electrothermal switching model.
Main parameters considered in these stages include the equiva-
Frequently updating Tj and recalculating model parameters
lent transconductance of IGBT and the nonlinear capacitances,
is unnecessary and causes considerable computational burden.
which reflects the physics mechanisms of the devices. Neverthe-
Similar to the quantization of state variables in DSED (which
less, behavioral fitting is adopted in the modeling of the current
will be illustrated in detail in Section IV), Tj is updated only
reverse recovery stage in switching-ON transients and the cur-
when its change exceeds a threshold value ΔTj , as shown in
rent fall stage in switching-OFF transients, hence they may not
Fig. 9.
be highly accurate.
When VDC = 3000 V, the comparisons of the critical charac-
III. COMPARISONS OF MODEL AND EXPERIMENTAL RESULTS teristics of switching transients are presented in Fig. 13, along
To verify the accuracy of PAT model, a typical double- with the definitions of the parameters. As can be seen, the
pulse experiment is conducted. The test circuit is the same as current fall time tf is less accurate due to behavioral fitting.
presented in Fig. 3. The tested IGBT and FWD is Infineon This leads to a relatively larger error in Eoff when the current is
high-voltage IGBT module FZ600R65KF1 (6500 V, 600 A). low. In fact, the current waveform of the switching-OFF transient
Concept 1SD210F2-FZ600R65KF1 is used as the gate driver. is significantly different when the current is relatively small. PAT
The photography of the test module is shown in Fig. 10. model describes the current fall stage better when the current
The parameters of the experimental platform are listed in is not extremely small comparing with the rated current of the

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 SHI et al.: PIECEWISE ANALYTICAL TRANSIENT MODEL FOR POWER SWITCHING DEVICE COMMUTATION UNIT 5727

Fig. 9. Calculation flowchart of the combined electrothermal model.

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 5728 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 6, JUNE 2019

TABLE III
PARAMETERS OF IGBT TEST PLATFORM

Fig. 10. Photograph of the IGBT module, gate drive circuit, and heat sink in
the test platform.

Fig. 11. Three-dimensional model of one IGBT module in the experimental

prototype, built in Ansoft Q3D Extractor.

device. For other characteristics, such as the maximum cur-

rent icmax in switching-ON transient and the maximum voltage
vcemax in switching-OFF transient, the PAT model has a relatively
higher accuracy on the premise of accurate estimate of the stray
inductance.
Fig. 12. Comparisons of experimental results and PAT model simulated
An error map changing with time is shown in Fig. 14 to results of the IGBT current and voltage. (a) Switching-ON transient under four
illustrate the accuracy of each stage. A switching-ON transient different load current-dc voltage conditions (b) Switching-OFF transient under
(2500 V, 185 A) and a switching-OFF transient (2000 V, 190 A) four different conditions. Switching signal is given when t = 0. Test ambient
temperature is 15 °C.
are chosen as two examples. Absolute and relative error of ic and

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 SHI et al.: PIECEWISE ANALYTICAL TRANSIENT MODEL FOR POWER SWITCHING DEVICE COMMUTATION UNIT 5729

Fig. 13. Comparisons of the switching characteristics of experimental results and PAT model simulated results. (a) Time characteristics. (b) Maximum voltage,
maximum current and switching energy. (c) Parameter definitions, switching-on transient. (d) Parameter definitions, switching-OFF transient.

vce are depicted. It should be emphasized that when the absolute provide more information of the parameters changing with the
value of ic and vce is small, the relative error of the model results conditions, such as capacitances changing with the device volt-
can be large, due to the measurement error in experiments. In age, and reverse recovery current changing with the load current.
that case, relative error becomes pointless. The absolute error Hence, CF is necessary to ensure the accuracy of PAT model.
in that case is very small hence it does not damage the model Besides, if the experimental setup has been built, the PAT model
accuracy. would provide more accurate results if the parameters are cor-
From Fig. 14, it can be observed that in stages 4 and 5 of rected with the experimentally measured results.
switching-ON transient and in stages 5 and 6 of switching-OFF
transient, the errors of ic are relatively large, due to the
behavioral modeling of the diode reverse recovery sweeping IV. MODELING APPLICATION IN CONVERTER SIMULATION
and the IGBT tail current, which is not accurate with limited A. Experimental Prototype
information provided by datasheets. Accurate modeling of
Section III validates the accuracy of PAT model. Switching
those stages must take the physical mechanisms of the charge
devices operates in combination modes in power electronic sys-
sweeping into consideration, which cannot be accomplished
tems; hence, the precise results in the basic commutation unit
with only datasheet information. Other stages are relatively
will guarantee accurate results in other converters with multi-
accurate due to modeling of the capacitances and the equivalent
ple devices. In this section, the application of PAT model in
transconductance.
converter simulations is illustrated, aiming at proving its practi-
The parameters that need to be obtained by datasheet curve
cability. A two-level H-bridge single-phase inverter is adopted
fitting (CF) are also marked in Fig. 14. Datasheet provides two
as a case, and the simulated results are compared with the ex-
kinds of information, i.e., tables and curves. Datasheet tables
perimental results. A 50-kVA three-stage solid state transformer
show parameters under certain gate drive and certain IL and
(SST) was built as an experimental prototype, in which a dc–ac
VDC , such as tr , tdoff , and so on. These table parameters cannot
module served as the last stage, as shown in Figs. 15 and 16.
be directly utilized to build PAT model, in that condition varia-
This section focuses on the transient simulation of the dc–ac
tions result in significant parameter changes. Datasheet curves
inverter shown in Fig. 16 as a studied case.

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 5730 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 6, JUNE 2019

Fig. 15. Photograph of the experimental prototype. A dc–ac stage in a 50-kVA

three-stage SST is studied.

Fig. 16. Topology of a single-phase inverter in a 50-kVA SST. (a) Scheme of

the 50-kVA SST. (b) Topology of the dc–ac stage.

TABLE IV
PARAMETERS OF H-BRIDGE INVERTER IN EXPERIMENTAL PROTOTYPE

Infineon IGBT module FF450R07ME4_B11 is adopted. Ex-

perimental parameters are summarized in Table IV, and the
control scheme is depicted in Fig. 17.

B. DSED With PAT Model

Fig. 14. Absolute and relative errors of the model simulated results in different In order to simulate power electronic converters, PAT model is
stages. The primary parameters in each stage that need to be obtained by implemented in discrete state event driven (DSED) simulation
datasheet CF are marked on the corresponding stage. (a) Switching-ON tran- framework coded in MATLAB. DSED is a novel simulation
sient, 2500 V, 185 A. (b) Switching-OFF transient, 2000 V, 190 A.
framework for power electronic systems [32]. DSED with PAT

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 SHI et al.: PIECEWISE ANALYTICAL TRANSIENT MODEL FOR POWER SWITCHING DEVICE COMMUTATION UNIT 5731

TABLE V
DEFINITIONS OF SYSTEM EVENTS IN DSED FRAMEWORK

Fig. 17. Control scheme of the dc–ac inverter.

model can significantly improve the effectiveness of switching

transient simulations, due to three techniques employed.
1) Reduced-Order PAT Model: PAT model proposed in this
Fig. 18. Quantization of state variables leads to a variable step size algorithm
paper is a reduced-order model, in which voltage source and and increases the efficiency of the simulation.
current source are utilized instead of high-order circuits. Such
modeling can secure both accuracy and practicability, as illus-
i.e., the variable event defined in Table V occurs. In that case,
trated above.
the simulation is driven in a very efficient way, where a smaller
2) Event-Driven Simulation Mechanism: In conventional
time step size will be automatically employed when the state
simulation mechanism based on the discretization of time, iter-
variable is changing rapidly, while a larger one employed when
ative calculations are required to accurately locate the discon-
the state variable is changing slowly, as illustrated in Fig. 18
tinuous points introduced by system events, such as switching

events and sudden changes of loads. Under such simulation Qi (t− ) ± ΔQi , if |Qi (t− ) − xi (t)| = ΔQi
mechanism, the frequent switching events in power electronic Qi (t) =
Qi (t− ), otherwise.
systems can cause considerable computational burden. DSED
(14)
framework can intrinsically overcome such difficulty, in that
switching events are included as system events and will auto-
matically trigger a new calculation cycle. In that case, switching C. Comparisons of Simulated and Experimental Results
events will automatically become the dividing point of two cal- With the PAT model, event-driven mechanism and the quan-
culation cycles, significantly avoiding computational burden. tization of state variables, DSED has shown advantages over
Definitions of system events in DSED framework are shown in conventional simulation tools in terms of efficiency. In order to
Table V, where the definition of variable event will be further verify the effectiveness of DESD with the PAT model, the stud-
illustrated later. ied case, an H-bridge inverter, is simulated utilizing different
3) Quantization of State Variables: In DSED framework, tools, and the errors and execution times are compared. Simu-
the classic time discretization is replaced by the quantization lation tools selected in this paper include MATLAB/Simulink
of state variables, which leads to a variable step size algorithm and Synopsys/Saber.
and noticeably improves the efficiency of the simulation [32]. MATLAB/Simulink is the most commonly used simulation
The principle of this algorithm can be explained taking the first- tool in system simulations, yet the device model is usually an
order algorithm as an example. Considering the system state ideal model. As for transient simulations, Synopsys/Saber pro-
equations vides powerful transient models which have been widely recog-
nized. Hence in this paper, the PAT model simulated results are
ẋ = Ax + Bu (13)
compared with Simulink and Saber simulated results.
where x is the state vector, A is the Jacobi matrix, B is the input All the simulation tools are sufficient for large time-scale sim-
matrix, and u is the input vector. Q is utilized as the quantization ulations and provide accurate results. Transient simulations are
of x, and can be obtained by the quantization function shown in more concerned in this paper. Fig. 19 shows the simulated re-
(14), where ΔQi is the threshold value for the ith state variable sults of is1 , the current of S1 –DS 1 pair. As can be seen, the ideal
called a quantum. The value of Q will be updated only when device model in MATLAB/Simulink cannot describe switching
the change of the state variable reaches its threshold value, transients. Fig. 20 depicts the zoomed-in view of the module

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 5732 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 6, JUNE 2019

behavioral model in Saber is still implemented as a high-order

equivalent circuit, and will be consequently confronted with the
aforementioned convergence and speed issues. It is observed in
the studied case that the speed of the behavioral model in Saber
is at the same level compared with that of the physical model,
on the premise of same tolerance. Similarly, behavioral models
are frequently too sensitive to converge, which has already been
verified in other papers [34].
Table VI lists the execution time comparisons of the dc–ac
stage for simulating 0.2 s. All the simulations, including Saber,
Simulink, and DSED, are performed on the same computer, with
Intel Core i7-7700K @ 4.20 GHz processor, MATLAB 2017b
and Saber 2016, and the total time each simulation costs is
defined as execution time. Test results show that with DSED
and PAT model, the transient simulation can be noticeably
accelerated compared with Saber with physical model igbt_b.
The acceleration results from the aforementioned three tech-
niques employed in DSED, i.e., reduced-order PAT model,
event-driven simulation mechanism, and the quantization of
Fig. 19. Experimental and simulated results of the module current is 1 .
state variables. Note that even compared with Simulink with
idea model, DSED with PAT model is still faster, due to the ef-
ficient event-driven mechanism and the fast adaptive numerical
algorithm employed. The simulation framework of DSED will
be further illustrated and explained in great detail in the near
future papers.
Compared with experimental results, the relative errors of the
simulated results are also listed in Table VI. The calculation
formula of the relative error is shown in (15), where xsimulated
and xexperimental are vectors of the same length, and x stands for
module current is1 or module voltage us1 . Relative errors of
DSED simulated results are close to those of Saber results, and
smaller than those of Simulink results
xsimulated − xexperimental 2
Relative Error = × 100%. (15)
xexperimental 2
For further illustrations of the simulated errors of different
tools, Fig. 21(a) presents the comparisons of the total loss of
Fig. 20. Experimental and simulated results of the switching-ON transient in the studied switching module. The calculation formula of Eloss
detail. is shown in (16), where Eloss is an increasing function of time.
At each time step, the relative error of the simulated Eloss com-
pared with the experimental Eloss is calculated according to (17)
current is1 and the module voltage vs1 . Theoretically, Saber with and plotted in Fig. 21(b). As can be observed, the relative er-
physical model igbt_b can guarantee high accuracy of switching rors of Eloss calculated with DSED and Saber simulated results
transients, on the premise of highly accurate model parameters. are close, while the switching loss cannot be obtained from
Nevertheless, without supplementary experiments, it is impos- Simulink results
 t
sible to acquire physical model parameters such as the device
active area and the high-level excess carrier lifetime, making Eloss (t) = is1 · us1 · dt (16)
0
this model impractical. Instead, DSED simulated results with
|Eloss simulated (t) − Eloss experimental (t)|
PAT model are of sufficient exactness with a datasheet-based Relative Error(t) = .
parameter extraction. In addition, it is evident that employing Eloss experimental (t)
transient models brings about significant instability in Saber (17)
simulations, and the equations are frequently too sensitive to
converge. On the contrary, DSED with the PAT model can con-
quer such challenge. V. CONCLUSION
Apart from the physical model, datasheet-driven behavioral This paper proposes and demonstrates a PAT model for
models produced by Saber Model Architect Tool can also be em- switching device commutation units in power electronic sys-
ployed in simulations [33]. Compared with the PAT model, the tems, taking an IGBT–p-i-n diode commutation unit as an ex-

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 SHI et al.: PIECEWISE ANALYTICAL TRANSIENT MODEL FOR POWER SWITCHING DEVICE COMMUTATION UNIT 5733

TABLE VI
EXECUTION TIME COMPARISONS OF THE STUDIED DC–AC INVERTER CASE FOR SIMULATING 0.2 s

Fig. 22. Transfer characteristics given by Mitsubishi IGBT datasheet.

Fig. 21. (a) Total loss of the switching module calculated with the experimen-
tal and simulated results. (b) Relative errors of the total loss calculated with the
simulated results compared with that calculated with the experimental results. behavioral fitting. This generates a comparatively large error
when the load current is small. Another example is the reverse
recovery current Irr , which is considered dominated by load cur-
ample. This model attempts to secure both the accuracy and rent only. In fact, Irr depends mostly on load current, but also
the practicability of the switching transient simulations. Distin- on the IGBT current rise rate dic /dt before reverse recovery.
guished from conventional single-device models implemented Further work will be conducted to improve the modeling accu-
as high-order equivalent circuits, PAT model utilizes a source racy. In addition, the proposed PAT modeling can be adopted
combination to represent IGBT–p-i-n diode pair. According to to build transient models for other devices, such as silicon car-
different transient stages, it has CVS mode and VCS mode. bide (SiC) MOSFET and gallium nitride high electron mobility
The proposed approach ensures a reduced-order model. Com- transistor (GaN HEMT). With much faster switching transients,
parisons confirm that PAT model is of sufficient accuracy with more precise modeling of the stray parameters has to be con-
fast solving speed, whose parameters can be directly extracted sidered. Further work will focus on adopting the more precise
from device datasheet. Transient models in Saber encounter the stray parameter model, for better description of the SiC and
obstacle of convergence in complicated power electronic con- GaN switching transients, meanwhile improving the simulation
verters with numerous devices, while DSED with PAT model efficiency.
can easily converge with high calculation speed. Such improve- Utilizing PAT model and DSED framework, large time-
ments originate from the reduced-order PAT model, the event- scale system-level dynamics and small time-scale device-level
driven simulation mechanism, and the quantization of state switching transients can be simulated simultaneously with high
variables. precision and efficiency. This is expected to improve the analy-
Further work will focus on establishing a combined elec- sis, design, and control of power electronic systems.
trothermal model. With thermal modeling techniques such as
those demonstrated in [20]–[23], the PAT model would pro-
vide more accurate results. Besides, to ensure practicability and APPENDIX A
PARAMETER EXTRACTION OF PAT MODEL
avoid additional experiments, complicated physical modeling
approaches are abandoned in some stages in switching tran- The device performance curves selected from manufacture
sients, such as the current fall stage which is modeled with datasheet [19] are presented in Figs. 22–24.

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 5734 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 6, JUNE 2019

TABLE VII
TEMPERATURE-DEPENDENT EQUATIONS OF THE MODEL PARAMETERS

Fig. 23. Capacitance characteristics given by Mitsubishi IGBT datasheet, and Fig. 24. Reverse recovery characteristics given by Mitsubishi IGBT datasheet.
the simplified model utilized in this paper for the Miller capacitance C gc .

ID , current change rate di/dt and so on. For simplicity, Equation

The transfer characteristics provided by datasheet can be ob- (A.3) illustrates the fitting expressions of Irr and trr , where A, B,
served in Fig. 22. By using (5) to fit the curve, K as the equivalent C, and D are coefficients. Equation (A.3) are two linear functions
IGBT transconductance and VT as the threshold voltage can be in the logarithmic coordinate system, which coincides with the
obtained. Output characteristics can also be adopted to extract curves in the datasheet
them.
Fig. 23 depicts the capacitance characteristics. The relation- Irr = AID B
ships between the three capacitances in the datasheet and the
trr = CID D . (A.3)
three capacitances in PAT model are described by
Cies = Cge + Cgc APPENDIX B
TEMPERATURE DEPENDENCE OF THE MODEL PARAMETERS
Coes = Cce + Cgc
Based on previous literatures, the following expressions de-
Cres = Cgc . (A.1) scribing the temperature dependence of the model parameters
Cge is a constant capacitance, which can be extracted by can be derived. The results are summarized in Table VII.
Cies − Cres . For Cgc , based on the analyses in Section II-C, Datasheets usually provide parameters under reference tem-
this nonlinear capacitance can be simplified, as illustrated in peratures, such as 25, 125, and 150 °C. They can be adopted to
 √ calculate or fit the coefficients in Table VII, i.e., α, β, γ, η, κ.
λ/ vce − vge , vcg > Vlim Note that in (B.3), (B.4), and (B.5), Qrr , trr , and Vsat are also
Cgc = (A.2)
Coxd , vcg < Vlim . functions of the load current IL . IL has to be kept constant when
fitting the temperature-dependent coefficients.
The reverse recovery peak current Irr and the reverse recovery Other parameters in the PAT model, such as Cge , Coxd , λ etc.,
time trr are determined by multiple factors, such as load current have been proven to be Tj independent [7], [40].

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 SHI et al.: PIECEWISE ANALYTICAL TRANSIENT MODEL FOR POWER SWITCHING DEVICE COMMUTATION UNIT 5735

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[21] J. H. Lee and B. H. Cho, “Large time-scale electro-thermal simulation for Bochen Shi (S’17) was born in Dalian, China, in
loss and thermal management of power MOSFET,” in Proc. IEEE 34th 1995. He received the B.S. degree from Tsinghua
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formation,” IEEE Trans. Power Electron., vol. 30, no. 5, pp. 2556–2569, His research interests include modeling of power
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modules with unbalanced stray parameters,” IEEE Trans. Power Electron., power converters.
vol. 32, no. 2, pp. 1385–1399, Feb. 2017.

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 5736 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 34, NO. 6, JUNE 2019

Zhengming Zhao (M’02–SM’03–F’18) received the Yicheng Zhu (S’17) received the B.S. degree in elec-
B.S. and M.S. degrees in electrical engineering trical engineering from Tsinghua University, Beijing,
from Hunan University, Changsha, China, in 1982 China, in 2017, where he is currently working toward
and 1985, respectively, and the Ph.D. degree from the M.S. degree in electrical engineering.
Tsinghua University, Beijing, China, in 1991. His current research interests include simulation
He joined the Department of Electrical Engineer- of power electronic systems and modeling of power
ing, Tsinghua University, in 1991. From 1994 to semiconductor devices.
1996, he was a Postdoctoral Fellow with Ohio State
University, Columbus, OH, USA, and then was a vis-
iting scholar with the University of California, Irvine,
CA, USA, for one year. He is currently a Professor
with the Department of Electrical Engineering and the Deputy Director with
the State Key Laboratory of Power System, Tsinghua University. His research
interests include high-power electronics conversion, motor control, solar energy
applications, and wireless power transfer.
Dr. Zhao is a Fellow of the Institution of Engineering and Technology, U.K.,
the Vice-President of the Power Electronics Society of China Electrotechnical
Society, the Vice-President of the Beijing Power Electronics Society, and the
Chairman of Beijing Chapter, IEEE Power Electronics Society.

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