Freescale Semiconductor AN419

Application Note Rev. 0, 12/1993

NOTE: The theory in this application note is still applicable,

but some of the products referenced may be discontinued.

UHF Amplifier Design Using Data Sheet

Design Curves
INTRODUCTION k [y12 y21 + Re (y12y21)] g22
GL =  -- g22
The design of UHF amplifiers usually involves a particular 2 g11
set of device parameters of which h, y, and s parameters
are probably the most familiar. These parameters are (Gs + g11) Zo
Bs = -- b11
commonly used to determine device loading (input and k [y12 y21 + Re y12y21]
output) admittances for particular gain and stability criteria.
The design procedure for determining gain and stability (GL + g22) Zo
usually involves a mathematical solution, a graphical BL = -- b22
approach, or a combination of both. k [y12 y21 + Re (y12y21)]
This report describes a design technique for the Where,
unneutralized case whereby the device loading admittances
are taken directly from device design curves. An example (Bs+b11)(GL+g22) + (BL+b22) k (L+M)/2 (GL+g22)
Z=
is given of how these design parameters are used to design k (L + M)
a single stage 1 GHz microstrip amplifier and predicted L = y12y21
results are compared to actual measured values. Practical
circuit construction techniques are also discussed for the M = Re (y12y21)
benefit of readers unfamiliar with microstrip techniques. Defining D as the denominator in GT expression yields:
Z4 [k (L + M) + 2M] Z2
STABILITY CONSIDERATIONS D= + -- 2NZ k (L + M) + A2 + N2
4 2
Two very important methods1 for expressing stability
involve Linvill’s stability factor “C” and Stern’s stability factor where,
“k”. The first deals primarily with the device since an open k (L + M)
A= -- M,
termination is assumed on both the input and output and is 2
formulated:
N = Im (y12y21),
y12 y21 and,
C= .
2g11 g22 -- Re (y12 y21) Zo = that real value of Z which results in the smallest
If “C” is greater than 1, the transistor is potentially minimum of D, found by setting,
unstable. However, if C is less than 1, the transistor is
dD
unconditionally stable. The C factor versus frequency for the = Z3 + [k (L + M) + 2M] Z -- 2N k (L + M) .
dZ
common base and common emitter configurations (2N4957)
are shown in Figures 10 and 17 respectively. equal to zero.
The second method is primarily circuit oriented and is
used to compute the relative stability of an actual amplifier 4 Re (Ys) Re (YL) y212
GT =
circuit for the particular source and load terminations used. (y11 + Ys) (y22 + YL) -- y12y21)2
If “k” is greater than 1, the circuit is stable. If “k” is less than
k = Stern’s stability factor
1 the circuit is potentially unstable.
Gs = Real part of the source admittance
Stern has developed equations for calculating the input
GL = Real part of the load admittance
and output loading admittances for maximum power gain
Bs = Imaginary part of the source admittance
with a particular stability factor, k. These values of input and
BL = Imaginary part of the load admittance
output admittances in conjunction with the device parameters
g11 = Real part of y11
can then be used to calculate the transducer gain.1
g22 = Real part of y22
2 (g11 + Gs) (g22 + GL) YL = Complex load admittance
k= Ys = Complex source admittance
y12 y21 + Re (y12 y21)
GT = Transducer gain
k [y12 y21 + Re (y12y21)] g11 YIN = Input admittance
Gs = -- g11 YOUT = Output admittance
2 g22
Gmax = Maximum gain without feedback

 Freescale Semiconductor, Inc., 1993, 2009. All rights reserved. AN419

RF Application Information
Freescale Semiconductor 1
 Computer solutions of these equations for various values of a lumped--constant element, would be a lossless coil. This
of k versus frequency have been plotted in Appendix I for the loading will result in a stability factor, k, of 4 and a power
2N4957. These curves include common-base (Figures 10 gain of 15 dB, the maximum power gain possible for k = 4.
through 16) and common-emitter (Figures 17 through 22). This loading does not include stray capacitance. If stray
From these curves, the designer can determine the input capacitance is assumed to be 1 pF, the actual load is
and output loading admittances for maximum power gain at 1.53 mmhos, --j13.5 mmhos (see Figure 1).
a particular circuit stability. In addition, the transducer power
gain under these conditions can also be determined. Thus
the designer, rather than reading s or y parameters from a
curve and using this information to design an amplifier, has INPUT
all the design equations solved and presented in convenient, NETWORK
computer-derived design curves.
The following example demonstrates how these curves
50 
can be utilized in the design of a 1 GHz amplifier using the
2N4957. In addition, a second example is shown to (69.5 + j21.3) mmhos
demonstrate the special case where input admittance is
determined primarily by noise figure considerations rather
than by maximum power gain. 2N4957
UNDER
1 GHz AMPLIFIER DESIGN TEST

A preliminary investigation of stability and power gain,

common-emitter and common-base, can be quickly made
from the design curves. For instance, the unilateralized gain (1.53 + j13.5) mmhos
(Figure 8) at 1 GHz is approximately 15 dB for either the
common-emitter or common-base configuration. Also, the C
factor for the common-base configuration (Figure 10) is
OUTPUT
greater than one and indicates potential device instability. NETWORK
However, the C factor for the common-emitter configuration
(Figure 17) is less than one and indicates unconditional 50 
device stability.
Figures 16 and 22 are key curves that show transducer f = 1 GHz
power gain for the common base and common emitter VCE = 10 V
configuration respectively. Assuming a circuit stability factor IC = 2 mA
of 4*, power gain is approximately 15 dB, common--base.
Although the common-emitter curve is not extended to 1 GHz Figure 1. Common Base Input and Output Admittances
(since this is a region of unconditional stability) power gain Including Stray Capacitance
for k = 4 would be obviously much less than 15 dB.
To facilitate instrumentation, both the source and load
Using the common base configuration with k = 4, the
impedance will be 50 ohms. This admittance level must be
required input and output admittance for maximum power
transformed to the required device loading admittance. Micro
gain can be determined directly from Figures 11 through 16.
strip techniques provide a convenient method of achieving
For instance, the real part of the output admittance can
this transformation without circuit reproducibility and
be read from either Figure 11 or 12. Figure 12 is an expanded
component loss problems that are common with many
version of Figure 11 and is intended to facilitate lower
lumped constant circuits at this frequency.
frequency use. The imaginary portion of the output
The Smith Chart is a convenient design tool for solving
admittance is shown in Figure 13. Figures 14 and 15 show
transmission line problems of this type. Since space does
the real and imaginary portions of the input admittance
not permit, familiarity with this chart will be assumed.
respectively. The resultant input and output admittances are
Starting with the output circuit, both the 50 ohm
shown in Figure 1 and are summarized:
(20 mmhos) load and the desired collector admittance are
Conditions: (2N4957) plotted on the Smith Chart (see Figure 2). As a starting point,
VCE = 10 V a characteristic admittance of 20 mmhos will be assumed.
IC = 2 mA First, the 20 mmho load is plotted (point A, Figure 2), then
f = 1 GHz point B is plotted (1.53 mmhos --j13.5 mmhos).
GT = 15 dB Although many different methods exist for transforming
k =4 point A to point B (see Figure 2), a direct, and as it turns
Input admittance = 69.5 mmhos +j27.1 mmhos out, practical approach is that shown in Figure 3. This circuit
Output admittance = 1.53 mmhos --j7.46 mmhos uses C1 in parallel with RL to vary the SWR of point A
It becomes apparent that the emitter must “see” an (Figure 2) to point C. Since point C has the same SWR as
admittance of 69.5 mmhos shunted by a susceptance of
+j27.1 mmhos. The latter, in terms of a lumped constant
element, would be a lossless capacitor. Likewise, the * For the purpose of this report a stability factor of 4 is chosen. Values
collector would be required to see an admittance of of k less than 4 may not prove to be advantageous from the
1.53 mmhos shunted by --j7.46 mmhos. The latter, in terms standpoint of regeneration and parameter spread.

AN419
RF Application Information
2 Freescale Semiconductor
 variable component C1 is more convenient. A typical curve
of Q versus capacitance for (C1) is shown in Figure 4.
The output bias is fed through a 4000 ohm resistor rather
than an RF choke. The resultant 8 volt drop across this
resistor is easier to contend with than the circuit instabilities
sometimes associated with RF chokes.
The same procedure is followed in designing the input
network (see Figure 5). Again, a stray capacitance of 1 pF
is assumed. Thus, the actual input loading becomes
69.5 mmhos +j21.3 mmhos. First, the 20 mmho load is
Chart Not Available Electronically plotted (see Point T, Figure 6). Next, point W is plotted
(69.5 mmhos +j21.3 mmhos). Adjusting the SWR with C3
(point V) allows a transmission line of length L2 to transform
the admittance at point V to the desired level at the base
(point W).

LEADS CUT, CONNECTIONS CONNECTIONS MADE

TO BODY OF CAPACITOR TO UNCUT LEADS
100
60
1 -- 10 pF CAPACITOR

UNLOADED Q FACTOR, Qu
40
30
Figure 2. Output Network Design 20 4 -- 6 pF CAPACITOR

10
8 LEADS CUT, CONNECTIONS
6 TO BODY OF CAPACITOR
GR-874-KL
COUPLING 4 CONNECTIONS MADE
CAPACITOR 3 TO UNCUT LEADS
L1
2
RL = 50 
1
C2 C1 0.5 1.0 5.0 10 30 50
1 -- 10 pF 1 --10 pF 4k
C, CAPACITANCE (pF)

470 pF Figure 4. Q versus Capacitance for C1 @ 1 GHz

VCC

Figure 3. Output Network

GR-874-KL L2
RS = 50 
point B, a line L1 with an electrical length equal to 0.4052
(point E) minus 0.214 (point D) will c omplete the C3 C4
transformation. Collector tuning is available with component 4k 0.4 -- 6 pF 0.4 -- 6 pF
C2. This variable capacitor provides the difference between
the assumed stray capacitance and the actual circuit stray
capacitance. 470 pF
The required SWR could have been realized by using an
inductor in place of C1. However, an inductor would have VEE
either forced the bias feed-point to be changed to the
collector lead or necessitated a dc-isolated coil. Although this Figure 5. Input Network
is readily attainable using transmission line techniques, the

AN419
RF Application Information
Freescale Semiconductor 3
 increases for larger values of characteristic impedance and
may prove to be quite significant for other laminates or
narrower line widths. A good precaution would be to measure
wavelength versus line width on each laminate used before
TEM propagation is assumed.
Although the lines can be produced by a masking-etch
process, adequate results can be obtained by cutting the
desired strip from a thin copper sheet and gluing this strip
to the teflon glass board. The latter is a convenient method
for making rapid design changes.
Chart Not Available Electronically The author observes several precautions which may or
may not be necessary for all applications:
1. All breadboards have a ground strap which encompasses
the outer periphery of the board. This strip is soldered to
both the top and bottom copper sheets to effectively ground
the outer periphery of the amplifier on all four sides. The
circuit dimensions are held to a minimum to keep the
ground planes as short as possible.
2. All RF connectors are carefully connected with grounding
surfaces soldered to the ground plate. For instance, mount
the connectors* perpendicularly to the board at a point
Figure 6. Input Network Design
where the connection to the center conductor is a minimum
CIRCUIT CONSTRUCTION length. Completely solder the outer conductor to the
copper sheet on the opposite side of the board. Poorly
The transmission line lengths L1 and L2 are readily mounted connectors may result in poor transitions and
transferred to micro-strip lengths once the wavelength and unpredictable impedance transformations. For example,
line-width are known. Hopefully, this information is available tacking the outer barrel of this connector to the line side of
from the manufacturer, but if not, it must be measured before the board may seriously alter the predicted impedance
the design can be completed. The laminate used for this level at the collector.
application required a line-width of approximately 0.16 inches The amplifier was constructed as specified and the
for a 20 mmho characteristic admittance. This value proved admittance levels were measured at the emitter and collector
adequate both from a realizable design solution on the Smith pins. These admittance levels were checked and adjusted
Chart and also from a practicable circuit construction to the original design values with C1, C2, C3, and C4.
standpoint. The 2N4957 was then soldered directly into the circuit
The actual laminate thickness depends to a large extent with minimum lead length. The resultant power gain was
on the desired characteristic impedance and the frequency 14.3 dB and the noise figure, 6.5 dB, which is within 1 dB
of operation. The line thickness for a 50 ohm line is of the original design requirements. Attempts to re-adjust the
approximately 0.16 inch for a 1/16 inch laminate and input loading and output loading for lower noise figure
approximately 0.035 inch for the same laminate 1/64 inch resulted in lower noise figure with decreased circuit stability.
thick. As the intended frequency of operation is increased, Although the circuit (adjusted for minimum noise figure) didn’t
the line width becomes a larger percentage of the line oscillate, the calculated k factor from the resultant input and
length.4 Higher ratios of line width to length may result in output admittances was approximately 2.
undesirable modes of operation. Decreasing the laminate
thickness results in a smaller line width for the same LOW NOISE DESIGN
characteristic (assuming TEM operation) and a smaller line
Improvement in noise figure is possible by arbitrarily
width to length ratio.
adjusting the input and output loading. For the purpose of
The dielectric constant for the material used was 2.6. The
this paper, the stability factor (k = 4) will be retained.
actual wavelength in the laminate is:
However, the design curves represent the maximum
 (air) 11.8 inches power gain case. Although the circuit stability factor can be
 (actual) = = = 7.34 inches maintained at k = 4, varying the source loading will result
2.6 2.6
in less power gain than indicated in the design curves.
Since L1 = 0.191, The procedure for this case is as follows:
The physical length of L1 is 1.4 inches First, the optimum source resistance is calculated (see
Correspondingly, L2 is 0.062 or 0.455 inches. Appendix) and found to be 43.** The calculated noise figure
for this source is 5 dB. In addition, the source reactance was
It should be pointed out that the actual wavelength3 for empirically determined to be inductive (j119).
this laminate is somewhat larger than that calculated from
the dielectric constant. A careful measurement 4 of
*General Radio Cable Connector 874-G58B.
wavelength versus characteristic impedance (line width) **The actual value of optimum source resistance was empirically
demonstrates this phenomena. The slight increase in determined to be 35. Consequently this value was used for the
wavelength (6%) from that calculated using the dielectric input circuit design rather than 43.
constant was judged insignificant. However, this error

AN419
RF Application Information
4 Freescale Semiconductor
 Second, the collector loading was calculated for a stability required re-design (see Figure 7). The calculated value of
factor of 4. Using these values of source resistance and this line length is 1.15 inches as contrasted with .46 inches
stability factor, the calculated gain (GT) and collector loading used in the first example. The complete amplifier is shown
is 11.8 dB and 3.41 mmhos -- 7.5 mmhos (neglecting stray in Figure 9.
capacitance). The resultant power gain and noise figure was 11.8 dB
The output network was readily adjusted to the desired and 5.5 dB. These figures compare well with the calculated
collector loading. However, the input line was too short and design.

40

G U , UNILATERALIZED POWER GAIN (dB)

COMMON EMITTER

30
Chart Not Available Electronically
COMMON BASE
20

10
VCE = 10 Vdc
IC = 2.0 mA
0
10 20 30 50 70 100 200 300 500 700 1000 1500
f, FREQUENCY (MHz)

Figure 7. Low Noise Input Design Figure 8. Unilateralized Power Gain versus Frequency

COMMON BASE
5.0

-- 5.0 RANGE OF RANGE OF

“C” FACTOR

UNCONDITIONAL POTENTIAL
STABILITY INSTABILITY

-- 10

VCE = 10 Vdc
-- 15
IC = 2.0 mA

-- 20
45 70 100 200 300 500 700 1000 1500
f, FREQUENCY (MHz)

Figure 9. 1 GHz Amplifier Figure 10. Linvill Stability Factor versus Frequency

AN419
RF Application Information
Freescale Semiconductor 5
 COMMON BASE COMMON BASE

-- B L , IMAGINARY PART OF LOAD ADMITTANCE (mmhos

G L , REAL PART OF LOAD ADMITTANCE (mmhos)
12 14
0.8 VCE = 10 Vdc VCE = 10 Vdc
IC = 2.0 mA IC = 2.0 mA
10 12
0.6
k = 10
10
8.0 4.0
0.4 k = 10
8.0
6.0 2.0
0.2 6.0
4.0 k = 1.2 THRU 10
4.0 1.2 4.0
0 2.0
200 300 500 700 1000
2.0 2.0
1.2
0 0
200 300 500 700 1000 1500 200 300 500 700 1000 1500
f, FREQUENCY (MHz) f, FREQUENCY (MHz)

Figure 13. Load Admittance versus Frequency

Figures 11 and 12. Load Admittance versus Frequency (Imaginary)
(Real)

COMMON BASE

B L, IMAGINARY PART OF SOURCE ADMITTANCE (mmhos)

COMMON BASE
G S , REAL PART OF SOURCE ADMITTANCE (mmhos)

70 k = 1.2
240
VCE = 10 Vdc 2.0
60
IC = 2.0 mA 4.0
200
50
160 10
k = 10
40

120 30
4.0
20
80 2.0
10 VCE = 10 Vdc
40 IC = 2.0 mA
1.2 0
0 200 300 500 700 1000 1500
200 300 500 700 1000 1500 f, FREQUENCY (MHz)
f, FREQUENCY (MHz)

Figure 14. Source Admittance versus frequency (Real) Figure 15. Source Admittance versus Frequency
(Imaginary)

COMMON BASE COMMON EMITTER

40 4.0
RANGE OF
RANGE OF UNCON-
k = 1.2 POTENTIAL
DITIONAL
G T, TRANSDUCER GAIN (dB)

30 INSTABILITY
2.0 3.0 STABILITY
“C” FACTOR

20 4.0 2.0

10
15
1.0
VCE = 10 Vdc VCE = 10 Vdc
IC = 2.0 mA IC = 2.0 mA
10 0
200 300 500 700 1000 1500 10 20 30 50 70 100 200 300 500 700 1000 1500
f, FREQUENCY (MHz) f, FREQUENCY (MHz)

Figure 16. Transducer Gain versus Frequency Figure 17. Linvill Stability Factor versus Frequency

AN419
RF Application Information
6 Freescale Semiconductor
 -- B L , IMAGINARY PART OF LOAD ADMITTANCE (mmhos)
COMMON EMITTER COMMON EMITTER
2.0 6.0
G L, REAL PART OF LOAD ADMITTANCE (mmhos) k = 10 VCE = 10 Vdc
IC = 2.0 mA 5.0
1.5
4.0
4.0
1.0 3.0 k = 1.2
4.0
2.0 10
2.0

0.5
1.2 1.0 VCE = 10 Vdc
IC = 2.0 mA

0 0
45 70 100 200 300 500 600 45 70 100 200 300 500 600
f, FREQUENCY (MHz) f, FREQUENCY (MHz)

Figure 18. Load Admittance versus Frequency (Real) Figure 19. Load Admittance versus Frequency
(Imaginary)

COMMON EMITTER COMMON EMITTER

-- B S, IMAGINARY PART OF SOURCE ADMITTANCE (mmhos)

G S , REAL PART OF SOURCE ADMITTANCE (mmhos)

80 80
VCE = 10 Vdc VCE = 10 Vdc
IC = 2.0 mA IC = 2.0 mA

60 60
k = 10

40 k = 1.2
40 4.0
4.0 10

2.0
20 20

1.2
0 0
45 70 100 200 300 500 600 45 70 100 200 300 500 600
f, FREQUENCY (MHz) f, FREQUENCY (MHz)

Figure 20. Source Admittance versus Frequency (Real) Figure 21. Source Admittance versus Frequency
(Imaginary)

COMMON EMITTER
50
k = 1.2
40
G T, TRANSDUCER GAIN (dB)

2.0
30
4.0

10
20

15
VCE = 10 Vdc
IC = 2.0 mA
10
45 70 100 200 300 500 600
f, FREQUENCY (MHz)

Figure 22. Transducer Gain versus Frequency

AN419
RF Application Information
Freescale Semiconductor 7
 APPENDIX Using Stern’s stability equator for k = 4 (see Table 1):
2 (g11 + Gs) -- (g22 + GL)
LOW NOISE DESIGN k=
y12 y21 + Re (y12 Y21)
The procedure followed in designing this amplifier is to
first calculate the optimum source resistance for optimum and calculating GL for GS = 25 mmhos (40 ohms)
noise figure and then calculate the collector loading for a GL = 3.41 mmhos
required value of k.
The transducer gain can be calculated from these
A first approximation of optimum source resistance for
impedance levels:
optimum noise figure is:2
k1 4 Re (Ys) Re (YL) y212
RgF(opt) = k22 + GT =
k3 (y11 + Ys) (y22 + YL) -- y12 y21)2

GT = 11.8 dB
re
k1 = rb +
2
k2 = rb + re Table 1.
f = 1 GHz VCB = 10 V IC = 2 mA
1 + (Bo + 1)  2
f
yib = 25 --j25
fb
k3 = yob = 0.55 +j7.54
2Bore
yfb = -- 4.99 +j41
Assuming the above parameters for the 2N4957 are:
rb = 12.5 ohms yrb = -- 0.01 --j1.19
re = 13 ohms
REFERENCES
Bo = 40
fb = 1600 MHz, 1. R. Hejhall, “RF Small Signal Design Using Admittance
∴ RgF(opt) = 43 ohms Parameters”, Freescale Application Note AN-215A,
Freescale Semiconductor Products, Inc., Phoenix,
The noise figure using this source resistance is available Arizona.
from Nielsen’s equation:2 2. E. G. Nielsen, “Behavior of Noise Figure in Junction
Transistors,” Proc. IRE, Vol. 45, p. 957, July 1957.
re rb (Rg + re + rb)2  f 2
NF = 1 +
2Rg
+
Rg
+
2 Bo Rg re
1 + (Bo + 1) 
fb
3. F. Assadourian and E. Rimai, “Simplified Theory of
Microstrip Transmission Systems”, Proc. IRE, pp.
1651--1663, December 1953.
Using the previous parameter values, 4. M. Arditi, “Experimental Determination of the Properties of
NF = 5 dB Microstrip Components,” Electrical Communication,
Since the impedance level is different at the base, the December 1953.
collector loading must be re-designed.

AN419
RF Application Information
8 Freescale Semiconductor
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AN419
RF Application Information
AN419
Rev. 0, 12/1993
Freescale Semiconductor 9