Digital Systems Design

Sequential Circuit Analysis

Dr. Aqeel Sahi

 Analysis of Clocked Sequential Circuits
Analysis is describing what a given circuit will do
The output of a clocked sequential circuit is determined by
1. Inputs
2. State of the Flip-Flops

Analysis Procedure:
1. Obtain the equations at the inputs of the Flip-Flops
2. Obtain the output equations
3. Fill the state table for all possible input and state values
4. Draw the state diagram
Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 3
 Analysis Example
Is this a clocked sequential circuit?
YES!
What type of Memory?
D Flip-Flops
How many state variables?
Two state variables: and
What are the Inputs?
One Input:
What are the Outputs?
One Output:
Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 4
 Flip-Flop Input Equations
What are the equations on the inputs of the flip-flops?

and are the current state

and are the next state

The values of and will be

and at the next clock edge

Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 5
 Next State and Output Equations
The next state equations define the next state

At the inputs of the Flip-Flops

Next state equations?

There is only one output

What is the output equation?

Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 6
 State Table
State table shows the Next State and Output in a tabular form

Next State Equations: and

Output Equation: ′

Another form of the state table

Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 7
 State Diagram
State diagram is a graphical representation of a state table
The circles are the states
Two state variable Four states (ALL values of and )
Arcs are the state transitions
Labeled with: Input / Output

Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 8
 Combinational versus Sequential Analysis

Analysis of Combinational Circuits

Obtain the Boolean Equations Output is a function of
Fill the Truth Table input only

Analysis of Sequential Circuits

Obtain the Next State Equations
Next state is a function of
Obtain the Output Equations input and current state

Fill the State Table Output is a function of

input and current state
Draw the State Diagram

Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 9
 Example with Output = Current State
Analyze the sequential circuit shown below
Two inputs: and
One state variable
No separate output Output = current state
Obtain the next state equation, state table, and state diagram

Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 10
 Example with Output = Current State

Flip-Flop Input Equation:

⨁ ⨁

Next State Equation: 1 ⨁ ⨁

Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 11
 Sequential Circuit with T Flip-Flops

Circuit has two T Flip-Flops

One Input
One output
Two state variables: and
Obtain the T-FF input equations
Obtain the next state equations
Fill the state table
Draw the state diagram
Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 12
 Recall: Flip-Flop Characteristic Equation
For D Flip-Flop: 1 =
These equations
For T Flip-Flop: +1 = ⨁ ( ) define the Next State

For JK Flip-Flop: +1 = + ( )

D Flip-Flop T Flip-Flop JK Flip-Flop

D Q(t+1) T Q(t+1) J K Q(t+1)
0 0 Reset 0 Q(t) No change 0 0 Q(t) No change
1 1 Set 1 Q'(t) Complement 0 1 0 Reset
1 0 1 Set
1 1 Q'(t) Complement

Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 13
 Sequential Circuit with T Flip-Flops

T Flip-Flop Input Equations:

=
=
Next State Equations:
( +1 ⨁ ⨁
1 ⨁ ⨁
Output Equation:

Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 14
 From Next State Equations to State Table
T Flip-Flop Input Equations:

Next State Equations:

+1 ⨁

1 ⨁

Output Equation: Notice that the output is a function

of the present state only.
It does NOT depend on the input
Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 15
 From State Table to State Diagram

Four States: = 00, 01, 10, 11 (drawn as circles)

Output Equation: (does not depend on input )
Output is shown inside the state circle ( / )
Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 16
 Sequential Circuit with a JK Flip-Flops
One Input and two state variables: and (outputs of Flip-Flops)

No separate output Output = Current state

Obtain the JK input equations

Obtain the next state equations

Fill the state table

Draw the state diagram

Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 17
 JK Input and Next State Equations
JK Flip-Flop Input Equations:
= and = ′
= ′ and = ⨁

Next State Equations:

+1
1

Substituting:
1
1 ⨁ ′
Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 18
 From JK Input Equations to State Table

JK Input Equations: = , = ′, = ′ and = ⨁

Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 19
 From State Table to State Diagram
Four states: = 00, 01, 10, !" 11 (drawn as circles)
Arcs show the input value on the state transition

Analysis of Clocked Sequential Circuits COE 202 – Digital Logic Design © Muhamed Mudawar – slide 20