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We would like to thanks and profound gratitude towards our guide Prof. A.
M. Bhaware, Professor, Department of Electrical Engineering, Dr. Babasaheb
Ambedkar Technological University, Lonere, Raigad, Maharashtra, India for his
proficient and enthusiastic guidance, which served as a constant source of inspiration
for the completion of this work. His painstaking support and exhaustive involvement in
the conceptual understanding, conduction of simulation studies and hardware structure
aregratefully acknowledged.
We sincerely appreciate his pronounced individuality, humanistic and warm
personal approach and excellent facilities provided in the laboratory, which has given
us strength to carry out this work on steady and smooth course. We humbly
acknowledge a lifetime’s gratitude to him. We express my deep sense of gratitude to
the Head of Electrical Engineering Department, Prof. M.F.A.R. Satarkar, for
providing excellent laboratory and computing facilities of department for this work.
Date :-
Place :- Lonere
i
TIMELINE OF PROJECT
PHASE 1 :
ii
ABSTRACT
iii
INDEX
iv
LIST OF FIGURES
Sr.No. Name Of Figure Page.No.
2.1 Block Diagram 6
2.2 Circuit Diagram 7
3.2.1 IC DW01-A 10
3 2.2 IC HY2212-BB3A 11
3.2.3 SI2302 MOSFET 13
3.2.4 MMBT5551 Transistor 13
3.2.5 Battery Pack 14
3.2.6 PCB 15
v
LIST OF ABBREVIATIONS
vi