3-3

Verilog-A Compact Model for Oxide-based Resistive

Random Access Memory(RRAM)
Zizhen Jiang1, Shimeng Yu2, Yi Wu3, Jesse H. Engel1, Ximeng Guan4, H. –S. Philip Wong1
1Center for Integrated Systems and Department of Electrical Engineering, Stanford University, Stanford, CA 94305, USA,
2School of Computing, Informatics and Decision Systems Engineering, Arizona State University, Tempe, AZ 85281, USA,
3
Oracle America, Inc, CA USA, 4IBM Research, NY, USA
Email: [email protected], [email protected], [email protected]

Abstract—We demonstrate a dynamic Verilog-A the opposite electrode, is the primary variable determining
RRAM compact model capable of simulating real-time device resistance.
DC cycling and pulsed operation device behavior,
including random variability that is inherent to RRAM. TE
This paper illustrates the physics and capabilities of the
model. The model is verified using different sets of Oxygen vacancy
experimental data. The DC/Pulse parameter fitting
methodology are illustrated. Oxygen ion
Oxide Oxygen atom
Keywords—RRAM; Compact model; variations;
Verilog-A. BE

INTRODUCTION
I. 1D Simplification
Metal-oxide based bipolar resistive random access
memory (RRAM) is a promising candidate for the future of
nonvolatile memory technology [1]. To fulfill the increasing TE
need for high level simulation of emerging memories,
several analytical compact analytical models have been Tunneling gap (g)
developed to describe resistive switching behavior
[2][3][4][5][6]. However, these models fail to consider the
stochastic aspect of filament switching or were not Residual filament
implemented effectively for circuit simulation. In this paper,
Oxide
we demonstrate a dynamic RRAM compact model using the
circuit-compatible Verilog-A language. This RRAM BE
compact model takes into account filament growth
fluctuations and variations. The model is verified using both Fig. 1 Conceptual structure simplification for filament
DC switching data and pulse data. Pulse data fitting is found growth
to be more efficient, more representative of the practical
usage scenario, and follows more closely the physics of the
filament growth.
RRAM switching dynamics are modeled with a series of
related differential and constitutive equations (1-6) [2] [3].
II.VERILOG-A RRAM COMPACT MODEL The current conduction is exponentially dependent on the
tunneling gap distance, (1). This distance is found by
In this model, the complex process of ion and vacancy calculating the growth of the gap taking into consideration
migration was simplified into the growth of a single the electric field, temperature-enhanced oxygen ion
dominant filament that preserved the essential switching migration, (2) (3), and the local temperature due to Joule
physics (see Fig. 1) [1] [2] [3]. The size of the tunneling gap heating, (4).
(g), which is the distance between the tip of the filament and

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 
𝑔
𝐼 = 𝐼0 × exp⁡(− 𝑔 ) × sinh⁡(𝑉 )
𝑉
 A. DC Switching Fitting
0 0
The procedure of DC switching fitting is as follows.

dg
= −𝑣0 × exp (−
𝐸𝑎
) × sinh (𝑟 × 𝑡 × 𝑘𝑇 )
𝑎0 𝑞𝑉
 First, deterministic switching behavior is fitted.
dt 𝑘𝑇 𝑜𝑥
a. Measure a large number (no less than 100) of
 𝛾 = 𝛾0 − 𝛽 ∙ 𝑔3  experimental DC switching cycles from hardware. Pt /
HfOx(1.69 nm) / TiOx (4.97 nm) / TiN devices are
 𝑇 = 𝑇0 + 𝑉 × 𝐼 × 𝑅𝑡ℎ  
fabricated and tested for verification.
where V is the applied voltage across the cell, I is the b. The median I-V curve is used as a representative dataset
current through the cell, g is the average tunneling gap of the device characteristics. We compared the average
distance, Ea is the activation energy, a0 is the atomic (mean) curve and the median curve of 100 DC cycles.
spacing, tox is the oxide thickness, q is the elementary The average curve is the sum of currents at the same
charge, k is the Boltzmann constant, T0 is the room voltages at the same resistance states. The average I-V
temperature, Rth is the equivalent thermal resistance, and I0, switching curve is shown in the blue curve in Fig.
g0, V0, ν0, β, γ0, are fitting parameters. 2(a)(b)(d). The median curve is determined from the
median currents at the same voltages at the same
The use of equivalent thermal resistance in (4) allows us resistance states, and is shown in the red curve in Fig.
to avoid using the differential equation for the Joule heating 2(a)(b)(d). The transition curve from LRS to HRS of the
temperature used previously in the literature [3]. Currently, average curve shown in blue in Fig. 2(b) is
differential equations may require implementations outside unrealistically smooth and is not representative of the
the Verilog-A program, thereby rendering the Verilog-A experiment. Thereby we extract the model parameter
program ineffective. using the median curve.
c. The fitting is performed in MATLAB, where the
Stochastic and temperature-dependent filament difference between the median switching curve data and
migration (δg) is also included in the model (5) (6): model curve data is minimized.
0
𝛿𝑔
 ⁡𝛿𝑔 (𝑇) =  
{1+𝑒𝑥𝑝[
(𝑇𝑐𝑟𝑖𝑡 −𝑇)
]} a)
𝑇𝑠𝑚𝑡ℎ
400.0μ
𝑑𝑔 Grey Curves:
 𝑔|𝑡+∆𝑡 = ∫ ( + ⁡ 𝛿𝑔 × 𝜒(𝑡)) 𝑑𝑡  100 DC Cycles
𝑑𝑡
300.0μ Average Curve
where Tcrit (400–450 K) is a threshold temperature above Median Curve
Current (A)

which significant random variation of the gap size occurs,

χ(t) is a zero-mean Gaussian noise sequence with a root
mean square of unity, and δ0 and Tsmth (smoothing factor) 200.0μ
are fitting coefficients matching the resistance distribution
curves to experimental results. The total gap growth as a
function of time is shown in (6). 100.0μ

MODEL VERIFICATION
III. 0.0
Multiple devices are used to verify the model. Here, we -3 -2 -1 0 1 2
illustrate two fitting processes: DC switching fitting and Voltage (V)
pulse fitting. After setting the fitting parameters in the Fig. 2(a) Experimental 100 cycles DC switching curves
Verilog-A program to the extracted values, we can apply the (grey), average curve (blue) and median curve (red).
program in circuit-level simulation.

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 d)
1m
b)
150.0μ 100μ
10μ

Current (A)
1μ
100.0μ
Current (A)

100n
10n
Grey Curves:
50.0μ 1n 100 DC Cycles
100p Average Curve
Median Curve
10p
-3 -2 -1 0 1 2
0.0
1.0 1.5 2.0 Voltage (V)
Voltage (V) Fig. 2(d) Log scale DC switching curve, same data as in
Fig. 2(a).
Fig. 2(b) Zoom-in figure for fig. 2(a) SET part. Variations are added later by tuning the fitting
parameters in (5) to match the experimental data. Random
DC switching cycles generated by simulation are given in
Fig. 3(a).
c) B. Pulse Fitting
Data for pulse fitting is acquired by applying different
30 V pulse amplitudes (Fig. 3(b)) and different pulse widths
25 V
with various initial resistance values [2]. Pulse fitting is
important and necessary for the following reasons,
Counts (#)

20 (1) In a memory system, memory cells are written by a

write-and-verify scheme using a series of pulses [7].
Tracking memory system performance is especially
15 important for determining cell disturbance, enabling
storage failure recovery, etc.
10 (2) Filament evolution generally happens on a nanosecond
timescale. Accessing RRAM may take less than 10 ns,
5 which requires the modeling of RRAM device
behavior on the nanosecond time scale.
0 (3) Considering the nanosecond time scales of filament
0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 formation, simulating the DC switching I-V curve
SET Voltage (V) requires ~109 calculation per sweep with uniform
time steps. For larger time steps, the simulations
Fig. 2(c) Gaussian distribution of the SET voltages. inaccurately reflect the dynamics of the filament. As
observed from experimental data in Fig. 3 (b),
resistance tends to saturate after a certain elapsed
time. Thus DC fitting may not capture the switching
dynamics in the sub-100 nsec regime.

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 a) ACKNOWLEDGMENT
V.
This work was supported in part through the NCN-
100μ NEEDS program, which is funded by the National
Science Foundation, contract 1227020-EEC, and by the
Semiconductor Research Corporation, through Systems
1μ on Nanoscale Information fabriCs (SONIC), one of the
Current (A)

six SRC STARnet Centers, sponsored by MARCO and

DARPA, as well as the member companies of the Non-
10n Volatile Memory Technology Research Initiative
(NMTRI) at Stanford University, and through Samsung
RESET SET GRO program.
100p
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