= Problem 5.6 Interface an input port 74LS245 to read the status of switches SW, to SWg. The sw shorted, input a ‘1’ else input a ‘0’ to the microprocessor system. Store the status in address of the port is 0740H. Solution The hardware interface circuit is shown in Fig. 5.12. The address, control are assumed to be readily available at the microprocessor system. Ar As As Ae A A Ay Ao Scanned with CamScannerTHE ALP 1S GIVEN AS FOLLOWS: yoy BL. 00H + Clear BL for status ia wov OX. 0740H =; _ 16-bit port addrenss in Dx IW AL, DX + Read port 0740H for switch positions mov BL, AL ; Store status of switches from AL into BL hi : Stop Program 5.1 ALP for Problem 5.6, Here LSB bit of BL corresponds to the status of SW, and likewise the MSB of BL corresponds to the status of SW,. The ‘1’ indicates ‘on’ or shorted switch and the ‘0’ indicates an ‘off’ or opened switch. The pull-up registers in Fig. 5.12 are necessary because the open switches should input a ‘0’ to the system but the TTL port 74LS245 will read the free input as ‘1’. ( Free TTL inputs are always read aslogic'1’.) Problem 5.7 Design an interface of an input port 74LS245 to read the status of switches SW, to SWg (as in the previous problem), and an output port 74L$373 with 8086. Display the number of a key that is pressed, i.e. from 1 to 8 on a 7-seg display with help of the output port. Write an ALP for this task, assume that only one key is pressed at a time. Draw the schematic of the required hardware. The input port address is QO08H and the output port address is OO0AH. Solution In the previous problem, one might have noted that a lot of hardware is required to decode the port address absolutely. Thus instead of decoding the address completely, only a part of itmay be decoded. For example, instead of using 16 address lines A,.—Ap, one may use only Ag—Ap. In this problem, the address 0008H may then be converted to xxx8H, where x denotes a don't care Condition. Thus the port may have more than one address, for example 2358H, 1728H ete. Only the least significant nibble of the address needs to be 8H. The disadvantage of the scheme is that there are a number of addresses of the same port. Hence, the system must have only one port that has the lowest nibble address 8H, otherwise, the system may malfunction. Thus for smaller systems Containing a few /O ports, this scheme is suitable and advantageous as it requires less hardware. The status of the switches is first read into the register AL. For displaying the shorted switch fumber in the 7-seq display, the bit corresponding to the switch is checked by rotating AL through Carry and then checking the carry flag. If the carry flag is ‘1’, after one left rotation, it means SW, is On. Ifthe carry flag sets after two rotations, SW, is on and so on. Register CLis incremented after £ach rotation so that it contains the pressed switch number. The 8-bit contents of register CL are Converted to 7-segment codes by a BCD to 7-seg decoder. The complete hardware (Fig. 5.13) and the ALP is given as shown. Note that both the ports are interfaced at even addresses, ie. with lower order data bus, Dy-D,. Commen cathode displays are used along with corresponding BCD to 7-seg decoder. MOV BL, 00 ; Clear BL for switch status MOV CL, 00 ; Clear CL for switch number XOR AX, AX; Clear accumulators and flag TN AL,GBH — ; Read switch status Scanned with CamScannerYX: MOV AL.CL ; OUT OAH, AL HLT. 3 Stop Take switch numb ; Out BCD switch TURES. Program 5.2 ALP for or Dy-D; 7ALS245 8086 Microprocessor + System DIR ~ + t aden WR JOWR cs PAg ——f - Ce PA, ob Pay 1ORD- Dake CLK TALS373 BCD to Qs A 7S8eg. Be @ B Decoder PAy - CS (OE) ° = Problem 5.8 Using 74LS373 output ports and 7-segment di to 9. Draw the suitable hardware schematic and _ of 1secis available as a subroutine, Select the port Scanned with CamScannerolution The counter hardware is shown in Fig. 5.14. Common cathode displa ca ‘suitable BCD to 7-segment decoder. The ALP calls the subroutine CEE a ram of sec. After counting from 0 to 9, it again starts from 0. The output port i ai adaress 008H. ‘ The ALP for generating the seconds count is given below. clk Liwn—> a a 8086 TALS373 Microprocessor | 730” 2 ‘System Q3(Bs) }—>| a Tw € | Q(B.) 2 eae aed dept ies ommon | panne Q(B) L-—+4¢ Cathode) eto Ic} Qo(Bo) -——> 0 : | % [n> ene ban i 2702 ae = Fig. 5.14 Interfacing Circuit Diagram for Problem 5.8 XX: MOV AL, OOH ; Start from 00 YY ; XOR AL,AL ; Clear AL and flags OUT 08H,A : Display OH CALL DELAY : Wait for one second INC AL ; Increment count for next CMP AL,OA H ; display. Is it above 9H? JZ XX ; If yes, start from 00, OMP YY ; else continue Program 5.3 ALP for Problem 5.8 Multipléxed 7-seg Displays To display a single digit, at least one output port is required. Suppose one wants a 5-digit display for some practical application, Five such ports will be required, ic. tae hardware will be very complex and costly. To minimize the complexity and cost of hardware one may implement am almost visually identical display using only two ports. Suppose there are four 7-seg displays, numbered ',2,3 and 4, One of the two ports, say port! selects one of these displays, say display 1 ata time, while port sends the data to be displayed (1. a,b,c,de,f,@ and dp) to the first display for a fixed short duration, Port 1 Hext, Selects the display 2 and port 2 sends the appropriate display data to it. Each of the display unit remains oie for a short duration and the process continues in a loop. This is repeated at a high frequency so that of umnPlete display containing more than one7-seg display appeats to be stationary due to the persistence ofvision Instead of BCD to 7-seg decoder cireuit, look up table technique may be used or converting BCD lumbers to equivalent 7-seg codes. Scanned with CamScannerProblem 5.9 Draw a schematic hardware circuit for interfacing five, 7-seg displays (common a) win 80g5 using output ports. Display numbers 1 to 5 on them. continuously. The 7-seg cor i are stored ina look-up table serially at the address 2000:0000 H onwards starting from code for 1. i itput ports. The first Solution Let us select the two port addresses 0004H and 0008H for the out St pot 0004H outputs 7-seg code while the second output port 0008H selects the display by grounding the common cathode. The hardware is given in Fig. 5.15. : iven. For aLED to be ‘on’, that particu) The 7-seq codes for C.C. displays can be decided as given. D 5 ular anode should be 1 and the common cathode line should be grounded, using e port line that drives, a transistor, Thus for the numbers to be displayed the code is calculated as shown. Decimal a b c d e f g dp NOVA GA eR Se ce waeA ice Ago Ae Al A 1-4 1 0 0 0 0 0 o a= 4 1 0 1 1 0 1 0 3- 1 1 1 0 0 1 0 4— 0 1 1 0 0 1 1 0 bears 0 1 1 0 1 1 0 These codes are stored in a look up table starting from 2000H:0000, as shown below. 2000 : 0000 -» C0H 2000 : 0001 + DAH 2000 : 0002 > F2 H 2000 : 0003 > 66 H 2000 : 0004 > B6 H Only one display should be selected at a time, i.e. only the corresponding bit of port 2 should be high for selecting a common cathode display. All the other bits should be low to keep the other displays disabled. Thus to enable the least significant display, the LSB of the 8-bit selected port should remain ‘1’. Hence AL should have 01 or E1H in it to select the least significant display. The codes for the selection of displays and 7-segment codes directly depend upon the hardwared con nections between them: MOV AX, 2000H i Initialize pointer to MOV DS, AX ; Code table DS:Bx MOV BX, 0Q00H NEXT : MOV AL, OOH ; Get 1st number from the table. MOV DH,AL MOV CL, 05H : Count for display MOV DL, E1H + Selection code for 1st display AGAIN: XLAT 5 OUT 04H, AL 3 Out the code for the first i number to port 04H, MOV AL,DL i Get to be enabled display code. OUT O8H.AL ; Select Ist display ROL DL : decide code for selecting next INC DH ; display for next number MOV AL,DH + get next num. to be displayed. LOOP AGAIN : Repeat five times 4 OMP NEXT ; Continue the procedure : Program 5.4 ALP for Problem 5.9 Se Scanned with CamScannerScanned with CamScanner