Don Bosco Institute of Technology, Kurla

Academic Year 2024-25

EXPERIMENT NO: 1

Title: To verify the truth table of various logic gates using ICs.

Name of the student: Qazi Mohd Oaish

Roll No: 68
Batch: C
Division: B

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra

Subject: DLCA Lab
 Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

EXPERIMENT NO: 1
To verify the truth table of various logic gates using ICs.
AIM To study and verify the truth table of various logic gates using ICs.
LEARNING To learn the operation of logic gates by verifying its truth table using hardware
OBJECTIVE and simulation tool(LOGISIM).
LEARNING Students will be able to implement the hardware circuit and simulation of logic
OUTCOME gates.
LAB OUTCOME CSL 302.1: Ability of the student to remember and verify the truth table of logic
gates.
PROGRAM PO1-1, PO5-2, PO8-3, PO9-3, PO12-2, PSO1-2
OUTCOME
BLOOM'S Remember
TAXONOMY
LEVEL
THEORY Circuit that takes the logical decision and the process are called logic gates.
Each gate has one or more input and only one output.
OR, AND and NOT are basic gates. NAND, NOR and X-OR are known as
universal gates. Basic gates form these gates.
AND GATE:
The AND gate performs a logical multiplication commonly known as AND
function. The output is high when both the inputs are high. The output is low
when any one of the inputs is low.
OR GATE:
The OR gate performs a logical addition commonly known as OR function.
The output is high when one of the inputs is high. The output is low level when
both the inputs are low.
NOT GATE:
The NOT gate is called an inverter. The output is high when the input is low.
The output is low when the input is high.
NAND GATE:
The NAND gate is a contraction of AND-NOT. The output is high when both
inputs are low and any one of the inputs is low .The output is low when both
inputs are high.
NOR GATE:
The NOR gate is a contraction of OR-NOT. The output is high when both inputs
are low. The output is low when one or both inputs are high.
X-OR GATE:
The output is high when any one of the inputs is high. The output is low when
both the inputs are low and both the inputs are high.
APPARATUS
USED Bread-board, Multimeter, Power-supply (0-5V).
COMPONENTS
7400(Quad 2- input NAND), 7402(Quad 2- input NOR), 7408(Quad 2- input
AND), 7432(Quad 2- input OR), 7486(Quad 2- input EX- OR), 7404(Hex
inverter), Resistor 330Ω, LED.
SOFTWARE logisim-win-2.7.1 software

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra

Subject: DLCA Lab
 Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

USED
PIN DIAGRAMS

PROBLEM 1. Implement all logic gates and verify their truth-tables using hardware.
STATEMENTS 2. Implement the logical expression using AOI gates: Y=(AB+C)’
Content beyond syllabus:
1. Implement all logic gates and verify their truth-tables using simulation.
2. Implement a three input EX-OR gate.
3. Draw a simple logic circuit to represent the truth table below in which A and B
are inputs and X is the output.

PROCEDURE  Mount the IC chip on the bread-board.

(for hardware  The IC chip consists of 14 pins. The 14th pin is the supply voltage Vcc and
implementation) the 7th pin is the ground pin.
 The other 12 pins of the 14 pins can be used to receive output and give
inputs as per requirements.
 Connect +5V power supply in the circuit.
 Connect the resistor and use LED for output.
 The battery is switched ON and the LED glows according to the truth-
table of the respective gates.
OUTPUT 1. Implement all logic gates and verify their truth-tables
using hardware.
a. AND Gate

Observation Table
A B Y LED Status
0 0 0 OFF

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra

Subject: DLCA Lab
 Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

0 1 0 OFF
1 0 0 OFF
1 1 1 ON

When A = 1 and B = 1, Y =
Snapshot
1

b. NAND Gate

Observation Table
A B Y LED Status
0 0 1 ON
0 1 0 OFF
1 0 0 OFF
1 1 0 OFF

Snapshot When A = 1 and B = 1, Y = 1

c. OR Gate

Observation Table
A B Y LED Status
0 0 0 OFF
0 1 1 ON
Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra
Subject: DLCA Lab
 Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

1 0 1 ON
1 1 1 ON

Snapshot When A = 1 and B = 1, Y = 1

d. NOR Gate

Observation Table
A B Y LED Status
0 0 1 ON
0 1 0 OFF
1 0 0 OFF
1 1 0 OFF

Snapshot When A = 0 and B = 0, Y = 1

e. Ex-OR Gate

Observation Table
A B Y LED Status
0 0 0 OFF
0 1 1 ON
Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra
Subject: DLCA Lab
 Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

1 0 1 ON
1 1 0 OFF

Snapshot When A = 0 and B = 1, Y = 1

f. NOT Gate

Observation Table
A Y LED Status
0 1 ON
1 0 OFF

Snapshot When A = 0, Y = 1

2. Implement the logical expression using AOI gates:

Y=(AB+C)’

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra

Subject: DLCA Lab
 Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

Content Beyond Syllabus

1. Implement all logic gates and verify their truth-tables
using simulation
a. NOT Gate

b. AND Gate

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra

Subject: DLCA Lab
 Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

c. OR Gate

d. NAND Gate

e. NOR Gate

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra

Subject: DLCA Lab
 Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

f. Ex-OR Gate

2. Implement a three input EX-OR gate.

3. Draw a simple logic circuit to represent the truth table

below in which A and B are inputs and X is the output.

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra

Subject: DLCA Lab
 Don Bosco Institute of Technology, Kurla
Academic Year 2024-25

CONCLUSION We observed that:

1. The output of AND gate is one if both inputs are one.
2. The output of NAND gate is one if at least one input is zero.
3. The output of OR gate is one if at least one input is one.
4. The output of NOR gate is one if both inputs are one.
5. The output of Ex-OR gate is one if both inputs are unequal.
6. The output of NOT gate is one if input is zero.
REFERENCES 1. Installing Logisim-https://www.youtube.com/watch?v=SBWONlhvnAk
2. Simulation of Logic gates using Logisim- https://www.youtube.com/watch?
v=16POVzL4wRo
3. Truth-table design in Logisim-https://www.youtube.com/watch?
v=DeXck6s1i1M
4. R. P. Jain, “Modern Digital Electronic”, McGraw-Hill Publication, 4thEdition.

Class: S.E Comps (Sem III) Lecturer: Sejal M Chopra

Subject: DLCA Lab