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Technical report on combinational circuit and design

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11 views11 pages

report-on-combinational-circuit-design-autosaved-digital-electronics (1)

Technical report on combinational circuit and design

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prabirkundu241
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Report ON Combinational Circuit Design (Autosaved) Digital


electronics
Mechatronics engineering (Jomo Kenyatta University of Agriculture and Technology)

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REPORT ON COMBINATIONAL CIRCUIT DESIGN


Introductory theory
A logical expression can be conveniently and systematically expressed using Boolean Algebra, so named
after George Boole who invented it. The rules of Boolean Algebra are based on human reasoning. A
logical expression can be realized or implemented using logic gates to come up with a digital circuit.
Digital circuits are divided into two broad categories:

1. Combinational circuits

In these circuits, the outputs at any instant in time depend upon the inputs present at that instant of
time. These circuits have no memory capabilities.

2. Sequential circuits

The outputs of these circuits at any instant of time depend upon the present inputs as well as the past
inputs or outputs. This implies that these circuits have memory capabilities.

Combinational circuits
The design requirements of combinational circuits may be specified in the following ways:

a) A set of statements
b) Boolean expressions
c) Truth tables

There are two approaches to the design of combinational circuits. One is the traditional method, where
the given Boolean expression or the truth table is simplified by using standard methods and the
simplified expression is realized using logic gates. The other method does not require any simplification
of the logical expression or truth table; instead the complex logic functions available in medium scale
integrated circuits (MSI) can be directly used.

Design process for a combinational logic circuit.

 Statement of the problem


 Identification of input and output variables
 Expressing the relationship between the input and output variables.
 Construction of a truth table to meet the input-output requirements.
 Writing Boolean expressions for various output variables in terms of input variables. Here either
the Sum-of-Products approach or the Product-of-Sums approach may be used to come up with
the Boolean expression.
 Simplification of the resultant Boolean expression. The number of gates and the number of input
terminals for the gates required for the realization of a logical expression, in general, get reduced
considerably if the expression can be simplified. Thus, simplification of logical expressions is very
important as it saves the hardware required to design a specific system. Different techniques
may be used to simplify a Boolean expression such as:
i. Using Boolean algebra theorems
ii. Using Karnaugh maps

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iii. Using the Quine-McCluskey tabular method


 Implementation of the simplified Boolean expression using logic gates.

In our laboratory exercise, a logiator is used to build the combinational logic circuit. *expound on
logiator*

SECTION 1:

Statement of the problem.

Design a logic circuit for the function using Sum of Products (SOP) for the function:

Y = B́ C+ A Ć +AB Ć+ ACD


1) Implement the logic circuit using the basic gates. Tabulate your results.

In this case, the circuit is realized without first simplifying the Boolean expression.

A B C D Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1

2) Simplify using Boolean algebra and implement the logic circuit. Tabulate your results.

Y = B́ C+ A Ć +AB Ć+ ACD


By the Redundancy Law or Absorption Law, the term AB Ć is lost since the smaller term A Ć
occurs in the term AB Ć thereby making AB Ć redundant. The resultant expression is

Y = B́ C+ A Ć +ACD
The resulting combinational logic circuit is shown below, along with its truth table.

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A B C D Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1
3) Simplify using Karnaugh maps and compare the results with 2) above.

Y = B́ C+ A Ć +AB Ć+ ACD


Writing this out in its canonical form,

Y = B́ C ( A+ Á )( D+ D́ )+ A Ć ( B+ B́ ) ( D+ D́ ) + AB Ć ( D+ D́ ) + ACD( B+ B́)
After expansion of the expression above,

Y = A B́ CD+ A B́ C D́+ Á B́ CD + Á B́ C D́+ AB Ć D+ AB Ć D́+ A B́ Ć D+ A B́ Ć D́+ ABCD+ A B́ CD


The expression above can now be represented in a Karnaugh map for simplification.

Y A’B’ A’B A AB
B ’
C’D 1 1

C’D 1 1
CD 1 1 1
CD’ 1 1

This gives three possible combinations which when combined give the expression

Y = B́ C+ A Ć +ACD
4) Implement the simplified expression in 3) using NAND gates only.

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We have to manipulate the Boolean expression using Boolean algebra to write it in a form that we can
realize using NAND gates only.

By Involution theorem,

Y = B́ C+ A Ć +ACD
´ +ACD
Y = B́ C+ A Ć

The resulting expression can be manipulated using DeMorgan’s theorem to yield,

´´
Y = B́´C . A Ć . ACD
´

This expression is now in a form that can be realized using NAND gates only. A B C D Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1

5) Implement the simplified expression in 3) using NOR gates only. Tabulate your results.

Again, we need to manipulate the equation to write it in a form that we are able to realise using NOR
gates only.

By Involution theorem and DeMorgan’s theorem,

Y = B́´C+ A´Ć + ACD


´

Y = B+´ Ć + Á +C+
´ ´ D́
Á + Ć+
We the put a double bar across the whole expression to enable us to use NOR gates only. We know by
Involution theorem that this does not change the result.

´ ´ ´ Á + Ć+
Y = B+ Ć + Á +C+
´

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The resulting logic circuit and its corresponding truth table are shown below. A B C D Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1

SECTION 2:

Statement of the problem.

Design a logic circuit using Product of Sum (PoS) for the function:

Y = B́ C+ A Ć +AB Ć+ ACD


To convert the equation from SoP to PoS, we find its dual.

Ý =( B́ +C)( A+ Ć)( A +B+ Ć)( A+C +D)


The resulting PoS is the opened up and simplified to give:

Y = A B́+ AC+ B́ Ć D
The dual of this equation gives us the PoS equivalent, as:

Y =( A + B́)(A +C)( B́+ Ć+ D)

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1) Implement the logic circuit using the basic gates. Tabulate your results.
A B C D Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1

2) Simplify using Boolean algebra and implement the logic circuit. Tabulate your results.
The Product of Sums Boolean expression exists in its simplest form, thus the result and truth
table remains the same as that in (1) above.
Y =( A + B́)(A +C)( B́+ Ć+ D)

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3) Simplify using Karnaugh maps and compare the results with (2) above.
First, we write the Boolean expression in its expanded form. Thus;

Y =( A+ B́+ Ć +D ) ( A+ B́+C+ D́ )( Á + B́+ Ć+ D ) ( A+ B́+C+ D ) ( A+B+C +D ) ( A+ B́+ Ć + D́)(A +B+C+ D́)

Expressing this using a Karnaugh map, it results in:

Y A+ A+B A’+B’ A’+B


B ’
C+D 1 1
C+D’ 1 1
C’+D 1

C’+D 1 1
This creates three possible combinations, which when combined give the initial expression;

Y =( A + B́)(A +C)( B́+ Ć+ D)

4) Implement the simplified expression in (3) using NAND gates only.

By Involution theorem,

Y =( A + B́)(A +C)( B́+ Ć+ D)


´ B́)∙ ( A+C
´ )∙ ( B́+ Ć´ +D)
Y =( A +

The resulting expression can be manipulated using DeMorgan’s theorem to yield,


´
Y = Á´ B ∙ Á´Ć ∙ BC´ D́
This expression is now in a form that can be realized using NAND gates only.
A B C D Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 0
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1 1 1 1 1
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5) Implement the simplified expression in 3) using NOR gates only. Tabulate your results.

Y =( A + B́)(A +C)( B́+ Ć+ D)


By Involution and DeMorgan’s theorem,
´ B́+ Ć+ D)
Y =( A + B́)(A +C)(
´
´ B́+ A+´ C+ ´ D
Y = A+ B́+ Ć+
The resulting logic circuit and its corresponding truth table are shown below.

A B C D Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 1
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1

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JOMO KENYATTA UNIVERSITY OF


AGRICULTURE AND TECHNOLOGY

College of Engineering and Technology


School of Mechanical, Manufacturing and Materials Engineering
(SOMMME)
Mechatronic Department
BSc Mechatronic Engineering
DIGITAL ELECTRONICS
REPORT ON SEQUENTIAL CIRCUIT DESIGN

REGISTRATION NUMBER STUDENT NAME SIGNATURE

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EN292-0604/2014 MUTHUI EUGENE JOE


EN292-3051/2014 NG’ANG’A LYNN WANGECHI
EN292-3048/2014 SAMUEL MWANGI
EN292-3047/2014 COLLINS KINYANJUI
EN292-0598/2014 LUDENYO JAMES WANGIA

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