Sequential Circuits

Contents
1. Combinational circuits Vs Sequential Circuits
2. Main Components of Sequential Circuits
3. Asynchronous vs Synchronous Sequential Circuits
4. Clock Signal
5. Synchronous Sequential Circuits types (4)
6. latch and flip-flop
7. Flip-flop
8. S-R, J-K, T, D Flip Flops
9. Flipflop Conversions
 Sequential Circuits
• Sequential circuits are digital circuits in which the output will depend not only on the
current input, but also on the previous state of the output.
• Sequential circuits previous state stored in memory elements and use the previous state
information to determine their next state.

• The memory elements in sequential circuits

can be implemented using Flip-flops.
• Flipflops are circuits that store binary
values.

Note:- Combinational circuits only depends

on the current input values to produce outputs.
 Sequential Circuits-Applications
• Sequential circuits are commonly used in digital systems to implement counters, state
machines, timers, and memory elements.

• Counters: In digital clocks, frequency counters, and event counters.

• Registers: Found in microprocessors as a storage medium, a transfer medium and a

medium for manipulating data.

• Memory Elements: In RAM and other storage devices to keep data in a temporary hold.

• State Machines: Made use in control systems, communication processes, and different
digital devices for state control.

• Timers: It is applied in time measurement, delay production, and scheduling functions

in digital circuits.
 Main Components of Sequential Circuits
• A sequential circuit consists of several digital components to process and hold
information in the system.
• The key components of a sequential circuit are Logic gates, Memory element, feed back
path.
• The logic gates like AND, OR, NOT, etc. are used to implement the data processing
mechanism of the sequential circuits. These logic gates are basically interconnected in a
specific manner to implement combinational circuits.
• The memory element is used to hold history of circuit operation. Generally, flip-flops
are used as the memory element in sequential circuits.
• A feedback path is provided between the output and the input that transfers information
from output end to the memory element and from memory element to the input end.
 Sequential Circuits

Asynchronous Sequential Circuits Synchronous Sequential Circuits

• Asynchronous Sequential Circuits do not use a • Synchronous sequential circuits, change in input can
clock signal but uses the pulses of the inputs. affect the memory elements only upon the activation
of the clock pulse. The memory units are clocked
• These Circuits operates using the input pulses that flip-flops.
means their output state changes with the change in
• These circuit will change its state for every clock
the input pulses.
pulse. Hence it is also called clocked sequential
• The change in input signals can affect the memory circuits.
element at any instant of time. These Circuits • In synchronous sequential circuits, the duration of the
respond to the change in the input immediately. output pulse is equivalent to the duration of the clock
pulse applied.
 Sequential Circuits -Clock Signal
Clock Signal

• Synchronous sequential circuits have several inputs and several of outputs, and there is a
special signal (control or timing signal) which is commonly known as the clock signal.
• A clock signal is a periodic signal, and it has some portions are low (OFF time), and some
other portions are high (ON time). It has a points where the signal is going from high to
low and low to high.
• The ON time and OFF time need not be the same. When ON time and OFF time of the
clock signal are the same, then it is a square wave.
• Clock signal repeats with a certain time period, which will be equal to the sum of 'ON
time’ and 'OFF time’. Duty cycle is the ratio of ON time with Time period.
 Synchronous Sequential Circuits
• The Synchronous Sequential Circuits can be further classified into two types:
1. Level Triggered Sequential Circuits.
2. Edge Triggered Sequential Circuits:
Positive (High) Level Triggering
Level
triggering
(Latches) Negative (Low) Level Triggering
Synchronous
Sequential
Positive(Rising) Edge Triggering
circuits
Edge
Triggering Negative(Falling) Edge Triggering
(Flip-flops)
Dual Edge Triggering
 1. Level Triggered Sequential Circuits
• There are two levels present in the clock signal – the logic Low and the logic High.
• The circuit is only activated in the case of a level triggering whenever the clock pulse
happens to be at any particular level.
Positive Level Triggering
1. Positive Level Triggering: In this type of
triggering, the circuit gets change state when
it is high time in the clock cycle, i.e. when
the clock signal is high.

Negative Level Triggering

2. Negative Level Triggering: In this type of
triggering, the circuit gets change state when
it is low time in the clock cycle, i.e. when the
clock signal is Low.
 2. Edge Triggered Sequential Circuits

• Two major types of transitions occur in the case of edge triggering clock signals. i.e.,
transition either from Logic Low to Logic High (rising edge ) or Logic High to Logic
Low (falling edge).

1. Positive Edge Triggering: The circuit Positive Edge Triggering

operates or changes state with the rising edge
(transition from low to high) of the clock
signal.
2. Negative Edge Triggering: The circuit
Negative Edge Triggering
operates or changes state with the falling
edge (transition from high to low) of the
clock signal.
• Asynchronous sequential circuit, output can change at any time
(Clockless).
• Synchronous sequential circuit, circuit output changes only at some
discrete instance of time, and this type of circuit they achieve
synchronization by using a timing signal called the clock.
 Memory Element
Q
Q Inputs Flipflop
Inputs Latch ഥ
ഥ
𝐐 𝐐
CLK
• The latch and flip-flop are the basic memory element that stores 1-bit ( 0 or 1) of information. However, they
differ primarily in terms of how and when they change their state based on the input signals.
• Since the output of these memory elements has two stable states ( 0 or 1), So they are also known as a bi-
stable multivibrator.
• A latch is a type of memory device that continuously monitors its inputs and changes its output accordingly,
as long as it is enabled.
• Latches are level-triggered devices, meaning they respond to changes in input when the enable (control)
signal is at a specific level (either high or low).
• A flip-flop is a memory device that only changes its state in response to a clock signal.
• Flip-flops are edge-triggered devices, meaning they respond to a change in input only on a clock's rising
(positive edge) or falling (negative edge).
 Memory Element
Q
Q Inputs Flipflop
Inputs Latch
ഥ
𝐐 ഥ
𝐐
CLK
 Sequential Circuits- Flip-flop
• A flip-flop is a sequential digital electronic circuit, used to store one bit of binary data,
It has two states as logic 1(High) and logic 0(low).
• The flip flop has two outputs and are of opposite states. It is also known as a Bistable
Multivibrator.
• Flip-flops are the fundamental building blocks of all memory devices.
• A basic flip-flop can be constructed using four-NAND or four-NOR gates
• The flip-flops are of the following types:

1. S-R Flip Flop

2. J-K Flip Flop
3. T Flip Flop
4. D Flip Flop
 S-R Flip Flop
• An SR Flip-Flop (Set-Reset Flip-Flop) is a type of flip-flop used to store a single bit of
data and control its output state based on two input signals: Set (S) and Reset (R).
• When a clock signal is applied, the SR Flip-Flop checks the state of S & R and changes
the outputs accordingly.
• In this circuit, when S is set as active, the output Q would be high and the Q' will be low.
• If R is set to active then the output Q is low and the Q' is high.
 S-R Flip Flop
Qn= Output after CLK passes in the bit time ‘n’ (Present state)
Qn+1= Output after CLK passes in the bit time ‘(n+1)’

Truth Table
CLK S R Qn+1 State
0 X X Qn No Change
1 0 0 Qn No Change
1 0 1 0 Reset
1 1 0 1 Set
Forbidden
1 1 1 Invalid
state
 S-R Flip Flop
Characteristics (Excitation) Table
S R Q(n) Q(n+1)
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 X
Characteristics Equation: Q(n+1)=S+R′Q(t)
1 1 1 X

The main limitation is the undefined state when both S and R are 1, so practical circuits often avoid this
by adding additional logic to prevent this condition.
 J-K Flip Flop
• The JK flip-flop overcomes limitation of the SR flip-flop by allowing toggling of states
without an invalid state, which makes it versatile for sequential logic designs.
• The operation of the JK flip-flop is similar to the SR flip-flop.
• If both J and K are high, then at the clock edge, the output will toggle from one state to
the other.
J K Q State
No
0 0 0
Change
0 1 0 Reset
1 0 1 Set
1 1 Toggles Toggle
 J K Q(t) Q(t+1)
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
Characteristics Equation: Q(t+1)= JQ(t)′+K′Q(t) 1 1 1 0
 • Operation of JK Flip-Flop: The behavior of a JK flip-flop depends on the values of J, K, and the clock
pulse. The state transition occurs at the active edge (either rising or falling) of the clock signal.
1. J = 0, K = 0 (No Change): When both J and K are 0, the flip-flop retains its previous state.
2. J = 0, K = 1 (Reset): The output Q is reset to 0, regardless of its previous state.
3. J = 1, K = 0 (Set): The output Q is set to 1, regardless of its previous state.
4. J = 1, K = 1 (Toggle): The output Q toggles to the opposite state with each clock pulse. If Q was 0, it
becomes 1, and if Q was 1, it becomes 0

J K Q (previous) Q (next) Description

0 0 0 0 No change
0 0 1 1 No change
Truth Table for JK Flip-Flop 0 1 0 0 Reset to 0
0 1 1 0 Reset to 0
1 0 0 1 Set to 1
1 0 1 1 Set to 1
1 1 0 1 Toggle (0 to 1)
1 1 1 0 Toggle (1 to 0)
 T Flip Flop
The T flip-flop(Toggle flip-flop )operates based on the value of the T input and changes
state on the active edge (rising or falling) of the clock signal.
1.T = 0 (No Change): When T is 0, the flip-flop maintains its current state. It doesn’t
change regardless of the clock pulse.
2.T = 1 (Toggle): When T is 1, the flip-flop toggles its output on the next clock pulse. If
the output Q was 0, it becomes 1, and if it was 1, it becomes 0.

T Qn Q n+1 Description
0 0 0 No change
0 1 1 No change
1 0 1 Toggle (0 to 1)
1 1 0 Toggle (1 to 0)

Characteristics Equation : Q(t+1)=T′Q(t)+TQ(t)′=T⊕Q(t)

 T Flip Flop Timing
Diagram

• T flip flop is positive

edge triggered flip
flop.
 D Flip Flop
• A D flip-flop, or Data flip-flop, is a type of flip-flop that captures and stores the value
of its data input, D, on the edge of a clock signal.
• It’s commonly used in digital circuits to synchronize data, store a single bit of
information, and transfer data between different parts of a circuit.
Truth Table
Characteristics Table
D Q
0 0
1 1

Characteristics Equation of D Flip-Flops: Q(t+1)=D

 D Flip Flop
Operation of D Flip-Flop
The D flip-flop’s operation is straightforward. At each active edge of the clock, the value
present on the D input is captured and transferred to the output Q. The output Q remains
in this state until the next clock edge, making the D flip-flop a memory element.
1.Clock Edge: When a clock pulse occurs, the output Q takes on the value of the D input.
2.No Clock Pulse: When there’s no active clock edge, the output Q remains unchanged,
retaining its previous state.

Truth Table for D Flip-Flop

Clock D Q (next) Description

1 0 0 Q follows D
1 1 1 Q follows D
X Q (previous) No clock, no change
Conversion for Flip-Flops
Conversion for Flip-Flops
Convert SR To JK Flip Flop
Conversion of SR to D FlipFlop