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LM3842A (1)

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0% found this document useful (0 votes)
23 views

LM3842A (1)

Uploaded by

Naveen
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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CURRENT MODE PWM CONTROLLER LM3842A/3A/4A/5A

FEATURES 8 SOP/ 8 DIP PIN Configulation

● Automatic feed forward compensation Compen VREF


sation 1 8
● Optimized for offline converter
● Double pulse suppression SOP-8 PKG Voltage Vcc
2 7
Feedback
● Current mode operation to 500 KHz
Current 3 6 OUTPUT
● High gain totem pole output
Sense
● Internally trimmed bandgap reference 4 5
RT/CT GND
● Undervoltage lockout with hysteresis DIP-8 PKG
● Low start up current :< 0.3 mA
● Moisture Sensitivity Level 3 ORDERING INFORMATION
Device Package
LM3842A/3A/4A/5A D 8 SOP
DESCRIPTION LM3842A/3A/4A/5A N 8 DIP
The LM384xA are fixed frequency current-mode PWM controller. They are specially designed for Off-Line and
DC-to-DC converter applications with minimal external components.
These integrated circuits features a trimmed oscillator for precise duty cycle control, a temperature
compensated reference, high gain error amplifier, current sensing comparator, and a high current
totempole output ideally suited for driving a power MOSFET.
Protection circuitry includes built in under-voltage lockout and current limiting.
SIMPLIFIED BLOCK DIAGRAM

Vcc
5V
VREF ⑧ Reference
Undervoltage
Lockout
R
VREF
Undervoltage
R Lockout ⑦ Vcc

RT/CT ④ Oscillator
Latching ⑥ Output
PWM
+
VFB ② - ⑤ Ground
Error
Amplifie ③ Current
COMP ① r
Sense
Input

ABSOLUTE MAXIMUM RATINGS (TA= 25℃)


Characteristic Symbol Value Unit
Power Supply Voltage Vcc 30 V
Output Current Io ±1 A
Analog Inputes Voltage VIN -0.3 to 5.5V V
Error Amp Output Sink Current ISINK 10 mA
Power Dissipation PD 1 W
Storage Temperature Range Tstg -65 to 150 ℃
Lead Temperature (soldering 5 sec) TL 260 ℃

2008 - Ver. 1.0 HTC


−1−
CURRENT MODE PWM CONTROLLER LM3842A/3A/4A/5A
ELECTRICAL CHARACTERISTIC
(Vcc=15V(Note 1), RT = 10kΩ, CT=3.3nF 0 ≤ TA ≤ 70℃ ; unless otherwise specified)
Characteristic Symbol Test Condition Min Typ Max Unit
REFERENCE SECTION
Reference Output Voltage VREF Tj = 25℃, IO=1 mA 4.90 5.00 5.10 V
Line Regulation Vo 12V ≤ Vcc ≤ 25V 2 20 mV
Load Regulation Vo 1mA ≤ Io ≤ 20mA 3 25 mV
Output Short Circuit Current Isc TA = 25℃ -85 -180 mA
OSCILLATOR SECTION
Normal Frequency FOSC Tj = 25℃ 47 52 57 kHz
Voltage Stability Sv 12V ≤ Vcc ≤ 25V 0.2 1 %
Amplitude Vosc 1.6 Vp-p
ERROR AMPLIFIER SECTION
Input B Current IIB -0.1 -2 μA
Feedback Input Voltage VFB Vo=2.5V 2.42 2.50 2.58 V
Open Loop Voltage Gain AVOL 2V≤ Vo ≤ 4V 65 90 dB
Power Supplier Rejection Ratio PSRREA 12V ≤ Vcc ≤ 25V 60 70 dB
Output Sink Current ISI VFB =2.7V, Vo - 1.1V 2 7 mA
Output source Current ISO V = 2.3V, Vo=5V -0.5 -1.0 mA
Output Voltage High VOH VFB=2.7V, RL=15kΩ to GND 5 6 V
Output Voltage Low VOL VFB=2.7V, RL=15kΩ to VRGR 0.8 1.1 V
CURRENT SENSE SECTION
Input Voltage Gain Av (Note 2 & 3) 2.85 3 3.15 V/V
Maximum Input Signal VMAX Vo=5V (Note 2) 0.9 1 1.1 V
Power Supply Rejection Ratio PSRRSC 12V ≤ Vcc ≤ 25V 70 dB
Input Bias Current IIB -3 -10 μA
OUTPUT SECTION
Isink = 20mA 0.1 0.4 V
Output Voltage Low VOL
Isink = 20mA 1.5 2.2 V
Isource = 20mA 13 13.5 V
Output Voltage High VOH
Isource = 20mA 12 13.0 V
Rise Time Tr Tj = 25℃, CL=1nF 45 150 nS
Fail Time T t Tj = 25℃, CL=1nF 35 150 nS
UNDERVOLTAGE LOCKOUT SECTION
3842A/3844A 14.5 16 17.5 V
Start Threshold Vth
3843A/3845A 7.8 8.4 9 V
3842A/3844A 8.5 10 11.5 V
Minimum Operating Voltage (After Turn-on VCC(MIN)
3843A/3845A 7.0 7.6 8.2 V
PWM SECTION
3842A/3843A 14.5 16 17.5 V
Maximum Duty Cycle Dmax
3844A/3845A 7.8 8.4 9 V
TOTAL STANDBY CURRENT
Vcc=14V for 3842A/3844A 0.17 0.3 mA
Start-up Current Ist
Vcc=6.5V for 3843A/3845A 0.17 0.3 mA
Operating Supply Current ICC Vpin2=Vpin3=0V 14 17 mA
Zener Voltage Viz Ii = 25mA 30 38 V

HTC
−2−
CURRENT MODE PWM CONTROLLER LM3842A/3A/4A/5A
Note: 1. Adjust Vcc above the start threshould before setting at 15V.
2. Parameter measured at trip point of latch with VFB - 0.
3. Comparator Gain defined as:
A = ΔV Output Compensation(pin FB) ;
ΔV Current Sanseinput(pin CS)

Fig.1 Open Loop Test Circuit

VREF

RT

2N
4.7K 2222 A
V1

1 COMP VREF 8
100K 0.1
1K
E/A 2 VFB VC 7 1K/1W
ADJUST
5K
LM3842A 0.1
ISENSE ISENSE
3 OUTPUT 6
ADJUST
OUTPUT
4.7K
4 RT/CT GND 5

CT

High peak currents associated with capacitive loads necessitate careful grounding techniques
Timing and bypass capacitors should be connected close to pin 5 in a single point ground.
The transistor and 5KΩ potentiometer are used to sample the oscillator waveform and apply an
adjustable ramp to pin 3.

Fig.2 Under Voltage Lockout


ON/OFF COMMAND
7 TO REST OF IC
ICC

LM3842A LM3843/5A
< 15mA
VON 16V 8.4V
VOFF 10V 7.6V
< 1mA
VCC
VOFF VON

During Under-Voltage Lock-Out, the output driver is biased to a high impedance state.
Pin 6 should be shunted to ground with a bleeder resistor to prevent activating the power switch
with output leakage current.

HTC
−3−
CURRENT MODE PWM CONTROLLER LM3842A/3A/4A/5A
Fig.3 Error Amp Configuration 2.5V
0.5mA

VFB

Zi 2 -

Zf 1

COMP

Error amp can source or sink up to 0.5mA

Fig.4 Current Sense Circuit


ERROR
AMP 2R
IS

COMP R 1V CURRENT
1 SENSE
CURRENT
SENSE COMPARATOR
R
3
C
RS

GND
5

Peak current (IS) is determined by the formula:

IS(MAX) ~ 1.0V
RS

A small RC filter may be required to suppress switch transients.

Fig.5 Oscillator Waveforms and Maximum Duty Cycle


LARGE RT
SMALL CT V4
VREF 8

RT
INTERNAL CLOCK
RT/CT 4

CT LARGE RT
SMALL CT V4

GND 5

INTERNAL CLOCK

HTC
−4−
CURRENT MODE PWM CONTROLLER LM3842A/3A/4A/5A

duty cycle. Charge and discharge times are determined by the formulas:
tc ~ 0.55 RT CT
0.0063 RT - 2.7
td ~ RT CT ∫n( )
0.0063 RT - 4
Frequency, then, is: f = (tc + td) -1

For RT>5KΩ, f ~ 1.8


~R C
T T

Fig.6 Shutdown Techniques

1K
8 VREF
1 COMP

330Ω 3 ISENSE
SHUTDOWN
500Ω

SHUTDOWN

TO CURRENT
SENSE-RESISTOR

Shutdown of the LM3842A can be accomplished by two methods; either raise pin 3 above 1V or
pull pin 1 below a voltage two diode drops above ground. Either method causes the output of the
PWM comparator to be high (refer to block diagram). The PWM latch is reset dominant so that
the output will remain low until the next clock cycle after the shoutdown condition at pins 1 and/or 3
is removed. In one example, an externally latched shutdown may be accomplished by adding an
SCR which will be reset by cycling VCC below the lower UVLO threshold. At this point the
reference turns off, allowing the SCR to reset.

Fig.7 Slope Compensation

VREF 8
0.1μF
RT

RT/CT 4
LM3842A
CT
R1 ISENSE

R2
ISENSE 3

RSENCE
C

HTC
−5−
CURRENT MODE PWM CONTROLLER LM3842A/3A/4A/5A
A fraction of the oscillator ramp can be resistively summed with the current sense signal to
provide slope compensation for converters requiring duty cycles over 50%.

Note that capacitor, C, forms a filter with R2 to suppress the leading edge switch spikes.

Fig.1 Output Dead Time Fig.2 Timing Resistor vs Frequency


100

80 CT=100nF
RT, Timing Resister (kΩ

50 CT=200pF
CT=47nF
CT=10nF CT=100pF
30
CT=5.0nF CT=22nF

RT(kΩ)
20 CT=2.0nF
CT=1.0nF CT=10nF
8.0 CT=500pF
CT=4.7nF
5.0 10
2.0 CT=2.2nF

CT=10nF
0.8
10k 20k 50k100k 200k 500k 1.0M
3
fosc, Frequency (kHz) 100 1k 10k 100k 1M
fosc, Frequency(Hz)

Fig.3 Output Saturation Characteristics Fig.4 Error Amplifier Open Loop


Gain and Phase Frequency

80 0
VSAT, Output Saturation Voltage (V

AVOL, Open-Loop Voltage Gain (d

4
Gain

Φ, Excess Phase Degree


VCC=15V
TA=25℃ 60 -45
3

40 -90
2 Phase

20 -135
1 SOURCE (V
CC-VOH)
SINK (VOL)

0 -180
0
10-3 2 4 6 8 10-1 2 4 6 8

Io, Output Load Current (A) 10 100 1K 10K 100K 1M 10M

Fosc, Frequency (Hz)

PIN FUNCTION DESCRIPTION


Pin No. Function Description
1 Compensation This pin is the Error Amplifier output and is made available for loop
compensation.
2 Voltage This is the inverting input of the Error Amplitier. It is normally connected
Feedback to the switching power supply output through a resister divider.
3 Current Sense A voltage proportional to inductor current is connected to this input.
The PWM uses this information to terminate the output switch conduction.
4 RT/CT The Oscillator frequency and maximum Output duty cycle are
programmed by connecting resistor RT to VREF and capacitor CT
to ground. Operation to 500kHz is possible.
5 GND This pin is the combined control circuitry and power ground.
6 Output This output directly drives the gate of a power MOSFET. Peak currents
up to 1.0A are sourced and sunk by this pin.
7 Vcc This pin is the positive supply of the control IC.
8 VREF This is the reference output. It provides charging current for capacitor
CT through resistor RT.

HTC
−6−

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