Z(1st Smt,)-Computer Science-HIDSCC-CCI 2023 COMPUTER SCIENCE — HONOURS Paper : DSCC-I Full Marks : 75 The figures in the margin indicate full marks. Candidates are required to give their answers in their own words as far as practicable. 1. Answer any five questions : 2x5 () Convert decimal 478 to a 16-bit binary number by first converting to hexadecimal, (©) Draw the circuit diagram to implement the expression x = (A+B). (B+ D) using two input NAND. gales only. (& What does the term ‘race around condition’ refer to in relation to flip-flops? 46) How can you implement an XNt ‘OR logic function usin, just five two-iny tN, 2 the necessary cireuit diagram. * PUNAND gates? Iustrate Answer any three questions, 2 Simplify the Boolean expression Y=ABC+ABED+ ABCD+ABCD.+ABCD using Kamaugh map and realise the Simplified expression using fundamental logic gates, Draw the appropriate cizeuit diagram. 5 IF How car & cascade arrangement to create a 16-to- | multiplexer? ‘operation, No other logie gates are allow 'd to realise the - Define wt Please Turn OverZitat Sen. }-Computer Seience-MIDSCCMCCE (2) $7 iltusirate the circuit diagram fora clocked JK. Mip-fop, and include its truth table, Provide a concise explanation ofits operation, 5 6/Compose a brief note on any topic of your choice : = (a) Primary memory and Secondary storage devices (6) Central Processing Unit (e) General characteristics of Supercomputers. Answer any five questions. Design a 3-bit synchronous up counter that sequentially progresses through the states : 00 — 010 — 100 — 110, and then repeats. Illustrate the state transition diagram and outline the requisite design steps, ineluding the suitable logis diagram, 6-242 Design a Master-Slave flip-flop utilizing JK Mip-Mops. Develop the truth table, elucidate its functionality, ‘and depict the logical circuit diagram. 44363 9. Design a BCD to Excess-3 code converter. Provide a truth table, simplify it using a Kamaugh map, and es, 3424342 illustrate the logical circuit diagram using fundamental logic gates, HF Realize the logic function, F(A, B, C, D) = Zq(, 3,5, 7,9, U1, 13) employing a3 : 8 decoder featuring active-low outputs. Utilize additional basic logic gates as necessary. Draw the truth table. Describe the design procedure. Draw the logical circuit diagram, 46343 ts truth table, derive simplified expressions for the Sum and Carry out, and depict the logical circuit diagram, 3434242 12. Describe the functionality of a 3-bit Johnson ‘counter using an appropriate illustration. ot ¥ST Convert a D flip-flop into a JK Aip-fop, Illustrate the excitation table, elucidate the conversion process, and provide the logical circuit diagram. wa + D) = £403, 4, 5, 6, 7, 9, 10, 12, 14, 15) ing a 4 to 1 multiplexer the design process, create the truth table, derive the 147 implement the funetion F(A. B, along with other required logic gates. Exp simplified expression, and provide the logical circuit diagram 34243