SYSTEM ON CHIP ARCHITECTURE (SOCA)

GROUP - A (SHORT ANSWER QUESTIONS)

S. No QUESTION Blooms Course

Taxonomy Outcome
Level
UNIT-I
INTRODUCTION TO THE SYSTEM APPROACH
1 Give the importance of system architecture. Understand CO1
2 What are system architecture comprises of? Remember CO1
3 What are the different elements of the system? Remember CO1
4 Define the concept of system. Understand CO1
5 What are the design approaches for SOC design? Remember CO1
6 Draw the block diagram of basic SOC model. Remember CO1
7 What are the importance of system architecture? Understand CO1
8 How is SOC implemented? Understand CO1
9 What are the benefits of integrating a large digital system into a single Understand CO1
integrated circuit?
10 What are the principle drawbacks of SOC design are associated with the design Understand CO1
processes.
11 Give some advantages of SOC design. Understand CO1
12 What are the major SOC applications? Understand CO1

UNIT-II
PROCESSORS
1 What is meant by superscalar processor? Remember CO2
2 What are the limitations of super scalar processor? Understand CO2
3 Give the basic difference between processor architecture and system Understand CO2
architecture.
4 Define vector processors. Remember CO2
5 Draw the block diagram of sequential processor model. Remember CO2
6 What are the instruction execution sequence of simple sequential processor? Remember CO2
7 Draw the block diagram of pipelined processor. Remember CO2
8 Define static pipeline and dynamic pipeline. Remember CO2
9 Define VLIW processor. Remember CO2
10 Define superscalar processors. Remember CO2
11 What is meant by pipeline delay? Remember CO2
12 What are the different ways to minimize pipeline delays? Understand CO2
13 What are the basic elements used in instruction handling? Remember CO2
UNIT-III
MEMORY DESIGN FOR SOC
1 Define memory design for SOC. Remember CO3
2 What are the flash memory consist of? Understand CO3
3 Define Scratchpads and cache memory. Remember CO3
4 What are the 3 principles involved in cache? Understand CO3
5 Define cache performance. Remember CO3
6 What are the basic types of cache organization? Remember CO3
7 Define cache data. Remember CO3
8 What are the strategies for line replacement at miss (cache) data? Understand CO3
9 Give the effectiveness of non blocking caches depends on. Understand CO3
10 Give the limitations of cache array size. Understand CO3
11 Define multilevel cache. Remember CO3
12 Explain about 3 different miss rates. Remember CO3
13 Define internal memory in SOC design. Understand CO3
14 What are the different types of caches in memory design for SOC. Remember CO3

UNIT-IV
INTERCONNECT CUSTOMIZTION
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 1 Give the importance of Interconnect Interface Unit. Understand CO4
2 Draw the block diagram of on-chip architecture. Remember CO4
3 Define AMBA. Remember CO4
4 What are the different buses specified by AMBA for on-chip device Remember CO4
communication.
5 Define Advance system bus. Remember CO4
6 Draw the block diagram of AMBA. Remember CO4
7 What is meant by Bus Arbitration? Understand CO4
8 Give the protocols used in Bus Arbitration. Remember CO4
9 Define Bus protocols. Remember CO4
10 Define bus bridge and what is the function of bus bridge. Remember CO4
11 Define Processor Local Bus(PLB) Remember CO4
12 Define device control register bus. Understand CO4
13 What are the different phases of transactions while using address buses? Understand CO4
14 Define T access and Line access. Understand CO4
15 Classify the different processor transactions. Remember CO4
UNIT-V
CONFIGURATION
1 Define fabrication time and compile time. Remember CO5
2 What are the different methods of implementing computations in Soc Understand CO5
customization?
3 Define customization. Remember CO5
4 Classify the types of customization. Remember CO5
5 Define Instance specific design. Remember CO5
6 What are the different types of Instance specific optimization? Remember CO5
7 Define Architecture adaptation and give example. Remember CO5
8 What is purpose of constant folding in instance specific optimization? Understand CO5
9 Define overhead analysis and trade-off analysis on reconfigurable parallelism. Understand CO5
10 Give the different Reconfiguration Technologies used in SOC design. Remember CO5

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GROUP - II (LONG ANSWER QUESTIONS)
S. No Question Blooms Course
Taxonomy Outcome
Level
UNIT-I
INTRODUCTION TO SYSTEM APPROACH
1 What is the importance of system level interconnection in SOC? Explain BTL2 CO1
system level interconnection using bus-based approach and network on
chip approach.
2 Explain how pipe lined processor works in brief. BTL2 CO1

3 Elaborate the steps involved in determination of physical memory address BTL2 CO1
with one example.
4 Draw and explain system on-chip design flow diagram? BTL2 CO1

5 What is processor architecture? What are the different processor BTL2 CO1
architectures available for processor design?
6 Explain in detail about the memory requirements in SOC. BTL2 CO1

UNIT-II
PROCESSORS
1 Give an overview of processor selection for SOC. BTL2 CO2

2 What are the basic elements of an instruction unit? Explain function of BTL2 CO2
each unit.
3 Define Pipeline Hazard. Explain different types of data dependencies. BTL2 CO2

4 Explain about the array processor model. BTL2 CO2

5 Explain about the pipelined processor model. BTL2 CO2

UNIT-III
MEMORY DESIGN FOR SOC
1 Explain the placement of SOC main memory BTL2 CO3
2 Explain the two way set-associative mapping. BTL2 CO3
3 Analyze the Scratchpads and Cache memory in SOC design. BTL4 CO3
4 Explain about Internal memory used in SOC. BTL2 CO3

5 Summarize the Associative mapping and Direct mapping concept in SOC BTL 2 CO3
design.
6 Differentiate between SDRAM and DDR SDRAM in the memory design. BTL4 CO3
7 With a neat diagram explain set associative cache and fully associative BTL 2 CO3
cache.

UNIT-IV
INTERCONNECT CUSTOMIZATION
1Explain the following concept in Interconnect customization BTL2 CO4
(i)Processor Local Bus(PLB)
(ii)On-Chip Peripheral Bus(OPB)
(iii)Device Control Register(DCR)
2 Illustrate the NOC Layered Architecture and explain. BTL2 CO4
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 3 Explain with block diagram about Interconnect Architectures of SOC. BTL2 CO4

4 Compare between Core Connect and AMBA Architecture. BTL4 CO4

5 Analyze the SOC Standard Buses. BTL4 CO4
6 Classify the Physical Bus Structure of SOC design. BTL2 CO4

UNIT-V
CONFIGURATION

1 Identify the Custom Instructions Automatically using SOC design BTL3 CO5
methodology.
2 Summarize the approaches for Processor customization in SOC design. BTL2 CO5

3 Outline the features of Architecture Description Languages in BTL3 CO5

configuration of SOC.
4 Categorize the Reconfigurable interconnect architecture in SOC design BTL2 CO5

5 Build the Reconfigurable Functional Units (FUs) for anyone applications. BTL3 CO5

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