Application Report

SBOA134 – January 2013

Driving Capacitive Loads with Gamma Buffers

Collin Wells .....................................................................................................................................

ABSTRACT
In certain applications, it is a requirement to place a capacitive load on the output of a BUFxxxxx (BUF)
device. However, a capacitive load can cause overshoot, ringing, poor load regulation, and long settling
times when the BUF output is updated. While it is not recommended to place a large capacitive load on
the output of a BUF device, this application note explains the issues that may arise when driving a
capacitive load, and provides recommendations to achieve proper design stability.

Contents
1 Overview ..................................................................................................................... 2
2 Stabilizing the Capacitive Load with RISO ................................................................................ 3
3 Conclusions .................................................................................................................. 6

List of Figures
1 BUF16821 Circuit and Transient Result with a 1-µF Capacitive Load ............................................... 2
2 BUF16821 Circuit with CLOAD = 1 µF and RISO = 10 Ω .................................................................. 3
3 BUF16821 RISO vs CLOAD ................................................................................................... 4
4 BUF18830 OUT0-17 RISO vs CLOAD ....................................................................................... 5
5 BUF18830 VCOM1-2 RISO vs CLOAD ...................................................................................... 5
6 Protection Schottky Diode for Large CLOAD Values ...................................................................... 6

List of Tables
1 BUF16821 RISO vs CLOAD for 45° and 60° Phase Margins ............................................................. 4
2 BUF18830 RISO vs CLOAD for 45° and 60° Phase Margins ............................................................. 5

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Overview www.ti.com

1 Overview
Each gamma or VCOM output of a BUF device is a standard, noninverting, operational amplifier (op amp)
configured in a closed-loop dc gain of 4 V/V. The noninverting input is driven by a digital-to-analog
converter (DAC). Although the capacitor included in the internal feedback network improves capacitive
load drive for small capacitance values, placing a large capacitive load on the output decreases the
system phase margin (PM). This decrease in system phase margin leads to stability issues, such as
transient response overshoot, ringing, long settling times, and poor load regulation. For example, Figure 1
shows the effect when a 1-µF capacitive load is placed on the output of the BUF16821. When a step
response is applied to the input the BUF16821, the output has substantial overshoot and ringing. There
also appears to be a small-signal continuous oscillation in the output waveform. These symptoms indicate
that this design is not stable, and will not react properly to load steps or input steps in gamma and VCOM
applications.

BUF16821 Output

0.5 pF

250 k 750 k

VOUT

DAC +
CLOAD
1 F

Figure 1. BUF16821 Circuit and Transient Result with a 1-µF Capacitive Load

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www.ti.com Stabilizing the Capacitive Load with RISO

2 Stabilizing the Capacitive Load with RISO

This circuit must be compensated externally because the feedback of this system is internal to the
BUF16821 and can not be modified. The most effective approach is to add an isolation resistor, RISO,
between the buffer output and the capacitive load. The RISO resistor and the output impedance of the
amplifier interact with the load capacitance, CLOAD, to return the phase margin to an acceptable level.
Figure 2 shows an example using a 10–Ω RISO resistor to stabilize a 1-µF capacitive load on the output of
a BUF16821. The output of the buffer quickly settles to the correct value without any ringing. The transient
response confirms that the isolation resistor increased the system phase margin to an acceptable level
and the design is stable. A stable design properly reacts to load steps and input changes in the system as
desired.

BUF16821 Output

0.5 pF

250 k 750 k

VOUT RISO
10
DAC + CLOAD
1 F

Figure 2. BUF16821 Circuit with CLOAD = 1 µF and RISO = 10 Ω

Further analysis proves that adding the 10-Ω RISO resistor between the BUF16821 output and the
capacitive load increases the design phase margin from below 10° to over 60°. A phase margin between
45° and 60° is generally desired to achieve a proper transient response with little overshoot and ringing.
Phase margins greater than 60° continue to reduce overshoot and ringing at the expense of longer settling
times. Choosing the correct RISO value to increase the phase margin to appropriate levels involves
knowing the exact characteristics of the open-loop gain (AOL) and open-loop output impedance (ZO) of the
BUF device that is driving the capacitive load. These curves are not always published in the product data
sheets; the tables and figures in the following sections show the range of RISO resistor values required to
stabilize a range of capacitive loads on a few of the more recent BUF devices. Values for the isolation
resistor are shown to achieve both a 45° phase margin and a 60° phase margin. Isolation resistor values
between these values produce a system phase margin between 45° and 60°. Isolation resistor values
greater than the 60° value continue to produce higher phase margins until the phase margin stops
increasing near 90°. If the final system can tolerate the voltage drop across the larger isolation resistor,
then it is strongly advised to use the 60° value isolation resistor for stability.

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2.1 BUF16821 OUT0-15 and VCOM1-2 Outputs

Table 1 and Figure 3 display the proper BUF16821 isolation resistor values for a range of capacitive
loads.

Table 1. BUF16821 RISO vs CLOAD for 45° and 60° Phase Margins
BUF16821
GAMMA0-15, VCOM1, VCOM2
CLOAD (µF) RISO FOR 45° PM (Ω) RISO FOR 60° PM (Ω)
0.1 6.0 10
0.22 5.0 7.7
0.47 3.8 6.0
1 2.6 4.3
2.2 1.8 2.9
4.7 1.3 2.0
10 0.9 1.35

12

10

8
Series Resistance ( )

6
PM = 60°

PM = 45°
4

0
0.1 1 10
Capacitive Load (…F)

Figure 3. BUF16821 RISO vs CLOAD

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www.ti.com Stabilizing the Capacitive Load with RISO

2.2 BUF18830 OUT0-17, and VCOM1-2 Outputs

Table 2, Figure 4, and Figure 5 display the proper BUF18830 isolation resistor values for a range of
capacitive loads on the outputs. Please note that the BUF18830 uses different amplifiers for the VCOM1-2
outputs than the OUT0-17 outputs.

Table 2. BUF18830 RISO vs CLOAD for 45° and 60° Phase Margins
BUF18830
OUT0-17 VCOM1-2
CLOAD (µF) RISO FOR 45° PM (Ω) RISO FOR 60° PM (Ω) RISO FOR 45° PM (Ω) RISO FOR 60° PM (Ω)
0.1 8.00 12.00 2.70 4.00
0.22 6.40 9.25 2.20 3.50
0.47 4.50 6.60 1.90 2.90
1 3.30 4.75 1.50 2.15
2.2 2.20 3.25 1.05 1.50
4.7 1.50 2.23 0.75 1.11
10 1.00 1.53 0.52 0.76

14

12

10
Series Resistance ( )

8
PM = 60°

PM = 45°
6

0
0.1 1 10
Capacitive Load (…F)

Figure 4. BUF18830 OUT0-17 RISO vs CLOAD

4.5

4.0

3.5

3.0
Series Resistance ( )

2.5

PM = 60°
2.0
PM = 45°

1.5

1.0

0.5

0.0
0.1 1 10
Capacitive Load (…F)

Figure 5. BUF18830 VCOM1-2 RISO vs CLOAD

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Conclusions www.ti.com

Note that larger CLOAD values require smaller isolation resistor values to ensure good phase margin.
Although this information might make it tempting to increase the CLOAD value in order to decrease the
required isolation resistor value, this practice is not recommended. If not properly designed, the large
output capacitors may discharge back into the amplifier output causing electrical overstress (EOS)
damage as a result of overcurrent and/or overheating. Therefore, when using CLOAD values greater than or
equal to 1 µF, it is strongly recommended to include a Schottky diode directly from the amplifier output to
the appropriate power-supply connection on the BUF device. This diode safely discharges the output
capacitor into the device supplying power to the BUF, instead of back into the amplifier output. The
Schottky diode should have a forward voltage lower than 0.5 V, and sized for a few amps of forward
current. A simplified example is shown in Figure 6.
VS

BUFxxxxx Output Schottky

Diode
_ VOUT RISO VLOAD
10

+ CLOAD • 1 F

Figure 6. Protection Schottky Diode for Large CLOAD Values

3 Conclusions
It is not recommended to place large capacitors directly on the outputs of BUF devices because it
compromises the stability of the output amplifier. However, if an output capacitor is required, the proper
RISO resistor must be placed in the circuit between the amplifier output and the capacitive load to provide
stability. The tables and figures included in this document enable the designer to choose the correct RISO
value in their final system based on the desired phase margin and required capacitive load. If the
capacitive load is 1 µF or larger, include a protection diode from the amplifier output to the positive supply
to safely discharge the output capacitor when required.

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