energies

Article
Research on a Modeling and Control Strategy for Interleaved
Boost Converters with Coupled Inductors
Zhuangzhi Dai, Jilong Liu *, Kefeng Li, Zhiqin Mai and Guijing Xue

National Key Laboratory of Science and Technology on Electromagnetic Energy, Naval University of Engineering,
Wuhan 430033, China
* Correspondence: [email protected]

Abstract: Interleaved DC–DC converters have significant advantages in improving the capability
of power converters, and coupling the filtering inductor of the converter could further increase the
power density. However, existing modeling and controller designs are complex and require multiple
sensors to be involved in the control, which is not conducive to engineering implementation and
reducing production costs. In view of this problem, taking a two-phase interleaved boost converter
with a coupled inductor as an example, the small-signal models of the converter are derived for the
resistive load and constant voltage source load using the state averaging method. The total inductor
current is engaged in the control as a feedback signal, avoiding the coupling effect of the inductor on
increasing the complexity of the controller. Based on this, a double closed-loop controller is designed,
and a prototype of the two-phase interleaved boost converter with coupled inductor is built. Only
one current sensor and one voltage sensor are required to participate in the control. The effectiveness
of the analysis and design in this paper are verified by experiments.

Keywords: coupled inductors; interleaved boost; small-signal model; DC–DC converters;

controller design

1. Introduction
Citation: Dai, Z.; Liu, J.; Li, K.; Mai, High-power, high-efficiency DC–DC converters are essential to the development
Z.; Xue, G. Research on a Modeling process of modern industry. DC–DC converters efficiently convert and regulate DC voltage
and Control Strategy for Interleaved levels to suit the needs of electronic applications and are widely utilized in electric vehicles,
Boost Converters with Coupled aviation, navigation, renewable energy generation, etc., where the requirements for their
Inductors. Energies 2023, 16, 3810. power density are becoming increasingly demanding [1,2]. Traditional DC–DC converters,
https://doi.org/10.3390/en16093810 such as synchronous boost and buck converters, have the advantages of lower cost, lower
Academic Editors: José Matas and complexity, and ease of implementation [3]. However, the limitations of the voltage and
Ramkrishan Maheshwari current capacity of the power semiconductors make it difficult to apply them to high-power
applications [4–7].
Received: 24 March 2023 To solve this problem, the original high-power system is divided into multiple low-
Revised: 17 April 2023
power systems using interleaved technology to reduce the current stress of the power
Accepted: 27 April 2023
semiconductors. The interleaved parallel technique is achieved using N power converter
Published: 28 April 2023
modules in parallel, each with the same drive signal frequency and duty cycle but staggered
in phase by an angle of 2π/N. This technology makes it possible to meet the needs of high-
power applications while maintaining the power level of the original devices. Interleaved
Copyright: © 2023 by the authors.
DC–DC converters also offer the following advantages [8–10]: first, they could reduce
Licensee MDPI, Basel, Switzerland. voltage and current ripple, lower converter losses, and reduce filter size; second, they
This article is an open access article increase the equivalent switching frequency, which improves the dynamic response of the
distributed under the terms and system. In addition, magnetic integration technology could be used to reduce the number
conditions of the Creative Commons of magnetic components by replacing the discrete inductors of each phase bridge arm with
Attribution (CC BY) license (https:// coupled inductors, which further improves the power density and reduces the cost [11–13].
creativecommons.org/licenses/by/ A reasonable selection of the coupling inductor parameters can also achieve better dynamic
4.0/). and static performances [14].

Energies 2023, 16, 3810. https://doi.org/10.3390/en16093810 https://www.mdpi.com/journal/energies

Energies 2023, 16, 3810 2 of 15

However, the interleaved technique increases the number of circuit elements and
makes the operating modes more complex than single-phase converters because of the
misalignment of the two phases’ ON-time [15]. In addition, the coupling effect of the
inductors results in the phase currents not being independent, making it challenging to
analyze the transient and steady-state characteristics of the converter. Consequently, to
improve the dynamic and static performances of an interleaved DC–DC converter with
a coupled inductor and to maximize its operational capability, it is necessary to analyze
its mechanism of operation thoroughly, establish the mathematical model, and design a
control strategy on this basis.
The actual operation of the converter is inevitably affected by the external environ-
ment. An appropriate control strategy and compensation network are essential for the
stability and reliability of the system. In order to design a converter with a reasonable
control performance, it is necessary to conduct small-signal analysis and transfer function
derivation. The state-space averaging method is a popular approach for DC–DC converter
modeling [16–18]. For interleaved DC–DC converters, the process of small-signal modeling
has been proposed in [19–23]. A small-signal model of the interleaved boost using the
state-space averaging method was developed by D. Maksimovic and A. Davoudi et. al.,
and an analog PID controller was designed [19,20]. H. M. M. Swamy et. al. used the
state-space averaging method to analyze the operation of a two-phase interleaved buck
converter in a high-power, high-intensity discharge lamp supply [21]. However, the above
literature used discrete inductors, which differ from the small-signal modeling process of
DC–DC converters with coupled inductors. N. Jantharamin et al. derived a complete small-
signal model of a two-phase interleaved boost converter with a reverse-coupled inductor
in a continuous–conduction mode (CCM) and a discontinuous–conduction mode (DCM),
which was then verified by a sweeping experiment [22]. A. C. Schittler et al. compared the
small-signal models of a two-phase interleaved boost converter using discrete inductors,
direct-coupled inductors, and reverse-coupled inductors [23]. The paper verified that the
reverse-coupled inductor has a high bandwidth and a high-quality factor in the closed-loop
system. However, in both [22,23], separate current loop controllers were designed for each
phase based on the duty cycle to a single-phase inductor current transfer function. As the
number of phases increases, this strategy increases the complexity of the controller and
requires more current sensors for the inductor current feedback.
As can be seen from this discussion, while there are many models of both discrete
inductor and coupled-inductor multiphase boost converters, little research has been pre-
sented on the simplified small-signal model and single current sensor control strategy
when utilizing a coupled inductor. In view of the above problems, this paper modeled an
interleaved boost converter with a coupled inductor operating in the CCM and designed
the controller based on the duty cycle to the total inductor current transfer function. To
ensure the accuracy of the model, the ESR of the inductors and capacitors were considered.
The following content of this paper is organized as follows. In Section 2, the small-signal
model and transfer function of the converter for the resistive load are derived, and the case
where the load degrades to a constant voltage source is considered. Based on the transfer
function in Section 2, a closed-loop control strategy for the interleaved boost converter with
a coupled inductor is designed in Section 3. The voltage and a current double closed-loop
control are adopted for the resistive load, a single-current closed-loop control is used for
the voltage source load, and the PI parameters are designed for both cases. In Section 4,
the effectiveness of the modeling and control is verified using a 2 kW interleaved boost
converter with a coupled inductor prototype.

2. Modeling of Interleaved Boost Converter with Coupled Inductor

The topology of the two-phase interleaved boost converter with a coupled inductor
is shown in Figure 1. The synchronous rectification topology is used here to help reduce
losses while ensuring that the converter can still operate in the CCM when a negative
inductor current is generated during one switching cycle. In the interleaved boost topology,
 2. Modeling of Interleaved Boost Converter with Coupled Inductor
2. Modeling of Interleaved Boost Converter with Coupled Inductor
The topology of the two-phase interleaved boost converter with a coupled inductor
is shown Theintopology
Figure 1.ofThe thesynchronous
two-phase interleaved
rectification boost converter
topology is usedwith a coupled
here to help inductor
reduce
Energies 2023, 16, 3810 is shown in Figure 1. The synchronous rectification
losses while ensuring that the converter can still operate in the CCM when topology is used here to ahelp reduce
3 of 15
negative
losses while ensuring that the converter can still operate
inductor current is generated during one switching cycle. In the interleaved boost topol- in the CCM when a negative
inductor
ogy, currentshare
two phases is generated
the inputduring one switching
and output ports, and cycle. In the interleaved
the filtering inductor atboost topol-
the input
ogy,
two uses
port two
phases phases share the
share the input and
a reverse-coupled input and
output
inductor. output
Inports,
Figure ports,
and and
1, the
L1 and the filtering
filtering
L2 form inductor inductor at the
at the input
the coupled input
port
inductor,
port uses a
usesself-inductancereverse-coupled
a reverse-coupled L1 =inductor. inductor.
L2 = L; theInmutual In Figure 1,
1, L1 and Lis
Figureinductance L 1 and L2 form the coupled inductor,
with 2 form
M; RLthe andcoupled
RC are the inductor, with
equivalent
with resistance
series self-inductance
self-inductance L1 = LLof
(ESR) 1 = L2 = L; the mutual inductance is M; RL and RC are the equivalent
2 =
the L;inductor
the mutualandinductance
output capacitor,is M; Rrespectively;
L and RC are vs the
andequivalent
vo are the
series
seriesand
input resistance
resistance
output(ESR)(ESR) ofthe
of
voltages, the inductorand
inductor
respectively; and ,output
iL1output
iL2, and capacitor,
capacitor,
iL are the respectively;
respectively; vsvsand
currents correspondingandvvooare
arethe
the
to
input
input
each andoutput
and
inductor output
branch voltages,
voltages,
and the respectively;
respectively; iL1, iL2, and
total input icurrent,
L1 , iL2 , and iiLL are
are the
respectively; the currents
Qcurrents
1~Q4 are
corresponding
corresponding
the MOSFETs; to
to
each
each inductor
inductor branch
branch and
and the
the total
total input
input current,
current, respectively;
respectively;
and C is the output capacitance. The load can be a resistive load1 or a4 constant voltage QQ ~Q
1~Q are
4 are the
the MOSFETs;
MOSFETs;
and CCis
and
source. isthe
The the outputcapacitance.
output
following capacitance.
content The
The
mainly load can
load
analyzes can be
thebe aa resistive
resistive
resistive load, load
load
andor or
the aaanalysis
constantprocess
constant voltage
voltage
source.
issource.
similarTheThe
when following
following
the load content
content mainly analyzes
mainly voltage
is a constant analyzessource.the resistive
the resistive load,
load, the
Therefore, and
andkey the analysis
the conclusions process
analysis processare
isissimilar
given similar
without when
when theload
the
further load isisaaconstant
elaboration. constantvoltage
voltagesource.
source.Therefore,
Therefore,the thekey keyconclusions
conclusions are are
givenwithout
given withoutfurther
furtherelaboration.
elaboration.

Figure 1. Two-phase interleaved boost topology with a coupled inductor.

Figure1.1.Two-phase
Figure Two-phaseinterleaved
interleavedboost
boosttopology
topologywith
withaacoupled
coupledinductor.
inductor.
2.1. Large-Signal Model
2.1.
2.1.Large-Signal
Large-SignalModel Model
The converter operates in the CCM, and the energy flow is mainly controlled by Q2
The converter operates in
inthe CCM,
CCM,and the
theenergy flow
flowaisismainly controlled by QQ2 2
and Q4The, whose converter operates
duty cycle can be the
continuously andadjusted
energy
within mainlyrange.
specific controlled
Q1 and byQ2
and
and QQ 44,, whose
whose duty cycle
duty cycle can
can bebecontinuously
continuouslyadjusted
adjustedwithin
withina aspecific
specificrange.
range.Q1Qand1 and
Q2
are 180° complementary, Q 3 and Q 4 are 180° complementary, and
◦ complementary, Q and Q are 180◦ complementary, and Q and Q are 180◦ Q 2 and Q 4 are 180°
Q 2 are
are 180°180complementary, Q3 drive
and
3 Qand
4 4are 180° complementary, and Q2 and Q4state
4 are 180°
phase-shifted conduction. The inductor current waveforms at2 steady are
phase-shifted
phase-shifted conduction.
conduction. The
The drive
drive and
and inductor
inductor current
current waveforms
waveforms at
at steady
steady state
stateare
are
shown
shown in inFigure 2,
Figure 2,where
2,where v gs2 and vgs4 represent the gate drive signals of Q2 and Q4, respec-
wherevgs2vgs2 and vgs4 represent the gate drive signals of Q2 4and Q4 ,
shown
tively, in Figure
shifted shifted
by half byof ahalf and
switching v gs4 represent
cycle. Without the gate drive signals of Q 2 and Q , respec-
respectively,
tively, shiftedmodes
by halfinofone of a switching
a switching cycle. cycle. considering
Without Without
considering
the dead band,
considering
the dead the
band,
thereband,
dead are
there are
four
there operating
are four operating switching cycle. The equations established for each operating
four are
mode operating
asmode modes inmodes
follows.
in one switching
one switching cycle. Thecycle. The equations
equations established established for each
for each operating
operating
mode are as follows. are as follows.

Figure 2. Drive waveforms and inductor current waveforms.

Energies 2023, 16, 3810 4 of 15

Operating mode 1 [0, dTs ], where switch Q2 is turned on, and switch Q4 is turned off.
The input voltage source charges the inductor L1 through Q2 , and the current iL1 increases
linearly. The inductor L2 discharges to the output port together with the input voltage
source through Q3 , and the current iL2 decreases linearly. The state-space equation at this
time is shown in Equation (1):

diL1 (t) di (t)



 L1 − M L2 = vs (t) − iL1 (t) RL



 dt dt
di (t) di (t)

L2 L2 − M L1 = vs (t) − iL2 (t) RL − vo (t) (1)


 dt dt
dvc (t) vo ( t )


= iL2 (t) −

 C
dt R
Operating mode 2 [dTs , 0.5Ts ], where the switches Q2 and Q4 are turned off. The
inductor L1 discharges to the output port together with the input voltage source through
Q1 , and the inductor L2 discharges to the output port together with the input voltage source
through Q3 . Both of currents iL1 and iL2 decrease linearly. The state-space equation at this
time is shown in Equation (2):

di (t) di (t)


 L1 L1 − M L2 = vs (t) − iL1 (t) RL − vo (t)



 dt dt
di (t) di (t)

L2 L2 − M L1 = vs (t) − iL2 (t) RL − vo (t) (2)


 dt dt
dvc (t) vo ( t )


= iL1 (t) + iL2 (t) −

 C
dt R
Operating mode 3 [0.5Ts , (0.5 + d)Ts ], where switch Q2 is turned off and switch Q4 is
turned on. The inductor L1 discharges to the output port together with the input voltage
source through Q1 , and the current iL1 decreases linearly. The input voltage source charges
the inductor L2 through Q4 , and the current iL2 increases linearly. The state-space equation
at this time is shown in Equation (3):

di (t) di (t)


 L1 L1 − M L2 = vs (t) − iL1 (t) RL − vo (t)

 dt dt
di (t) di (t)

L2 L2 − M L1 = vs (t) − iL2 (t) RL (3)
 dt dt
dv ( t ) vo ( t )


c
= iL1 (t) −

 C
dt R
Operating mode 4 [(0.5 + d)Ts , Ts ], where the switches Q2 and Q4 are turned off. The
energy flow process at this time is the same as that of Operating mode 2, and we obtain:

di (t) di (t)


 L1 L1 − M L2 = vs (t) − iL1 (t) RL − vo (t)



 dt dt
di (t) di (t)

L2 L2 − M L1 = vs (t) − iL2 (t) RL − vo (t) (4)


 dt dt
dvc (t) vo ( t )


= iL1 (t) + iL2 (t) −

 C
dt R
Energies 2023, 16, 3810 5 of 15

The state-space averaging equation is obtained by averaging the state-space variables

Energies 2023, 16, 3810 over one switching period and is called the large-signal model, which is shown in16(5):
5 of

dhiL1 (t)i Ts dhiL2 (t)i Ts
L1 −M = hvs (t)iTs − hiL1 (t)iTs RL − (1 − d)hvo (t)iTs





 dt dt
dhiL2 (td)iiL1 (t ) Ts dhiL1

 d (iL2
t)i(tTs
) Ts
L2  L1 Ts − M− M ==hvvss ((tt))iTsTs−−iL1h(itL2 RL −R(1L−−
) (Tst)i
Ts
d )(1vo−
(t )dTs
)hvo (t)iTs (5)
  dt d t dt d t
 d diL2


hv(ct )(tTs)i−TsM d iL1 (t ) Ts = v (t ) − i (t ) R − (1 −hdv)o (vt)i


 L2 C Ts
o (t ) Ts


 = (1d− d)(hiL1s(t)iTsTs + L2 hiL2 (Tst)iTs L )− (5)
 dtdt t R
 d vc (t ) vo (t )
where < >Ts 
means = (1
C averaging
the − d )( iL1 (t )performed
Ts
operation Ts
+ iL2 (t ) Tson
) − the variables over switchingTs
 dt R
period Ts .
where < >Ts means the averaging operation performed on the variables over switching
2.2.period
Small-Signal
Ts. Model
After obtaining the state-space averaging equation, Equation (5) is locally linearized
2.2.the
near Small-Signal Model point, and the Laplace transform is applied to the state equation.
static operating
After obtaining
The small-signal model theisstate-space
obtained averaging as (6), where D0 = 1Equation
equation, − D: (5) is locally linearized
near the static
 operating point, and the Laplace transform is applied to the state equation.
The small-signal

 sL model
î
1 L1 ( s )is
− obtained
sM î L2 ( sas
) (6),
= v̂ where
s ( s ) − D’
î L1 =
( s1)−RD:
L − D 0 v̂o (s) + Vo dˆ(s)

sL2 îL2 (s) − sMîL1 (s) = v̂s (s) − îL2 (s) RL − D 0 v̂o (s) + Vo dˆ(s)


 sL1 i L1 ( s ) − sM i L2 ( s ) = vs ( s) − i L1 ( s) RL − D ' v o ( s ) + Vo d ( s ) (6)

 sCv̂sLc2(isL2

 v̂ ( s )
s) − 0 (î i L1((ss) = ( s)(s−)) L −+ d ( s)o
)ˆ(+sV)o−

 ) (= DsM L1 +vîsL2 i L2− ( s)(RIL1 D 'IvL2
o ()sd (6)
 R
 sCv c ( s ) = D '(i L1 ( s ) + i L2 ( s )) − ( I + I )d ( s ) −
vo ( s)
It can be seen from (6) that there is a coupling L1 L2
relationship R between the inductor
currents of the two phases, which complicates the transient analysis. To avoid the added
It can be seen from (6) that there is a coupling relationship between the inductor cur-
complexity of the coupling effect on the control analysis, two currents are combined into
rents of the two phases, which complicates the transient analysis. To avoid the added
thecomplexity
total input-port current ieffect
of the coupling L (iL =oniL1 iL2 ). Equation
the+control analysis, (6) twoiscurrents
furtherare
reduced as (7):
combined into
the total input-port
current iL (iL = iL1 + iL2). Equation (6) is further reduced as (7):
L−M
 îL (s) = v̂s (s) − îL (s) RL − D 0 v̂o (s) + Vo dˆ(s)
2 L − M i L ( s) = vs ( s) − i L ( s) R − D ' v o ( s) + V d ( s)


 2 L o (7)
  sC v̂c (s) = D 0 îL (s) − IL dˆ(s) − v̂o (s) (7)


 sCv c ( s ) = D ' i L ( s ) − I d ( s ) −
vo ( s) R
 L
R
It can be concluded that the small-signal equation for an interleaved boost converter
It can be concluded
with a coupled inductor that the small-signal
is similar in form to equation for an interleaved
the small-signal boostfor
equation converter
a traditional
with a coupled inductor is similar in form to the small-signal equation for a traditional
single-phase boost converter. The only difference lies in the inductance. Therefore, the small-
single-phase boost converter. The only difference lies in the inductance. Therefore, the
signal model of the two-phase interleaved boost converter with a coupled inductor could
small-signal model of the two-phase interleaved boost converter with a coupled inductor
be could
equated to the small-signal
be equated model
to the small-signal of aofsingle-phase
model a single-phaseboostboostconverter withequiv-
converter with equivalent
inductance L eff − M)/2
alent inductance Leff = (L − M)/2 and a doubled switching frequency. The analysis of the of the
= (L and a doubled switching frequency. The analysis
single-phase
single-phaseboostboostconverter canbe
converter can beused
usedininthethe subsequent
subsequent analysis.
analysis. FigureFigure 3a shows
3a shows the the
small-signal
small-signal ACAC equivalent
equivalentcircuit
circuitofofaa two-phase interleavedboost
two-phase interleaved boostconverter
converter with
with coupled
cou-
inductor for the for
pled inductor resistive load. load.
the resistive WhenWhen the load is a is
the load constant
a constantvoltage source,
voltage source,the
thecharging
charg- and
ing and discharging
discharging process of process of the output
the output capacitor capacitor
can becan be neglected
neglected duedue to the
to the constantoutput
constant
output voltage. The system is changed from a second-order
voltage. The system is changed from a second-order system to a first-order system to a first-order system,
system, at
at which point the AC equivalent circuit is shown
which point the AC equivalent circuit is shown in Figure 3b. in Figure 3b.

(a) (b)

Figure 3. (a) Small-signal AC equivalent circuit for the resistive load; (b) small-signal AC equivalent
circuit for the voltage source.
Energies 2023, 16, 3810 6 of 15

2.3. Transfer Functions

According to the derivation in the previous section, the open-loop transfer functions
of the two-phase interleaved boost converter with a coupled inductor can be obtained. The
transfer functions for the resistive load are shown in Table 1.
From the above table, it can be seen that the two-phase interleaved boost converter
with a coupled inductor still has a right half-plane zero, whose frequency can be calculated
using the following formula:
D 02 R − RL
f RHPZ = (8)
2πLeff
The reduction in the equivalent inductance causes the right half-plane zero to appear
in the higher frequency band, ensuring that the converter can achieve a higher bandwidth.

Table 1. Transfer functions of the interleaved boost converter with a coupled inductor.

Item Expression
R CL − Leff + RC CD 02 R − RL RC C
− 02C eff s2 + s+1
Vo D 02 R − RL ) D R − RL D 02 R − RL
v̂o (s)
Gvd (s) = D 0 ( D 02 R + RL ) RLeff C + RC Leff C 2 Leff + RCRL + CRC RL + RCRC D 02
dˆ(s) s + s+1
D 02 R + RL D 02 R + RL
2Vo ( R/2 + RC )Cs + 1
î (s) D 02 R + RL RLeff C + RC Leff C 2 Leff + RCRL + CRC RL + RCRC D 02
Gid (s) = L s + s+1
dˆ(s) D 02 R + RL D 02 R + RL
RC CLeff 2 − Leff + RC CD 02 R − RL RC C
− s + s+1
v̂o (s) D 02 R − R L) D 02 R − RL D 02 R − RL
Gvi (s) =
îL (s) 2D 0 ( R/2 + RC )Cs + 1
D0 R RC Cs + 1
v̂o (s) D 02 R + R L RLeff C + RC Leff C 2 Leff + RCRL + CRC RL + RCRC D 02
Gvs (s) = s + s+1
v̂s (s) D 02 R + RL D 02 R + RL
1 ( R + RC )Cs + 1
î (s) D 02 R + RL RLeff C + RC Leff C 2 Leff + RCRL + CRC RL + RCRC D 02
Gis (s) = L s + s+1
v̂s (s) D 02 R + RL D 02 R + RL
RC Leff C/RL s2 +( Leff /RL + RC C s + 1


RRL
v̂o (s) D 02 R + RL RLeff C + RC Leff C 2 Leff + RCRL + CRC RL + RCRC D 02
Zp (s) = s + s+1
îo (s) D 02 R + RL D 02 R + RL
îL (s) D0 R RC Cs + 1
Zq (s) = −
îo (s) D 02 R + R L RLeff C + RC Leff C 2 Leff + RCRL + CRC RL + RCRC D 02
s + s+1
D 02 R + RL D 02 R + RL

When the load is a constant voltage source, the duty cycle to total inductor current
transfer function is as follows, which is characterized as a first-order inertia process:

iL ( s ) Vo
Gid (s) = = (9)
dˆ(s) v̂s (s)=0
sLeff + RL

The derivation of the transfer function helps in the analysis and design of the control
loop, which is discussed in detail in the next section.

3. Controller Design for Converter

This section proposes a controller design method for the two-phase interleaved boost
converter with a coupled inductor based on the mathematical model derived from the
previous derivation. This approach considers the influence of ESR of the energy storage
component on the frequency domain analysis and designs the controller through the total
Energies 2023, 16, 3810 7 of 15

inductor current, which has the advantage of a simple control structure and achieves a
high control accuracy and a fast response speed. The design parameters of the two-phase
interleaved boost converter with a coupled inductor in this paper are summarized in
Table 2.

Table 2. The parameters of the two-phase interleaved boost converter with a coupled inductor.

Parameter Value
Rated Power (kW) 2
Input Voltage (V) 150
Output Voltage (V) 300
Switching Frequency (kHz) 40
Self-Inductance (µH) 76
Mutual Inductance (µH) 24
Output Capacitor (µF) 100
ESR of Inductor (mΩ) 126
ESR of Capacitor (mΩ) 6.5

The system orders are different when the converter output is connected to a resistive
load and a voltage source load, so the controller was designed separately for them. Figure 4
shows a Bode diagram of the open-loop transfer functions Gvd and Gid for the resistive
load, taking into account the effect of the ESRs of the inductor and capacitor on the system.
It can be seen that the system resonates at 1.56 kHz (f 0 ). The ESRs help to mitigate the
resonant effect by reducing the resonant peak and slowing down the phase delay. In
this design case, the ESR of the inductor is relatively larger than that of the capacitor, for
which its effect is more noticeable. As can be observed from the high-frequency band of
the Gvd ’s Bode diagram, the right half-plane zero causes a 90◦ phase delay to the system
and increases the gain. The ESR of the capacitor reduces the hysteresis effect of this right
half-plane zero but further increases the gain in the high-frequency band. According to
(8), the right half-plane zero frequency f RHPZ = 68 kHz, and the phase remains close to or
lower than −180◦ from the middle to the high frequency. According to the above analysis,
the unfavorable amplitude and phase characteristics of the duty cycle to the output voltage
Energies 2023, 16, 3810 transfer function Gvd make it difficult to obtain a satisfactory closed-loop performance8 with
of 16
single voltage-loop compensation. As a result, a voltage and current double closed-loop
control strategy is considered.

(a) (b)
Figure 4.
Figure 4. (a)
(a) Duty
Dutycycle
cycleto
tothe
theoutput
outputvoltage
voltagetransfer
transferfunction
function Gvd
Gvd ; (b)duty
; (b) dutycycle
cycletoto the
the total
total induc-
inductor
tor current transfer function Gid.
current transfer function Gid .

3.1. PI Parameter Design for Resistive Load

According to the above analysis, a double closed-loop control was used to improve
the transient characteristics of the converter for the resistive load. A control block diagram
of the dual closed-loop control is shown in Figure 5, where Fm = 1/Vm is the transfer func-
tion of the PWM modulation; Vm = 1; Hi(s) and Hv(s) are the feedbacks; Gcv and Gci are the
voltage loop PI controller and current loop PI controller, respectively; and the transfer
 (a) (b)
Figure 4. (a) Duty cycle to the output voltage transfer function Gvd; (b) duty cycle to the total induc-
tor current transfer function Gid.
Energies 2023, 16, 3810 8 of 15
3.1. PI Parameter Design for Resistive Load
According to the above analysis, a double closed-loop control was used to improve
the transient characteristics
3.1. PI Parameter of the converter
Design for Resistive Load for the resistive load. A control block diagram
of the dual closed-loop control is shown in Figure 5, where Fm = 1/Vm is the transfer func-
According to the above analysis, a double closed-loop control was used to improve the
tion of the PWM modulation; Vm = 1; Hi(s) and Hv(s) are the feedbacks; Gcv and Gci are the
transient characteristics of the converter for the resistive load. A control block diagram of
voltage loop PI controller and current loop PI controller, respectively; and the transfer
the dual closed-loop control is shown in Figure 5, where Fm = 1/V m is the transfer function
functions are as follows:
of the PWM modulation; V = 1; H (s) and H (s) are the feedbacks; G and G are the
m i v cv ci
voltage loop PI controller and current loop K s + K vi
PIvpcontroller, respectively; and the transfer
functions are as follows: Gcv ( s ) = (10)
Kvp s + s Kvi
Gcv (s) = (10)
s
K ip s + Kii
Gci ( s ) = K s + K (11)
ip s ii
Gci (s) = (11)
s

Figure
Figure5.5.Block
Blockdiagram
diagramof
ofthe
thedouble
doubleclosed-loop
closed-loopcontrol.
control.

The
Thefeedback
feedbackofofthe
thevoltage
voltageandandcurrent
currentloops
loopsareareboth
bothlow-pass
low-passfilters
filterswith
withaacut-off
cut-off
frequency
frequency of
of 20
20 kHz,
kHz, and
and the
the transfer
transfer function
function is
is shown
shown in
in (12):
(12):
11
HvH s) =HH
(sv)(= ( s) =
i ( si ) = (12)
11 (12)
+ 11
ss +
2 · 20000
2π
Considering
Considering the delay
delay caused
causedby
bythe
thedigital
digitalcontrol,
control,thethe delay
delay process
process is introduced
is introduced and
and the first-order approximation is made to the first-order inertia process with
the first-order approximation is made to the first-order inertia process with the following the fol-
lowing
transfertransfer function:
function:
1
Gd (s) ≈ (13)
Ts s + 1
Bode diagrams of the current inner-loop compensation and voltage outer-loop com-
pensation are shown in Figure 6. As shown in Figure 6a, the crossover frequency of the
current inner loop is too high, and the gain margin and phase margin are negative, which
is not conducive to system stability. When selecting the crossover frequency, a variety of
factors should be taken into consideration, both to reduce the high-frequency noise caused
by the switching frequency and to meet the dynamic performance requirements. At the
same time, the crossover frequency should be significantly higher than the resonant fre-
quency to provide enough gain at the peak to eliminate resonance. On balance, the control
parameters of the current inner loop were selected as Kip = 0.0034 and Kii = 10, at which
point the crossing frequency of the current inner loop was reduced from 60 kHz to 5 kHz,
with a phase margin of PM = 42◦ . On the basis of the determination of the parameters of
the current inner loop, a Bode diagram of the voltage outer loop was drawn, as shown in
Figure 6b. In order to ensure that the current loop can track the current reference output
by the voltage outer-loop controller in time, the response speed of the current inner loop
needs to be significantly higher than that of the voltage outer loop. Therefore, the crossover
frequency of the outer loop is usually designed to be approximately one-fifth of that of the
inner loop [24]. As can be seen from Figure 6b, the crossover frequency of the voltage loop
is too low, which is also not conducive to the fast response of the system. Finally, the control
parameters of the voltage loop are selected as Kvp = 1.57 and Kvi = 101, which increases
 by the voltage outer-loop controller in time, the response speed of the current inner loop
needs to be significantly higher than that of the voltage outer loop. Therefore, the crosso-
ver frequency of the outer loop is usually designed to be approximately one-fifth of that
of the inner loop [24]. As can be seen from Figure 6b, the crossover frequency of the volt-
Energies 2023, 16, 3810 age loop is too low, which is also not conducive to the fast response of the system. Finally,
9 of 15
the control parameters of the voltage loop are selected as Kvp = 1.57 and Kvi = 101, which
increases the crossover frequency, and the crossover frequency is fc = 1 kHz and the phase
margin
the is PMfrequency,
crossover = 90°. Theand
totalthe
PI crossover
controllerfrequency
parameters
is ffor the resistive load are shown in
c = 1 kHz and the phase margin is
Table 3. ◦
PM = 90 . The total PI controller parameters for the resistive load are shown in Table 3.

(a) (b)
Figure 6.
Figure 6. (a)
(a) Compensation
Compensation of of the
the current
current inner
inner loop;
loop; (b) compensation
(b) compensation of of
thethe voltage
voltage outer
outer loop.
loop.
Table 3. The total PI controller parameters for the resistive load.
Table 3. The total PI controller parameters for the resistive load.
Item Proportional Coefficient Integral Coefficient
CurrentItem
Inner Loop Proportional Coefficient
0.0034 Integral Coefficient
10
Current InnerLoop
Voltage Outer Loop 0.0034
1.57 10
101
Voltage Outer Loop 1.57 101
The small-signal block diagram when using a double closed-loop control is shown in
Figure The7, small-signal
where v̂s and block diagramthe
îo represent when using
input a double
voltage closed-loop
small-signal control is and
disturbance shown
loadin
Energies 2023, 16, 3810 Figure 7,
current where v s disturbance,
small-signal and i o represent the input
respectively. voltagefunctions
The transfer small-signal disturbance
in Figure 7 have
10 of 16 and
been
given above.small-signal
load current The audio sensitivity
disturbance, and the closed-loop
respectively. output functions
The transfer impedance in represent the
Figure 7 have
suppression
been given above.capability of the sensitivity
The audio converter for andinput noise and load
the closed-loop fluctuation,
output impedance respectively.
represent
Taking
the the closed-loop
suppression
respectively. outputof
Takingcapability
the closed-loop impedance
the as an example,
converter
output impedance forasinput thenoise
change
an example, in
and
the the
load
change output
the voltage
in fluctuation,
after
outputthevoltage
systemafter
is disturbed
the system is isdetermined
disturbed isby the product
determined by of
thethe magnitude
product of the of the step load
magni-
change
tude of and the peak
the step value of
load change and thetheoutput impedance
peak value together,
of the output as shown
impedance in Equation
together, as (14).
Itshown
can beinseen that (14).
Equation the smaller
It can bethe seenoutput
that theimpedance,
smaller the the more
output stable thethe
impedance, output
more voltage
stable
of the the output voltage
converter. of theit
Therefore, converter. Therefore,
is necessary it is necessary
to minimize to minimize
the audio the audio
sensitivity and output
sensitivity and
impedance output a
to obtain impedance
constant to obtainvoltage.
output a constant output voltage.
Z o peak /20
v (t ) =I 10 | Zo |peak /20 (14)
voo(t)pp step
pp = Istep 10 (14)

Figure 7. Small-signal block diagram of the double closed-loop control.

Figure 7. Small-signal block diagram of the double closed-loop control.
Combined with the above figure, the audio sensitivity is calculated according to the
Mason gain formula as (15):

vo Gvs H vVm + Gvs H v H i Gci Gid Gd − Gis H i Gci Gd Gvd H v

Au = = (15)
Energies 2023, 16, 3810 10 of 15

Combined with the above figure, the audio sensitivity is calculated according to the
Mason gain formula as (15):

v̂o Gvs Hv Vm + Gvs Hv Hi Gci Gid Gd − Gis Hi Gci Gd Gvd Hv

Au = = (15)
v̂s closed Vm + Gcv Gci Gd Gvd Hi + Gci Gd Gid Hi

The closed-loop output impedance is calculated as follows:

v̂o Zp Hv Vm + Zp Hv Hi Gci Gid Gd − Zq Hi Gci Gd Gvd Hv

Zo = = (16)
îo closed Vm + Gcv Gci Gd Gvd Hi + Gci Gd Gid Hi

Figure 8 shows a Bode diagram comparison between the closed-loop transfer function
and the open-loop transfer function. Figure 8a compares the Bode diagram of the audio
Energies 2023, 16, 3810
sensitivity with the input–output transfer function, and the peak of the magnitude decreases
11 of 16
by 30 dB. From Figure 8b, it can be observed that the peak of the magnitude curve of the
Energies 2023, 16, 3810 audio sensitivity is 12 dB lower than the open-loop output impedance. The decrease 11 of 16
in the peak ensures the output voltage is as constant as possible despite changes in the
external conditions.

(a) (b)
Figure
(a) 8. (a) Audio sensitivity; (b) output impedance. (b)
Figure 8. (a) Audio sensitivity; (b) output impedance.
3.2. PI 8.
Figure Parameter
(a) AudioDesign for the
sensitivity; (b)Voltage
output Source Load
impedance.
When
3.2. PI the load
Parameter is a for
Design voltage source,
the Voltage the current
Source Load at the input port is the control target,
and a single-current closed loop can be used. The control block diagram is shown in Figure
When the
the load
loadisisaavoltage
voltagesource,
source,the
the current
current at at
thethe input
input port
port is the
is the control
control target,
target, and
9.
and a single-current
a single-current closed
closed looploop
can can be used.
be used. TheThe control
control block
block diagram
diagram is shown
is shown in Figure
in Figure 9.
9.

Figure 9.
Figure 9. Block
Block diagram
diagram of the single-current
of the single-current closed-loop
closed-loop control.
control.

Figure 9. Block diagram of the single-current closed-loop control.

According to
According to(9),
(9),the
theopen-loop
open-loopBode Bodediagram
diagramofofthe the current
current loop
loop is shown
is shown in Figure
in Figure 10.
10.can
It It can
be be
seen seen that
that thethe crossover
crossover frequency
frequency ofofthe
thecurrent
currentloop
loopisistoo
toohigh
high to
to meet
meet the
According to (9), the open-loop Bode diagram of the current loop is shown in Figure
dynamic response requirements of the system. At this time, the phase phase margin
margin isis negative,
negative,
10. It can be seen that the crossover frequency of the current loop is too high to meet the
indicating that the system is unstable. After adding the PI controller, the system traverses
dynamic response requirements of the system. At this time, the phase margin is negative,
0 dB with
with aa slope
slopeof −20dB/dec
of−20 dB/dec and hashas
and a slope
a slope of −
of −40 dB/dec in both
40 dB/dec in the
bothlow-
the and
low-high-
and
indicating that the system is unstable. After adding the PI controller, the system traverses
high-frequency
frequency bands,bands, takingtaking into account
into account the dynamic
the dynamic responseresponse performance
performance and theand the
ability
0 dB with a slope of −20 dB/dec and has a slope of −40 dB/dec in both the low- and high-
ability to suppress
to suppress noise. Thenoise. The controller
controller parameters
parameters at this
at this time time
are are chosen
chosen Kip =K0.002,
as Kip =as0.002, ii = 1,
frequency bands, taking into account the dynamic response performance and the ability
K ii = 1, crossover
crossover frequency frequency f c =and
fc = 4 kHz, 4 kHz, andmargin
phase phase PM margin PM = 60◦ .
= 60°.
to suppress noise. The controller parameters at this time are chosen as Kip = 0.002, Kii = 1,
crossover frequency fc = 4 kHz, and phase margin PM = 60°.
 10. It can be seen that the crossover frequency of the current loop is too high to meet the
dynamic response requirements of the system. At this time, the phase margin is negative,
indicating that the system is unstable. After adding the PI controller, the system traverses
0 dB with a slope of −20 dB/dec and has a slope of −40 dB/dec in both the low- and high-
frequency bands, taking into account the dynamic response performance and the ability
Energies 2023, 16, 3810 to suppress noise. The controller parameters at this time are chosen as Kip = 0.002, 11
Kiiof= 15
1,
crossover frequency fc = 4 kHz, and phase margin PM = 60°.

Energies 2023, 16, 3810 12 of 16

Figure 10. Single-current

Figure 10. Single-current loop
loop Bode
Bode diagram.
diagram.
4. Experiments—Results
4. Experiments—Resultsand andAnalysis
Analysis
Toverify
To verifythe
theeffectiveness
effectivenessof ofthe
thesmall-signal
small-signalmodel
modelandandits
itscontroller
controllerparameters,
parameters,aa
two-phase interleaved boost converter with a coupled inductor experimental
two-phase interleaved boost converter with a coupled inductor experimental platform platform
was
constructed in this paper. As shown in Figure 11, the main parameters of the circuitcircuit
was constructed in this paper. As shown in Figure 11, the main parameters of the were
were consistent
consistent with2.Table
with Table An LCR 2. An LCR (IM3533-01)
(IM3533-01) meter wasmeter
used towas used tothe
measure measure the self-
self-inductance,
inductance, mutual inductance (indirectly measured), and ESR of
mutual inductance (indirectly measured), and ESR of the inductors and capacitors. the inductors andThe
ca-
pacitors. The power semiconductor was a SiC MOSFET (FF6MR12W2M1P_B11)
power semiconductor was a SiC MOSFET (FF6MR12W2M1P_B11) from Infineon, the from In-
fineon, the output capacitor was a film capacitor with low ESR, and the
output capacitor was a film capacitor with low ESR, and the coupled inductor was made coupled inductor
was made
from from a customized
a customized core of DMR95 core of DMR95wound
material material wound
with with Litz
Litz wire. The wire. The control-
controllers of the
lers of the
platform platform
included includedbased
controllers controllers
on DSPbased on DSP TMS320C28346
TMS320C28346 and FPGA
and FPGA EP3C80F484I7.
EP3C80F484I7.
The The DSP was
DSP was responsible responsible
for executing for executing
algorithms, and algorithms,
the FPGA was andresponsible
the FPGA was re-
for the
sponsiblecontrol
sampling for the signals
sampling andcontrol signals
generating theand generating
driving signals.the driving signals.

Figure11.
Figure 11.Experimental
Experimentalplatform.
platform.

Theexperiment
The experimentconsidered
consideredtwo twocases
caseswhere
whereaaconstant
constantvoltage
voltagesource
sourceand
andaaresistive
resistive
loadare
load areconnected
connectedto tothe
theoutput
outputport.
port. Figure
Figure1212shows
showsthe
thesteady
steadyandandtransient
transientresponse
response
waveforms
waveformsof ofthe
theconverter
converterfor forthe
theresistance
resistanceload.
load.The
Thesteady-state
steady-statewaveforms
waveformsatatDD<<0.5 0.5
and
andDD>>0.5 0.5are
aredepicted
depicted inin
Figures
Figure12a12aand
and12b, respectively.
Figure Notably, the
12b, respectively. currentthe
Notably, waveform
current
no longer exhibits
waveform a triangular
no longer exhibitsshape under theshape
a triangular coupling effect.
under the Figure
coupling12c effect.
shows the steady-
Figure 12c
state
shows voltage and currentvoltage
the steady-state waveforms of the converter,
and current waveforms with
of athe
single inductor
converter, current
with ripple
a single in-
of approximately 13 A and a total input current ripple of less than 1 A. It
ductor current ripple of approximately 13 A and a total input current ripple of less than 1is clear that the
interleaved
A. It is clearstructure effectively reduced
that the interleaved structurethe input current
effectively ripple.
reduced The output
the input currentvoltage
ripple.and
The
current
output transient
voltage andresponse
current waveforms
transient when the input
response voltage
waveforms was quickly
when the input adjusted
voltagefrom
was
150 V to 160
quickly V are from
adjusted shown 150inVFigure
to 16012d.
V areThe graphic
shown shows 12d.
in Figure that The
the output
graphicvoltage
showscan thatstill
the
output voltage can still be kept steady at 300 V. Figure 12e shows the change in the output
voltage caused by the step change in the load current. When the load resistor was adjusted
to make the system load jump from 75% to a full load, the output voltage waveform tem-
porarily dropped to approximately 300 V, with a drop of 4 V. Figure 12f is the response
Energies 2023, 16, 3810 12 of 15

be kept steady at 300 V. Figure 12e shows the change in the output voltage caused by the
step change in the load current. When the load resistor was adjusted to make the system
load jump from 75% to a full load, the output voltage waveform temporarily dropped to
approximately 300 V, with a drop of 4 V. Figure 12f is the response waveform of the voltage
and current when the output voltage command was adjusted by the upper computer. When
the voltage instruction was modified from 290 to 300 V, there was no visible overshoot, and
the voltage response was quick. Figure 13 is the start-up process and the current waveform
of the dynamic adjustment of the current command when the output was a constant voltage
source. The waveforms show that the current loop control had a fast dynamic response
and good steady-state performance. Moreover, the efficiency of the converter is depicted in
Figure 14. Figure 14a represents the efficiency curve in the full output power range, and
Energies 2023, 16, 3810 the power was modified by adjusting the input current. Figure 14b shows the 13 ofefficiency
16

measured near the rated power, which is 98.031%.

(a) (b)

(c) (d)

(e) (f)
Figure 12. Experimental waveforms of the resistive load: (a) steady-state waveform at D < 0.5; (b)
Figure 12. Experimental waveforms of the resistive load: (a) steady-state waveform at D < 0.5;
steady-state waveform at D > 0.5; (c) steady-state waveform at D = 0.5; (d) step input response; (e)
(b)step
steady-state waveform
load response; at D >of0.5;
(f) regulation the(c) steady-state
voltage command.waveform at D = 0.5; (d) step input response;
(e) step load response; (f) regulation of the voltage command.
 (e) (f)

Energies 2023, 16, 3810 Figure 12. Experimental waveforms of the resistive load: (a) steady-state waveform at D < 0.5;
13 of(b)
15
steady-state waveform at D > 0.5; (c) steady-state waveform at D = 0.5; (d) step input response; (e)
step load response; (f) regulation of the voltage command.

Energies 2023, 16, 3810 14 of 16

(a) (b)

Figure 13.
Figure Experimentalwaveforms
13. Experimental waveformsof of
thethe constant
constant voltage
voltage source
source load;
load; (a) start-up
(a) start-up process;
process; (b)
(b) regulation of the current command.
regulation of the current command.

(a) (b)
Figure
Figure 14.
14. (a)
(a) Experimental
Experimental efficiency
efficiency of
of the
the two-phase
two-phase interleaved
interleaved boost
boost converter
converter with
with aa coupled
coupled
inductor; (b) efficiency measurement of the rated power.
inductor; (b) efficiency measurement of the rated power.

5. Conclusions
Conclusions
In this paper, aa small-signal
small-signal model
modelof ofaatwo-phase
two-phaseinterleaved
interleavedboost boostconverter
converterwith witha
acoupled
coupledinductor
inductoroperating
operatingininthe theCCM
CCMwas wasdeveloped
developed usingusing thethe state-space averaging
method.
method. The The model
model waswas based
based onon the
the duty
duty cycle
cycle toto the
the total
total inductor
inductor current
current transfer
transfer
function
function andand considered
consideredthe theeffect
effectofofthe
theESRs
ESRs of of
thethe
inductors
inductors andandcapacitors
capacitorson the ac-
on the
curacy
accuracyof the model.
of the A dual
model. closed-loop
A dual closed-loop control system
control consisting
system of a current
consisting inner-loop
of a current inner-
loop controller
controller and aand a voltage
voltage outer-loop
outer-loop controller
controller was was designed
designed and and implemented
implemented for the
for the re-
resistive
sistive load,
load, while
while a asingle-current
single-currentlooploopwas wasused
usedtotorealize
realizethe thecontrol
control for
for the
the voltage
source load.
source load.ToTovalidate
validate thethe proposed
proposed controller,
controller, a 2 akW2 kW interleaved
interleaved boostboost converter
converter pro-
prototype was built and tested. The experimental results demonstrate
totype was built and tested. The experimental results demonstrate that the modeling and that the modeling
and controller
controller design
design are are effective
effective andand ensure
ensure good
good dynamicand
dynamic andsteady-state
steady-state performance
performance
while simplifying the control structure.
Because one current sensor is utilized, diagnosing
Because diagnosing potential
potential current unevenness
unevenness and and
faults is challenging. Therefore, future research will focus on diagnosing
faults is challenging. Therefore, future research will focus on diagnosing and resolving and resolving the
potential issue of current unevenness without increasing the number
the potential issue of current unevenness without increasing the number of circuit sensorsof circuit sensors and
complexity.
and On the
complexity. other
On the hand,
other special
hand, focus
special focusmust
mustbe be
given
given to to
thethe
problem
problem ofof controller
control-
optimization by adjusting the structure and parameters of the controller
ler optimization by adjusting the structure and parameters of the controller to achieve the to achieve the
optimum performance
optimum performanceof ofthe
theconverter.
converter.Another
Anotherfuture
futureresearch
researchisisaimed
aimedatatintegrating
integrating a
a magnetics design, which has a positive effect on increasing the
magnetics design, which has a positive effect on increasing the efficiency and power den-efficiency and power
density
sity of theof system.
the system.
As mentioned,
As mentioned, futurefutureworkworkshould
should focus
focus further
further on on efficiency
efficiency andand power
power densitydensity
im-
improvements, fault detection, and also on controller
provements, fault detection, and also on controller optimization. optimization.

Author Contributions: Conceptualization, Z.D., J.L. and K.L.; methodology, Z.D.; software, J.L.;
validation, Z.D., Z.M. and G.X.; writing—original draft preparation, Z.D.; writing—review and ed-
iting, J.L., K.L., Z.M. and G.X. All authors have read and agreed to the published version of the
manuscript.
Energies 2023, 16, 3810 14 of 15

Author Contributions: Conceptualization, Z.D., J.L. and K.L.; methodology, Z.D.; software, J.L.;
validation, Z.D., Z.M. and G.X.; writing—original draft preparation, Z.D.; writing—review and
editing, J.L., K.L., Z.M. and G.X. All authors have read and agreed to the published version of
the manuscript.
Funding: This research was funded by the National Natural Science Foundation of China, grant
number: 52177202.
Data Availability Statement: Not applicable.
Conflicts of Interest: The authors declare no conflict of interest. The funders had no role in the design
of the study; in the collection, analyses, or interpretation of data; in the writing of the manuscript; or
in the decision to publish the results.

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