ELECTRONIC DEVICES AND

CIRCUITS
SEMICONDUCTOR DIODE

SEMICONDUCTOR

A semiconductor is a material which has electrical conductivity to a degree between that

of a metal (such as copper) and that of an insulator (such as glass). Semiconductors are the
foundation of modern electronics, including transistors, solar cells, light-emitting diodes (LEDs),
quantum dots and digital and analog integrated circuits.

DIODE

Diode – Di + ode

Di means two and ode means electrode. So physical contact of two electrodes is known
as diode and its important function is alternative current to direct current.

REVIEW OF INTRINSIC AND EXTRINSIC SEMICONDUCTORS

INTRINSIC SEMICONDUCTOR

An intrinsic semiconductor is one, which is pure enough that impurities do not

appreciably affect its electrical behavior. In this case, all carriers are created due to thermally or
optically excited electrons from the full valence band into the empty conduction band.

Thus equal numbers of electrons and holes are present in an intrinsic semiconductor.
Electrons and holes flow in opposite directions in an electric field, though they contribute to
current in the same direction since they are oppositely charged. Hole current and electron current
are not necessarily equal in an intrinsic semiconductor, however, because electrons and holes
have different effective masses (crystalline analogues to free inertial masses).

The concentration of carriers is strongly dependent on the temperature. At low

temperatures, the valence band is completely full making the material an insulator.
Both silicon and germanium are tetravalent, i.e. each has four electrons (valence electrons) in
their outermost shell. Both elements crystallize with a diamond-like structure, i.e. in such a way
that each atom in the crystal is inside a tetrahedron formed by the four atoms which are closest to
it. Each atom shares its four valence electrons with its four immediate neighbours, so that each
atom is involved in four covalent bonds.

EXTRINSIC SEMICONDUCTOR

An extrinsic semiconductor is one that has been doped with impurities to modify the
number and type of free charge carriers. An extrinsic semiconductor is a semiconductor that has
been doped, that is, into which a doping agent has been introduced, giving it different electrical
properties than the intrinsic (pure) semiconductor.

Doping involves adding dopant atoms to an intrinsic semiconductor, which changes the
electron and hole carrier concentrations of the semiconductor at thermal equilibrium. Dominant
carrier concentrations in an extrinsic semiconductor classify it as either an n-type or p-type
semiconductor. The electrical properties of extrinsic semiconductors make them essential
components of many electronic devices.

A pure or intrinsic conductor has thermally generated holes and electrons. However these
are relatively few in number. An enormous increase in the number of charge carriers can by
achieved by introducing impurities into the semiconductor in a controlled manner.

The result is the formation of an extrinsic semiconductor. This process is referred to as

doping. There are basically two types of impurities: donor impurities and acceptor impurities.
Donor impurities are made up of atoms (arsenic for example) which have five valence electrons.
Acceptor impurities are made up of atoms (gallium for example) which have three valence
electrons.

The two types of extrinsic semiconductor

N-TYPE SEMICONDUCTORS

Extrinsic semiconductors with a larger electron concentration than hole concentration are
known as n-type semiconductors. The phrase 'n-type' comes from the negative charge of the
electron. In n-type semiconductors, electrons are the majority carriers and holes are the minority
carriers. N-type semiconductors are created by doping an intrinsic semiconductor with donor.
impurities. In an n-type semiconductor, the Fermi energy level is greater than that of the intrinsic
semiconductor and lies closer to the conduction band than the valence band. Arsenic has 5
valence electrons, however, only 4 of them form part of covalent bonds. The 5th electron is then
free to take part in conduction. The electrons are said to be the majority carriers and the holes are
said to be the minority carriers.

P-TYPE SEMICONDUCTORS

As opposed to n-type semiconductors, p-type semiconductors have a larger hole

concentration than electron concentration. The phrase 'p-type' refers to the positive charge of the
hole. In p-type semiconductors, holes are the majority carriers and electrons are the minority
carriers. P-type semiconductors are created by doping an intrinsic semiconductor with acceptor
impurities. P-type semiconductors have Fermi energy levels below the intrinsic Fermi energy
level.

The Fermi energy level lies closer to the valence band than the conduction band in a p-
type semiconductor. Gallium has 3 valence electrons, however, there are 4 covalent bonds to fill.
The 4th bond therefore remains vacant producing a hole. The holes are said to be the majority
carriers and the electrons are said to be the minority carriers.

PN JUNCTION :

When the N and P-type semiconductor materials are first joined together a very large
density gradient exists between both sides of the junction so some of the free electrons from the
donor impurity atoms begin to migrate across this newly formed junction to fill up the holes in
the P-type material producing negative ions.

However, because the electrons have moved across the junction from the N-type silicon
to the P-type silicon, they leave behind positively charged donor ions (ND) on the negative side
and now the holes from the acceptor impurity migrate across the junction in the opposite
direction into the region are there are large numbers of free electrons. As a result, the charge
density of the P-type along the junction is filled with negatively charged acceptor ions (NA), and
the charge density of the N-type along the junction becomes positive. This charge transfer of
electrons and holes across the junction is known as diffusion.

This process continues back and forth until the number of electrons which have crossed
the junction have a large enough electrical charge to repel or prevent any more carriers from
crossing the junction. The regions on both sides of the junction become depleted of any free
carriers in comparison to the N and P type materials away from the junction. Eventually a state
of equilibrium (electrically neutral situation) will occur producing a "potential barrier" zone
around the area of the junction as the donor atoms repel the holes and the acceptor atoms repel
the electrons. Since no free charge carriers can rest in a position where there is a potential barrier
the regions on both sides of the junction become depleted of any more free carriers in
comparison to the N and P type materials away from the junction. This area around the junction
is now called the Depletion Layer.
THE PN JUNCTION

The total charge on each side of the junction must be equal and opposite to maintain a
neutral charge condition around the junction. If the depletion layer region has a distance D, it
therefore must therefore penetrate into the silicon by a distance of Dp for the positive side, and a
distance of Dn for the negative side giving a relationship between the two of Dp.NA = Dn.ND in
order to maintain charge neutrality also called equilibrium.

PN JUNCTION DIODE:
As the N-type material has lost electrons and the P-type has lost holes, the N-type material has
become positive with respect to the P-type.

Then the presence of impurity ions on both sides of the junction cause an electric field to be
established across this region with the N- side at a positive voltage relative to the P-side. The
problem now is that a free charge requires some extra energy to overcome the barrier that now
exists for it to be able to cross the depletion region junction. This electric field created by the
diffusion process has created a "built-in potential difference" across the junction with an open-
circuit (zero bias) potential of:

Where: Eo is the zero bias junction voltage, VT the thermal voltage of 26mV at room
temperature, ND and NA are the impurity concentrations and ni is the intrinsic concentration.

A suitable positive voltage (forward bias) applied between the two ends of the PN junction
can the free electrons and holes with the extra energy. The external voltage required to
overcome this potential barrier that now exists is very much dependent upon the type of
semiconductor material used and its actual temperature.

Typically at room temperature the voltage across the depletion layer for silicon is about 0.6 - 0.7
volts and for germanium is about
0.3 - 0.35 volts. This potential barrier will always exist even if the device is not connected to any
external power source.

The significance of this built-in potential across the junction, is that it opposes both the
flow of holes and electrons across the junction and is why it is called the potential barrier. In
practice, a PN junction is formed within a single crystal of material rather than just simply
joining or fusing together two separate pieces.

Electrical contacts are also fused onto either side of the crystal to enable an electrical
connection to be made to an external circuit. Then the resulting device that has been made is
called a PN junction Diode or Signal Diode.

DEPLETION LAYER PN JUNCTION

 If one side of crystal pure semiconductor Si(silicon) or Ge(Germanium) is doped with
acceptor impurity atoms and the other side is doped with donor impurity atoms , a PN junction is
formed as shown in figure.P region has high concentration of holes and N region contains large number
of electrons.

As soon as the junction is formed, free electrons and holes cross through the junction by
the process of diffusion. During this process , the electrons crossing the junction from N- region
into P-region , recombine with holes in the P-region very close to the junction. Similarly holes
crossing the junction from the P-region into the N-region, recombine with electrons in the N-
region very close to the junction. Thus a region is formed, which does not have any mobile
charge very close to the junction. This region is called the depletion layer of pn junction.

In this region, on the left side of the junction, the acceptor atoms become negative ions
and on the right side of the junction, the donor atoms become positive ions as shown in figure.

FUNCTION OF DEPLETION LAYER OF PN JUNCTION

An electric field is set up, between the donor and acceptor ions in the depletion layer of
the pn junction .The potential at the N-side is higher than the potential at P-side. Therefore
electrons in the N- side are prevented to go to the lower potential of P-side. Similarly, holes in
the P-side find themselves at a lower potential and are prevented to cross to the N-side. Thus,
there is a barrier at the junction which opposes the movement of the majority charge carriers.
The difference of potential from one side of the barrier to the other side of the barrier is called
potential barrier. The potential barrier is approximately 0.7V for a silicon PN junction and 0.3V
for germanium PN junction. The distance from one side of the barrier to the other side is called
the width of the barrier, which depends on the nature of the material.

CURRENT EQUATION:

To derive the expression for the total current as function of applied voltage (neglect the
barrier width)
When diode is forward biased, holes injected from the p to n material. The concentration
pn of holes in the n-side is increased above equilibrium value pno
 where

I – diode current

Io – diode reverse saturation current at room temperature

V – external voltage applied to the diode

Ƞ - a constant, 1 for Ge and 2 for Si

VT = kT/q = T/11600, thermal voltage

K – Boltzmann‘s constant (1.38066x10^-23 J/K)

q – charge of electron (1.6x10^-19 C)

T – temperature of the diode junction

At room temperature (T=300 K), VT = 26mV. Substituting this value in current equation,

For germanium diode,

since Ƞ =1 for Ge

For silicon diode,

since Ƞ =2 for

Si.

If the value of applied voltage is greater than unity, then the equation of diode current for
germanium,

and for silicon,

when the diode is reverse biased, its current equation may be obtained by changing the
sign of voltage V. Thus diode current with reverse bias is
 VT)
If V >> V T then the term e (-V/ Ƞ << 1 therefore I=Io termed as reverse
saturation current, which is valid as long as the external voltage is below the breakdown value.

FORWARD BIAS CONDITION

When positive terminal of the battery is connected to the P-type and negative terminal to
N-type of the PN junction diode that is known as forward bias condition.

Operation

The applied potential in external battery acts in opposition to the internal potential barrier
which disturbs the equilibrium.
 As soon as equilibrium is disturbed by the application of an external voltage, the Fermi
level is no longer continuous across the junction.

Under the forward bias condition the applied positive potential repels the holes in P type
region so that the holes move towards the junction and the applied positive potential repels the
electrons in N type region so that the electrons move towards the junction.

When the applied potential is more than the internal barrier potential the depletion region
and internal potential barrier disappear.

V-I Characteristics

As the forward voltage increased for VF < Vo, the forward current IF almost zero because
the potential barrier prevents the holes from P region and electrons from N region to flow across
the depletion region in opposite direction.

For VF > Vo, the potential barrier at the junction completely disappears and hence, the
holes cross the junction from P to N type and electrons cross the junction to opposite direction,
resulting large current flow in external circuit.

.
A feature noted here is the cut in voltage or threshold voltage V F below which the current
is very small.

At this voltage the potential barrier is overcome and the current through the junction
starts to increase rapidly.

Cut in voltage is 0.3V for germanium and 0.7 for silicon.

UNDER REVERSE BIAS CONDITION

When the negative terminal of the battery is connected to the P-type and positive terminal
to N-type of the PN junction diode that is known as forward bias condition.
Operation

The holes from the majority carriers of the P side move towards the negative terminal of
the battery and electrons which from the majority carrier of the N side are attracted towards the
positive terminal of the battery.

Hence, the width of the depletion region which is depleted of mobile charge carriers
increases. Thus, the electric field produced by applied reverse bias, is in the same direction as the
electric field of the potential barrier.

Hence the resultant potential barrier is increased which prevents the flow of majority
carriers in both directions. The depletion width W is proportional to under reverse bias.
V-I characteristics

Theoretically no current flow in the external circuit. But in practice a very small amount
of current of the order of few microamperes flows under reverse bias.
 Electrons forming covalent bonds of semiconductor atoms in the P and N type regions
may absorb sufficient energy from heat and light to cause breaking covalent bonds. So electron
hole pairs continuously produced.

Consequently the minority carriers electrons in the P region and holes in the N region,
wander over to the junction and flow towards their majority carrier side giving rise a small
reverse current. This current is known as reverse saturation current Io.

The magnitude of this current is depends on the temperature because minority carrier is
thermally broken covalent bonds.

APPLICATION OF PN DIODE

Can be used as rectifier in DC Power

Supplies. In Demodulation or Detector
Circuits.
In clamping networks used as DC Restorers
In clipping circuits used for waveform
generation. As switches in digital logic circuits.
In demodulation circuits

VARACTOR DIODE

A varactor diode is best explained as a variable capacitor. Think of the depletion region as a
variable dielectric. The diode is placed in reverse bias. The dielectric is ―adjusted‖ by
reverse bias voltage changes.

• Junction capacitance is present in all reverse biased diodes because of the depletion region.

• Junction capacitance is optimized in a varactor diode and is used for high frequencies and
switching applications.

• Varactor diodes are often used for electronic tuning applications in FM radios and televisions.
 • They are also called voltage-variable capacitance diodes.

A Junction diode which acts as a variable capacitor under changing reverse bias is known
as VARACTOR DIODE

A varactor diode is specially constructed to have high resistance under reverse bias.
Capacitance for varactor diode are Pico farad. (10-12 )

range CT = ЄA / Wd

CT =Total Capacitance of the junction

 Є = Permittivity of the semiconductor material
A = Cross sectional area of the junction
WD= Width of the depletion layer

Curve between Reverse bias voltage Vr across varactor diode and total junction capacitance Ct
and Ct can be changed by changing Vr.

Zener diode

A Zener diode is a type of diode that permits current not only in the forward direction
like a normal diode, but also in the reverse direction if the voltage is larger than the breakdown
voltage known as "Zener knee voltage" or "Zener voltage". The device was named after Clarence
Zener, who discovered this electrical property.

Diode symbol

However, the Zener Diode or "Breakdown Diode" as they are sometimes called, are
basically the same as the standard PN junction diode but are specially designed to have a low
pre-determined Reverse Breakdown Voltage that takes advantage of this high reverse voltage.
The point at which a zener diode breaks down or conducts is called the "Zener Voltage" (Vz).

The Zener diode is like a general-purpose signal diode consisting of a silicon PN

junction. When biased in the forward direction it behaves just like a normal signal diode passing
the rated current, but when a reverse voltage is applied to it the reverse saturation current
remains fairly constant over a wide range of voltages. The reverse voltage increases until the
diodes breakdown voltage VB is reached at which point a process called Avalanche Breakdown
occurs in the depletion layer and the current flowing through the zener diode increases
dramatically to the maximum circuit value (which is usually limited by a series resistor). This
breakdown voltage point is called the "zener voltage" for zener diodes.

The point at which current flows can be very accurately controlled (to less than 1%
tolerance) in the doping stage of the diodes construction giving the diode a specific zener
breakdown voltage, (Vz) ranging from a few volts up to a few hundred volts. This zener
breakdown voltage on the I-V curve is almost a vertical straight line.

Zener diode characteristics

The Zener Diode is used in its "reverse bias" or reverse breakdown mode, i.e. the diodes
anode connects to the negative supply. From the I-V characteristics curve above, we can see that
the zener diode has a region in its reverse bias characteristics of almost a constant negative
voltage regardless of the value of the current flowing through the diode and remains nearly
constant even with large changes in current as long as the zener diodes current remains between
 the breakdown current IZ(min) and the maximum current rating IZ(max).

Diode Clippers and Clampers

Clippers are known as Limiters and Clampers are known as DC Restorers. This tutorial gives an in-depth information
about Diode Clippers and Clampers.

Diode Clippers

Most of the electronic circuits like amplifiers, modulators and many others have a particular range of voltages at which

they have to accept the input signals. Any of the signals that have an amplitude greater than this particular range may

cause distortions in the output of the electronic circuits and may even lead to damage of the circuit components.

As most of the electronic devices work on a single positive supply, the input voltage range would also be on the

positive side. Since the natural signals like audio signals, sinusoidal waveforms and many others contain both positive

and negative cycles with varying amplitude in their duration.

These waveforms and other signals have to be modified in such a way that the single supply electronic circuits can be

able to operate on them.

 The clipping of a waveform is the most common technique that applies to the input signals to adapt them so that they

may lie within the operating range of the electronic circuits. The clipping of waveforms can be done by eliminating the

portions of the waveform which crosses the input range of the circuit.

Clippers can be broadly classified into two basic types of circuits. They are:

 Series Clippers

 Shunt or Parallel Clippers

Series clipper circuit contains a power diode in series with the load connected at the end of the circuit. The shunt

clipper contains a diode in parallel with the resistive load.

The half – wave rectifier circuit is similar to a series clipper circuit. If the diode in a series clipper circuit is in forward

bias condition, then the output waveform at the load follows the input waveform. When the diode is in reverse bias and

it is unable to conduct current, the output of the circuit is nearly zero volts.

The direction in which the diode is connected determines the polarity of the clipped output waveform. In case of Series

Clipper Circuits, if the diode is reverse biased i.e., Cathode is connected to the positive terminal of the supply and
Anode to the load, the circuit will be a Positive Series Clipper, as it clips off the positive half cycle of the input

sinusoidal waveform.

If the diode is forward biased i.e., Anode is connected to positive of power supply and Cathode to load, then the circuit

will be a Negative Series Clipper, as it clips off the negative half cycle of the input sinusoidal waveform.

The series clipper diode has an output voltage of VOUT = VIN, when the diode is conducting and when it is not

conducting, the input voltage applied by the supply will be dropped and has an output voltage of VOUT = 0 V.

In contrast to the Series Clipper Circuit, a Parallel Clipper circuit provides the output when the diode is connected in

reverse bias and when it is not conducting. When the diode is non–conducting, the shunt combination diode acts as an

open circuit and both the series resistor and load resistor acts as a voltage divider. The output voltage will be calculated

as:

VOUT = VIN [RLOAD / (RLOAD + RSERIES)]

When the diode is conducting, it acts as a short circuit and the output voltage across the load will be V OUT = 0 V. The

series limiting resistor is connected in series with the supply to prevent the diode from short circuits.

In this case, the output voltage of the circuit should be ±0.7 volts. It depends on the polarity of the shunt clipper which

is determined by the direction of diode connection.

 Above circuit is a shunt clipper circuit which uses the DC supply voltage to bias the diode. It is the biasing voltage at

which the diode starts conducting. The diode in the shunt clipper circuit starts to conduct when it reaches the biasing

voltage.

Clipper circuits are used in a variety of systems to perform one of the two functions:

1. Altering the waveform shapes

2. Protecting the circuits from transients

The first application is commonly noticed in the operation of half-wave rectifiers that changes an alternating voltage

into an output pulsating DC waveform. A transient is defined as an abrupt change in current or voltage with extremely

short duration. Clipper circuits can be used to protect the sensitive circuits from transient effects.
 Types of Clipper Circuits

Series Negative Clipper

This is the basic clipper circuit using a diode and it nothing but a Half Wave Rectifier. From the following circuit, it is

clear that the diode is forward biased during the positive cycle and it acts as a closed switch. Hence, the output voltage

is equal to the positive half of the input voltage.

During the negative cycle, the diode is reverse biased and acts as an open switch. As a result, the output voltage is zero.

 Output voltage (VOUT) during Positive Half Cycle = (VIN – VD) Volts

 Output voltage (VOUT) during Negative Half Cycle = 0 Volts

where, VD is the Threshold Voltage of the Diode. If the diode is ideal, then VD = 0 V.

Series Positive Clipper

Simply by reversing the diode, we can obtain a positive clipper configuration as show in the following circuit.
 Cathode is connected to the positive of the power supply and anode is connected to the load, which makes diode reverse

biased for positive cycle and forward biased for negative cycle.

 During Positive Half Cycle: Output voltage (VOUT) = 0 V

 During Negative Half Cycle: Output voltage (VOUT) = (VIN + VD) Volts

Where, VD is the Diode Threshold Voltage.

Shunt Positive Clipper

 Anode is connected to the the power supply through a resistor R and the cathode is at ground potential.

 During Positive Half Cycle: Output voltage (VO) = Vd Volts

 During Negative Half Cycle: Output voltage (VO) = Vin Volts

Shunt Negative Clipper

Cathode is connected to the power supply through a resistor R and anode is maintained at ground potential.

 During Positive Half Cycle: Output voltage (VO) = Vin Volts

 During Negative Half Cycle: Output voltage (VO) = – Vd Volts

Diode Clampers

Clampers can also be referred as DC restorers. Clamping circuits are designed to shift the input waveform either above
or below a DC reference level without altering the shape of the waveform. This shifting of the waveform results in a
change in the DC average voltage of the input waveform. The levels of peaks in the signal can be shifted using the
clamper circuit, hence clampers can also be referred as level shifters.

Clampers can be broadly classified into two types. They are:

 Positive Clampers
 Negative Clampers
Positive Clamper: This type of clamping circuit shifts the input waveform in a positive direction, as a result the
waveform lies above a DC reference voltage.

Negative Clamper: This type of clamping circuit shifts the input waveform in a negative direction, as a result the
waveform lies below a DC reference voltage.
 BIPOLAR JUNCTION TRANSISTORS

TRANSISTOR CHARACTERISTICS:

The basic of electronic system nowadays is semiconductor device.

The famous and commonly use of this device is BJTs

The transistor formed by back to back connection of two diodes.

Bipolar Junction Transistors : The operation of the transistor depends on both majority
and minority carriers.

The voltage between two terminals controls the current through the third terminal. So it is
called current controlled device.

It can be use as amplifier and logic switches.

BJT consists of three terminal:

 collector : C
 base : B
 emitter : E

Two types of BJT : pnp and npn

Transistor Construction

 3 layer semiconductor device consisting:

 2 n- and 1 p-type layers of material - npn transistor
 2 p- and 1 n-type layers of material - pnp transistor
The term bipolar reflects the fact that holes and electrons participate in the injection
process into the oppositely polarized material
A single pn junction has two different types of bias:
 forward bias
 reverse bias
Thus, a two-pn-junction device has four types of bias.

Position of the terminals and symbol of BJT.

Base is located at the middle and more thin from the level of collector and emitter
The emitter and collector terminals are made of the same type of semiconductor material,
while the base of the other type of material
Transistor currents

- The arrow is always drawn on the emitter The arrow always point toward the n-type

- The arrow indicates the direction of the emitter current:

pnp:E-> B

npn: B-> E

IC = the collector current

IB = the base current

IE = the emitter current

Transistor Operation

• The basic operation will be described using the pnp transistor. The operation of the pnp
transistor is exactly the same if the roles played by the electron and hole are interchanged.

• One p-n junction of a transistor is reverse-biased, whereas the other is forward-biased

• Both biasing potentials have been applied to a pnp transistor and resulting majority

and minority carrier flows indicated.

• Majority carriers (+) will diffuse across the forward-biased p-n junction into the n-type

material.
• A very small number of carriers (+) will through n-type material to the base

terminal. Resulting IB is typically in order of microamperes.

• The large number of majority carriers will diffuse across the reverse-biased junction

into the p-type material connected to the collector terminal.

• Majority carriers can cross the reverse-biased junction because the injected majority

carriers will appear as minority carriers in the n-type material.

• Applying KCL to the transistor :

IE = IC + IB

• The comprises of two components – the majority and minority

carriers IC = ICmajority +ICOminority

• ICO – IC current with emitter terminal open and is called leakage current.

CURRENT EUATIONS

let‘s consider the BJT npn structure shown on Figure.

With the voltage VBE and VCB as shown, the Base-Emitter (B-E) junction is forward biased and
the Base Collector (B-C) junction is reverse biased.

The current through the B-E junction is related to the B-E voltage as

Due to the large differences in the doping concentrations of the emitter and the base regions the
electrons injected into the base region (from the emitter region) results in the emitter current EI.
 Furthermore the number of electrons injected into the collector region is directly related to the
electrons injected into the base region from the emitter region.

Therefore, the collector current is related to the emitter current which is in turn a function of the
B-E voltage.

The collector current and the base current are related

by Ic = βIB

And by applying KCL we obtain

IE = Ic + IB

And thus from equations the relationship between the emitter and the base currents is

IE = (1+β)IB

And equivalently

Ic = (β / 1+β)IE
The fraction (β / 1+β) is called
α,

For the transistors of interest β=100 which corresponds to α= 0.99 and Ic = IB

The direction of the currents and the voltage polarities for the npn and the pnp BJTs are shown in
fig.
 (5)

(6)
CB CONFIGURATION

In common base configuration circuit is shown in figure. Here base is grounded and it is
used as the common terminal for both input and output. It is also called as grounded base
configuration. Emitter is used as a input terminal where as collector is the output terminal.

Input Characteristics

It is defined as the characteristic curve drawn between input voltage to input current whereas
output voltage is constant.

To determine input characteristics, the collector base voltage VCB is kept constant at zero and
emitter current IE is increased from zero by increasing VEB.
This is repeated for higher fixed values of VCB.

A curve is drawn between emitter current and emitter base voltage at constant collector base
voltage is shown in figure.

When VCB is zero EB junction is forward biased. So it behaves as a diode so that emitter current
increases rapidly.

Output Characteristics

It is defined as the characteristic curve drawn between output voltage to output current whereas
input current is constant.

To determine output characteristics, the emitter current IE is kept constant at zero and collector
current Ic is increased from zero by increasing VCB.

This is repeated for higher fixed values of IE.

From the characteristic it is seen that for a constant value of IE, Ic is independent of VCB and the
curves are parallel to the axis of VCB.

As the emitter base junction is forward biased the majority carriers that is electrons from the
emitter region are injected into the base region.
 In CB configuration a variation of the base-collector voltage results in a variation of the quasi-
neutral width in the base. The gradient of the minority-carrier density in the base therefore
changes, yielding an increased collector current as the collector-base current is increased. This
effect is referred to as the Early effect.

Transistor parameters in CB configuration

The slope of CB characteristics will give the following four transistor parameters. It is known as
base hybrid parameters.
I.
Input impedance (hib): It is defined as the ratio of change in input voltage (emitter
voltage) to change in input current (emitter current) with the output voltage (collector
voltage) is kept constant.

This ranges from 20ohms to 50ohms.

II.
Output admittance (hob): It is defined as the ratio of change in output current (collector
current) to change in output voltage (collector voltage) with the input current (emitter
current) is kept constant.
 This ranges from 0.1 to 10µ mhos.

III.
Forward current gain (hfb): It is defined as the ratio of change in output current (collector
current) to change in input current (emitter current) with the output voltage (collector
voltage) is kept constant.

This ranges from 0.9 to 1.0.

IV.
Reverse voltage gain (hrb): It is defined as the ratio of change in input voltage (emitter
voltage) to change in output voltage (collector voltage) with the input current (emitter
current) is kept constant.

This ranges from 10-5 to 10-4.

CE CONFIGURATION

In common emitter configuration circuit is shown in figure. Here emitter is grounded and
it is used as the common terminal for both input and output. It is also called as grounded emitter
configuration. Base is used as a input terminal whereas collector is the output terminal.
Input Characteristics

It is defined as the characteristic curve drawn between input voltage to input current whereas
output voltage is constant.

To determine input characteristics, the collector base voltage VCB is kept constant at zero and
base current IB is increased from zero by increasing VBE.

This is repeated for higher fixed values of VCE.

A curve is drawn between base current and base emitter voltage at constant collector base
voltage is shown in figure.

Here the base width decreases. So curve moves right as VCE increases.

Output Characteristics

It is defined as the characteristic curve drawn between output voltage to output current whereas
input current is constant.

To determine output characteristics, the base current IB is kept constant at zero and collector
current Ic is increased from zero by increasing VCE.

This is repeated for higher fixed values of IB..

From the characteristic it is seen that for a constant value of IB, Ic is independent of VCB and the
curves are parallel to the axis of VCE.

The output characteristic has 3 basic regions:

- Active region –defined by the biasing arrangements

- Cutoff region – region where the collector current is 0A

- Saturation region- region of the characteristics to the left of VCB = 0V

Transistor parameters in CE configuration

The slope of CE characteristics will give the following four transistor parameters. It is known as
emitter hybrid parameters.
I.
Input impedance (hie): It is defined as the ratio of change in input voltage (base voltage)
to change in input current (base current) with the output voltage (collector voltage) is
kept constant.

This ranges from 500ohms to 2000ohms.

II.
Output admittance (hoe): It is defined as the ratio of change in output current (collector
current) to change in output voltage (collector voltage) with the input current (base
current) is kept constant.

This ranges from 0.1 to 10µ mhos.

III.
Forward current gain (hfe): It is defined as the ratio of change in output current (collector
current) to change in input current (base current) with the output voltage (collector
voltage) is kept constant.

This ranges from 20 to 200.

IV.
Reverse voltage gain (hre): It is defined as the ratio of change in input voltage (base
voltage) to change in output voltage (collector voltage) with the input current (base
current) is kept constant.

This ranges from 10-5 to 10-4.

CC CONFIGURATION

In common collector configuration circuit is shown in figure. Here collector is grounded and it is
used as the common terminal for both input and output. It is also called as grounded collector
configuration. Base is used as a input terminal whereas emitter is the output terminal.

Input Characteristics

It is defined as the characteristic curve drawn between input voltage to input current whereas
output voltage is constant.
To determine input characteristics, the emitter base voltage VEB is kept constant at zero and base
current IB is increased from zero by increasing VBC.

This is repeated for higher fixed values of VCE.

A curve is drawn between base current and base emitter voltage at constant collector base
voltage is shown in above figure.

Output Characteristics

It is defined as the characteristic curve drawn between output voltage to output current whereas
input current is constant.

To determine output characteristics, the base current IB is kept constant at zero and emitter
current IE is increased from zero by increasing VEC.

This is repeated for higher fixed values of IB.

From the characteristic it is seen that for a constant value of IB, IE is independent of VEB and the
curves are parallel to the axis of VEC.

Transistor parameters in CC configuration

The slope of CC characteristics will give the following four transistor parameters. It is known as
base hybrid parameters.
 I.
Input impedance (hic): It is defined as the ratio of change in input voltage (base voltage)
to change in input current (base current) with the output voltage (emitter voltage) is kept
constant.

II.
Output admittance (hoc): It is defined as the ratio of change in output current (emitter
current) to change in output voltage (emitter voltage) with the input current (base current)
is kept constant.

III.
Forward current gain (hfc): It is defined as the ratio of change in output current (emitter
current) to change in input current (base current) with the output voltage (emitter voltage)
is kept constant.

IV.
Reverse voltage gain (hrc): It is defined as the ratio of change in input voltage (base
voltage) to change in output voltage (emitter voltage) with the input current (base
current) is kept constant.

A comparison of CB, CE and CC Configurations

 FIELD EFFECT TRANSISTORS

Field effect devices are those in which current is controlled by the action of an electron field,
rather than carrier injection.

Field-effect transistors are so named because a weak electrical signal coming in through one
electrode creates an electrical field through the rest of the transistor.

The FET was known as a ―unipolar‖ transistor because the function depends only on
minority carriers.

The term refers to the fact that current is transported by carriers of one polarity (majority),
whereas in the conventional bipolar transistor carriers of both polarities (majority and minority)
are involved.

The family of FET devices may be divided into :

• Junction FET

• Depletion Mode MOSFET

Enhancement Mode MOSFET

Junction FETs (JFETs)

JFETs consists of a piece of high-resistivity semiconductor material (usually Si) which

constitutes a channel for the majority carrier flow.

Conducting semiconductor channel between two ohmic contacts – source & drain.

JFET is a high-input resistance device, while the BJT is comparatively low.

If the channel is doped with a donor impurity, n-type material is formed and the channel current
will consist of electrons.

If the channel is doped with an acceptor impurity, p-type material will be formed and the channel
current will consist of holes.

N-channel devices have greater conductivity than p-channel types, since electrons have higher
mobility than do holes; thus n-channel JFETs are approximately twice as efficient conductors
compared to their p-channel counterparts.

The magnitude of this current is controlled by a voltage applied to a gate, which is a reverse-
biased.

The fundamental difference between JFET and BJT devices: when the JFET junction is reverse-
biased the gate current is practically zero, whereas the base current of the BJT is always some
value greater than zero.

Basic structure of JFETs

• In addition to the channel, a JFET contains two ohmic contacts: the source and the drain.

• The JFET will conduct current equally well in either direction and the source and drain leads
are usually interchangeable. N-channel JFET

• This transistor is made by forming a channel of N-type material in a P-type substrate.

• Three wires are then connected to the device.

• One at each end of the channel.

• One connected to the substrate.

In a sense, the device is a bit like a PN-junction diode, except that there are two wires connected
to the N-type side

• The gate is connected to the source.

• Since the pn junction is reverse-biased, little current will flow in the gate connection.

• The potential gradient established will form a depletion layer, where almost all the electrons
present in the n-type channel will be swept away. The most depleted portion is in the high field
between the G and the D, and the least-depleted area is between the G and the S.

• Because the flow of current along the channel from the (+ve) drain to the (-ve) source is really
a flow of free electrons from S to D in the n-type Si, the magnitude of this current will fall as
more Si becomes depleted of free electrons.

• There is a limit to the drain current (ID) which increased VDS can drive through the channel.

• This limiting current is known as IDSS (Drain-to-Source current with the gate shorted to the
source).

• The output characteristics of an n-channel JFET with the gate short-circuited to the source.

• The initial rise in ID is related to the buildup of the depletion layer as VDS increases.

• The curve approaches the level of the limiting current IDSS when ID begins to be pinched off.

• The physical meaning of this term leads to one definition of pinch-off voltage, VP , which is
the value of VDS at which the maximum IDSS flows.
• With a steady gate-source voltage of 1 V there is always 1 V across the wall of the channel at
the source end.

• A drain-source voltage of 1 V means that there will be 2 V across the wall at the drain end.
(The drain is ‗up‘ 1V from the source potential and the gate is 1V ‗down‘, hence the total
difference is 2V.)

• The higher voltage difference at the drain end means that the electron channel is squeezed
down a bit more at this end.

• When the drain-source voltage is increased to 10V the voltage across the channel walls at the
drain end increases to 11V, but remains just 1V at the source end.

• The field across the walls near the drain end is now a lot larger than at the source end.

• As a result the channel near the drain is squeezed down quite a lot.

• Increasing the source-drain voltage to 20V squeezes down this end of the channel still
more.

• As we increase this voltage we increase the electric field which drives electrons along
the open part of the channel.

• However, also squeezes down the channel near the drain end.

• This reduction in the open channel width makes it harder for electrons to pass.

• As a result the drain-source current tends to remain constant when we increase the drain source
voltage.
• Increasing VDS increases the widths of depletion layers, which penetrate more into channel
and hence result in more channel narrowing toward the drain.

• The resistance of the n-channel, RAB therefore increases with VDS.

• The drain current: IDS = VDS/RAB

• ID versus VDS exhibits a sub linear behavior, see figure for VDS < 5V.

• The pinch-off voltage, VP is the magnitude of reverse bias needed across the p+n junction to
make them just touch at the drain end.

• Since actual bias voltage across p+n junction at drain end is VGD, the pinch-off occur
whenever: VGD = -VP.

JFET: I-V characteristics

MOSFETs and Their Characteristics

The metal-oxide semiconductor field effect transistor has a gate, source, and drain just like the
JFET.

The drain current in a MOSFET is controlled by the gate-source voltage VGS.

There are two basic types of MOSFETS: the enhancement-type and the depletion-type.

The enhancement-type MOSFET is usually referred to as an E-MOSFET, and the depletion

type, a D-MOSFET.

The MOSFET is also referred to as an IGFET because the gate is insulated from the channel

DEPLETION-TYPE MOSFET

MOSFETs are further broken down into depletion type and enhancement type. The terms
depletion and enhancement define their basic mode of operation, while the label MOSFET stands
for metal-oxide-semiconductor-field-effect transistor.

Basic Construction

The basic construction of the n-channel depletion-type MOSFET is provided in Fig. A

slab of p-type material is formed from a silicon base and is referred to as the substrate. It is the
foundation upon which the device will be constructed. In some cases the substrate is internally
 connected to the source terminal. However, many discrete devices provide an additional terminal
labeled SS, resulting in a four-terminal device, such as that appearing in Fig. 1

The source and drain terminals are connected through metallic contacts to n-doped
regions linked by an n-channel as shown in the figure. The gate is also connected to a metal
contact surface but remains insulated from the n-channel by a very thin silicon dioxide (SiO 2)
layer.

SiO2 is a particular type of insulator referred to as a dielectric that sets up opposing (as
revealed by the prefix di-) electric fields within the dielectric when exposed to an externally
applied field.

Fig. 1 n – channel depletion type MOSFET

There is no direct electrical connection between the gate terminal and the channel of a MOSFET.

It is the insulating layer of SiO2 in the MOSFET construction that accounts for the very desirable
high input impedance of the device.

Basic Operation and Characteristics

In Fig. 2 the gate-to-source voltage is set to zero volts by the direct connection from one
terminal to the other, and a voltage VDS is applied across the drain-to-source terminals.

The result is an attraction for the positive potential at the drain by the free electrons of
the n-channel and a current similar to that established through the channel of the JFET. In fact,
the resulting current with VGS = 0 V continues to be labeled IDSS, as shown in Fig. 3.
Fig 2. n – channel depletion type MOSFET with VGS = 0 V

Fig 3. Drain and transfer characteristics

 Fig.4 Reduction in free carriers in channel due to –ve potential

In Fig. 4, VGS has been set at a negative voltage such as -1 V. The negative potential at
the gate will tend to pressure electrons toward the p-type substrate (like charges repel) and attract
holes from the p-type substrate (opposite charges attract) as shown in Fig. 4. Depending on the
magnitude of the negative bias established by V GS, a level of recombination between electrons
and holes will occur that will reduce the number of free electrons in the n-channel available for
conduction. The more negative the bias, the higher the rate of recombination.

For positive values of VGS, the positive gate will draw additional electrons (free carriers)
from the p-type substrate due to the reverse leakage current and establish new carriers through
the collisions resulting between accelerating particles. As the gate-to-source voltage continues to
increase in the positive direction, Fig. 3 reveals that the drain current will increase at a rapid rate.

ENHANCEMENT-TYPE MOSFET

Basic Construction

The basic construction of the n-channel enhancement-type MOSFET is provided in Fig.1.

A slab of p-type material is formed from a silicon base and is again referred to as the substrate.
As with the depletion-type MOSFET, the substrate is sometimes internally connected to the
source terminal, while in other cases a fourth lead is made available for external control of its
potential level.
 The SiO2 layer is still present to isolate the gate metallic platform from the region
between the drain and source, but now it is simply separated from a section of the p-type
material. In summary, therefore, the construction of an enhancement-type MOSFET is quite
similar to that of the depletion-type MOSFET, except for the absence of a channel between the
drain and source terminals.

Fig 1. N channel enhancement type MOSFET

Basic Operation and Characteristics

If VGS is set at 0 V and a voltage applied between the drain and source of the device of
Fig. 1, the absence of an n-channel (with its generous number of free carriers) will result in a
current of effectively zero amperes—quite different from the depletion- type MOSFET and JFET
where ID - IDSS.

It is not sufficient to have a large accumulation of carriers (electrons) at the drain and
source (due to the n-doped regions) if a path fails to exist between the two. With VDS some
positive voltage, VGS at 0 V, and terminal SS directly connected to the source, there are in fact
two reverse-biased p-n junctions between the n-doped regions and the p-substrate to oppose any
significant flow between drain and source.

In Fig. 2 both VDS and VGS have been set at some positive voltage greater than 0 V,
establishing the drain and gate at a positive potential with respect to the source. The positive
potential at the gate will pressure the holes (since like charges repel) in the p-substrate along the
edge of the SiO2 layer to leave the area and enter deeper regions of the p-substrate, as shown in
the figure.
Fig 2. Channel formation

As VGS is increased beyond the threshold level, the density of free carriers in the induced
channel will increase, resulting in an increased level of drain current. However, if we hold VGS
constant and increase the level of VDS, the drain current will eventually reach a saturation level
as occurred for the JFET and depletion-type MOSFET.

The leveling off of ID is due to a pinching-off process depicted by the narrower channel at
the drain end of the induced channel as shown in Fig. 3. Applying Kirchhoff‘s voltage law to the
terminal voltages of the MOSFET of Fig. 3, we find that

VDG = VDS - VGS

The drain characteristics of Fig. 5.34 reveal that for the device of Fig 3 with VGS = 8 V,
saturation occurred at a level of VDS = 6 V. In fact, the saturation level for VDS is related to the
level of applied VGS by
VDSsat = VGS - VT
Fig 3. Change in channel and depletion region with increasing VDS

Fig 4. Drain characteristics

For levels of VGS > VT, the drain current is related to the applied gate-to-source voltage by the
following nonlinear relationship:
ID = k(VGS - VT)2
Again, it is the squared term that results in the nonlinear (curved) relationship between ID and
VGS. The k term is a constant that is a function of the construction of the device. The value of k
can be determined from the following equation where ID(on) and VGS(on) are the values for
each at a particular point on the characteristics of the device.

FINFET:

The distinguishing characteristic of the FinFET is that the conducting channel is wrapped by a
thin silicon "fin", which forms the body of the device. The thickness of the fin (measured in the
direction from source to drain) determines the effective channel length of the device. In current
usage the term FinFET has a less precise definition.

Among microprocessor manufacturers, AMD, IBM, and Motorola describe their double-gate
development efforts as FinFET] development whereas Intel avoids using the term to describe
their closely related tri-gate architecture. In the technical literature, FinFET is used somewhat
generically to describe any fin- based, multigate transistor architecture regardless of number of
gates.

A 25-nm transistor operating on just 0.7 volt was demonstrated in December 2002 by Taiwan
Semiconductor Manufacturing Company. The "Omega FinFET" design is named after the
similarity between the Greek letter omega (Ω) and the shape in which the gate wraps around the
source/drain structure. It has a gate delay of just 0.39 picosecond (ps) for the N-type transistor
and 0.88 ps for the P-type.

FinFET can also have two electrically independent gates, which gives circuit designers more
flexibility to design with efficient, low-power gates.[12]
Uni Junction Transistor (UJT)

A unijunction transistor (UJT) is an electronic semiconductor device that has only one junction.

The UJT has three terminals: an emitter (E) and two bases (B1 and B2).

The base is formed by lightly doped n-type bar of silicon. Two ohmic contacts B1 and B2 are
attached at its ends. The emitter is of p-type and it is heavily doped. The resistance between B1
and B2, when the emitter is open-circuit is called interbase resistance.

Since the device has one pn junction and three leads it is commonly called UJT.

Operation
The device has normally B2 is positive w.r.t B1.

(i)
If voltage VBB is applied between B2 and B1 with emitter open (fig. i) a voltage gradient is
established along the n type bar. The voltage V1 between emitter and B1 establishes a reverse
bias of pn junction and the emitter current is cut off. Small leakage current flows from B2 to
emitter.
(ii)
If a positive voltage is applied at E (fig. ii) the pn junction remains reverse biased as long as
the input is less than V1. The voltage exceeds V1 the pn junction become forward biased. Here
holes are injected from p type towards B1. The device is ON state.
(iii)
If a negative pulse is applied to E, the pn junction is reverse biased and the emitter current is
cut off. The device is OFF state.

Characteristics

Initially in the cut off region, as VE increases from zero, slight leakage current flows from
terminalB2 to the emitter.

Above a certain value of VE forward IE begins to flow, increasing until the peak voltage Vp and
current Ip are reached at point P.

After the peak point P an attempt to increase V E is followed by a sudden increase in emitter
current IE with a corresponding decrease in VE. This is a negative resistance portion of the curve
because in IE, VE decreases.

Applications

In switching circuits, Pulse generator and Saw-tooth generator.

For the operation of most of the electronics devices and circuits, a d.c. source is required. So it is
advantageous to convert domestic a.c. supply into d.c.voltages. The process of converting a.c. voltage
into d.c. voltage is called as rectification. This is achieved with i) Step-down Transformer, ii)
Rectifier,
iii) Filter and iv) Voltage regulator circuits.
These elements constitute d.c. regulated power supply shown in the fig 1 below.

Fig 2.1: Block Diagram of regulated D.C Power Supply

 Transformer – steps down 230V AC mains to low voltage AC.

 Rectifier – converts AC to DC, but the DC output is varying.
 Smoothing – smooth the DC from varying greatly to a small ripple.
 Regulator – eliminates ripple by setting DC output to a fixed voltage.

The block diagram of a regulated D.C. power supply consists of step-down transformer, rectifier,
filter, voltage regulator and load. An ideal regulated power supply is an electronics circuit designed to
provide a predetermined d.c. voltage Vo which is independent of the load current and variations in the
input voltage ad temperature. If the output of a regulator circuit is a AC voltage then it is termed as
voltage stabilizer, whereas if the output is a DC voltage then it is termed as voltage regulator.
2.1 RECTIFIER
Any electrical device which offers a low resistance to the current in one direction but a high resistance to
the current in the opposite direction is called rectifier. Such a device is capable of converting a
sinusoidal input waveform, whose average value is zero, into a unidirectional Waveform, with a non-
zero average component. A rectifier is a device, which converts a.c. voltage (bi-directional) to pulsating
 d.c. voltage (Unidirectional).
Characteristics of a Rectifier Circuit:
Any electrical device which offers a low resistance to the current in one direction but a high resistance to
the current in the opposite direction is called rectifier. Such a device is capable of converting a
sinusoidal input waveform, whose average value is zero, into a unidirectional waveform, with a non-
zero average component.
A rectifier is a device, which converts a.c. voltage (bi-directional) to pulsating d.c..Load currents: They
are two types of output current. They are average or d.c. current and RMS currents.
Average or DC current: The average current of a periodic function is defined as the area of one cycle of
the curve divided by the base.
It is expressed mathematically as
Area over one
i) Average value/dc value/mean value=
period Total time
period

T
Vdc = 1 ò Vd
T0

ii) Effective (or) R.M.S current:

The effective (or) R.M.S. current squared ofa periodic function of time is given by the area of one cycle
of the curve, which represents the square of the function divided by the base.

T
Vrms 1 2

T
òV
(wt)0
d

iii) Peak factor:

It is the ratio of peak value to Rms value

peakvalue
Peak factor =
rmsvalue
iv) Form factor:

It is the ratio of Rms value to average value

Rmsvalue
Form factor=
averagevalue

v) Ripple Factor ( G ) :
It is defined as ration of R.M.S. value of a.c. component to the d.c. component in the output is known
as “Ripple Factor”.
V
G =V ac
dc

V -V 2
rms
2
dc

vi) E
f
f
i
c
i
e
n
c
y

(
h

)
:
It is the ratio of d.c output power to the a.c. input power. It signifies, how efficiently the rectifier circuit
converts a.c. power into d.c. power.

o/p
h = i / p power
power

vii) Peak Inverse Voltage (PIV):

It is defined as the maximum reverse voltage that a diode can withstand without destroying the
junction.
viii) Transformer Utilization Factor (UTF):

The d.c. power to be delivered to the load in a rectifier circuit decides the rating of the
Transformer used in the circuit. So, transformer utilization factor is defined as

Pdc
TUF
= pac(rated)
ix) % Regulation:

The variation of the d.c. output voltage as a function of d.c. load current is called regulation. The
percentage regulation is defined as

VNL - VFL
% Re gulation =
*100
VFL

For an ideal power supply, % Regulation is zero.

2.2 CLASSIFICATION OF RECTIFIERS

Using one or more diodes in the circuit, following rectifier circuits can be designed.
1) Half - Wave Rectifier
2) Full – Wave Rectifier
3) Bridge Rectifier
2.2.1 HALF-WAVE RECTIFIER:
A Half – wave rectifier as shown in fig 1.2 is one, which converts a.c. voltage into a pulsating voltage
using only one half cycle of the applied a.c. voltage.

Fig 1.2: Basic structure of Half-Wave Rectifier

The a.c. voltage is applied to the rectifier circuit using step-down transformer-rectifying element i.e., p-
n junction diode and the source of a.c. voltage, all connected is series. The a.c. voltage is applied to the
rectifier circuit using step-down transformer
 V=Vm sin (wt)
The input to the rectifier circuit, Where Vm is the peak value of secondary a.c. voltage.

Operation:
For the positive half-cycle of input a.c. voltage, the diode D is forward biased and hence it conducts.
Now a current flows in the circuit and there is a voltage drop across RL. The waveform of the diode
current (or) load current is shown in fig 3.
For the negative half-cycle of input, the diode D is reverse biased and hence it does not
Conduct. Now no current flows in the circuit i.e., i=0 and Vo=0. Thus for the negative half- cycle no
power is delivered to the load.

Analysis:

In the analysis of a HWR, the following parameters are to be analyzed.

1. DC output current
2. DC Output voltage
3. R.M.S. Current
4. R.M.S. voltage
5. Rectifier Efficiency (η )
6. Ripple factor (γ )
 7. Peak Factor
8. % Regulation
9. Transformer Utilization Factor (TUF)
10. form factor
11. o/p frequency

Let a sinusoidal voltage Vi be applied to the input of the rectifier.

Then V=Vm sin (wt) Where Vm is the maximum value of the secondary voltage. Let the diode be
idealized to piece-wise linear approximation with resistance Rf in the forward direction i.e., in the ON
state and Rr (=∞) in the reverse direction i.e., in the OFF state. Now the current ‘i’ in the diode (or) in
the load resistance RL is given by V=Vm sin (wt)

i) AVERAGE VOLTAGE

T
1
Vdc = T Vd (wt)
ò 0

2P
1
Vdc =
T ò
0
V (a )da
1 2P
Vdc =
2P òV (a )da
P

Vdc = 1
sin(wt)
V ò m
2P 0

Vdc V
= Pm

ii).AVERAGE
CURRENT:

I = Im
P
d
c
iii) RMS VOLTAGE:

T
Vrms = 1
T òV
0
2
d
(wt)
2P
1
Vrms =
2P
ò(V m sim(wt)) 2 d (wt)
0

Vrms =
Vm
2

IV) RMS CURRENT

I rms =
Im P
V) PEAK FACTOR

Peak factor = peak value/rms value

vi) FORM FACTOR

Form factor= (V / 2)
m
Vm / P

Form Factor =1.57

vii) Ripple Factor:
-V
V 2
G= V -1 rms

Vdc2

G =1.21

viii) Efficiency (h ):

o / ppower
h = i / ppower *100
pac
h= *100
Pdc

h =40.8

ix) Transformer Utilization Factor (TUF):

The d.c. power to be delivered to the load in a rectifier circuit decides the rating of the transformer
used in the circuit. Therefore, transformer utilization factor is defined as

TUF = p
d
c
TUF =0.286. P
a
c
(
r
a
t
e
d
)

The value of TUF is low which shows that in half-wave circuit, the transformer is not fully
utilized. If the transformer rating is 1 KVA (1000VA) then the half-wave rectifier can deliver
1000 X 0.287 = 287 watts to resistance load.
 x) Peak Inverse Voltage (PIV):

It is defined as the maximum reverse voltage that a diode can withstand without destroying the junction.
The peak inverse voltage across a diode is the peak of the negative half- cycle. For half-wave rectifier,
PIV is Vm.

DISADVANTAGES OF HALF-WAVE RECTIFIER:

1. The ripple factor is high.

2. The efficiency is low.
3. The Transformer Utilization factor is low.
Because of all these disadvantages, the half-wave rectifier circuit is normally not used as a
power rectifier circuit.

2.2.2) FULL WAVE RECTIFIER:

A full-wave rectifier converts an ac voltage into a pulsating dc voltage using both half cycles of the
applied ac voltage. In order to rectify both the half cycles of ac input, two diodes are used in this circuit.
The diodes feed a common load RL with the help of a center-tap transformer. A center-tap transformer
is the one, which produces two sinusoidal waveforms of same magnitude and frequency but out of
phase with respect to the ground in the secondary winding of the transformer. The full wave rectifier is
shown in the fig 4 below
Fig. 5 shows the input and output wave forms of the ckt.
During positive half of the input signal, anode of diode D1 becomes positive and at the
same time the anode of diode D2 becomes negative. Hence D1 conducts and D2 does not
conduct. The load current flows through D1 and the voltage drop across RL will be equal to the input
voltage.
During the negative half cycle of the input, the anode of D1 becomes negative and the anode of
D2 becomes positive. Hence, D1 does not conduct and D2 conducts. The load current flows through D2
and the voltage drop across RL will be equal to the input voltage. It is noted that the load current flows
in the both the half cycles of ac voltage and in the same direction through the load resistance.

i) AVERAGEVOLTAGE

ii) AVERAGE CURRENT

iii) RMS VOLTAGE:

T
Vrms = 1
T òV
0
2
d
(wt)
2P
1
Vrms =
2P
ò(V m sim(wt)) 2 d (wt)
0

IV) RMS CURRENT

I rms =
2ImP

V) PEAK FACTOR

Peak factor = p
e
a
k
v
a
l
ue rmsvalue
 Peak Factor = V
m

(
V
m

2
)

Peak Factor =2

vi) FORM FACTOR

Form factor= R
m
s

v
a
l
u
e

a
v
e
r
a
g
e
v
a
l
u
e

Form factor=
(Vm / 2)
2Vm / P

Form Factor =1.11

vii) Ripple Factor:

viii) Efficiency (h ):

o / ppower
h = i / ppower *100
ix) Transformer Utilization Factor (TUF):

The d.c. power to be delivered to the load in a rectifier circuit decides the rating of the transformer
used in the circuit. So, transformer utilization factor is defined as

TUF = p
d
c

P
a
c
(
r
a
t
e
d
)
x) Peak Inverse Voltage (PIV):
It is defined as the maximum reverse voltage that a diode can withstand without destroying the junction.
The peak inverse voltage across a diode is the peak of the negative half- cycle. For half- wave rectifier,
PIV is 2Vm
 xi) % Regulation

.
Advantages

1) Ripple factor = 0.482 (against 1.21 for HWR)

2) Rectification efficiency is 0.812 (against 0.405 for HWR)
3) Better TUF (secondary) is 0.574 (0.287 for HWR)
4) No core saturation problem
Disadvantages:
1) Requires center tapped transformer.

2.2.3) BRIDGE RECTIFIER.

Another type of circuit that produces the same output waveform as the full wave rectifier circuit above,
is that of the Full Wave Bridge Rectifier. This type of single phase rectifier uses four individual
rectifying diodes connected in a closed loop "bridge" configuration to produce the desired output. The
main advantage of this bridge circuit is that it does not require a special centre tapped transformer,
thereby reducing its size and cost. The single secondary winding is connected to one side of the diode
bridge network and the load to the other side as shown below.

The Diode Bridge Rectifier

 The four diodes labelled D1 to D4 are arranged in "series pairs" with only two diodes conducting current
during each half cycle. During the positive half cycle of the supply, diodes D1 and D2 conduct in series
while diodes D3 and D4 are reverse biased and the current flows through the load as shown below (fig
7).

The Positive Half-cycle

The Negative Half-cycle

During the negative half cycle of the supply, diodes D3 and D4 conduct in series (fig 8), but diodes D1
and D2 switch "OFF" as they are now reverse biased. The current flowing through the load is the same
direction as before.

As the current flowing through the load is unidirectional, so the voltage developed across the load is also
unidirectional the same as for the previous two diode full-wave rectifier, therefore the average DC
voltage across the load is 0.637Vmax. However in reality, during each half cycle the current flows
through two diodes instead of just one so the amplitude of the output voltage is two voltage drops ( 2 x
0.7 = 1.4V ) less than the input VMAX amplitude. The ripple frequency is now twice the supply
frequency (e.g. 100Hz for a 50Hz supply)

2.3 FILTERS

The output of a rectifier contains dc component as well as ac component. Filters are used to minimize
the undesirable ac i.e., ripple leaving only the dc component to appear at the output.
Some important filters are:

1. Inductor filter

2. Capacitor filter

3. LC or L section filter

4. CLC or Π-type filter

2.3.1 CAPACITOR FILTER

This is the most simple form of the filter circuit and in this arrangement a high value capacitor C is
placed directly across the output terminals, as shown in figure. During the conduction period it gets
charged and stores up energy to it during non-conduction period. Through this process, the time duration
during which Ft is to be noted here that the capacitor C gets charged to the peak because there is no
resistance (except the negligible forward resistance of diode) in the charging path. But the discharging
time is quite large (roughly 100 times more than the charging time depending upon the value of RL)
because it discharges through load resistance RL.

The function of the capacitor filter may be viewed in terms of impedances. The large value capacitor C
offers a low impedance shunt path to the ac components or ripples but offers high impedance to the dc
component. Thus ripples get bypassed through capacitor C and only dc component flows through the
load resistance RL

Capacitor filter is very popular because of its low cost, small size, light weight and good
characteristics.
CAPACITOR FILTER WITH HWR

CAPACITOR FILTER WITH FWR

The worthnoting points about shunt capacitor filter are:

1. For a fixed-value filter capacitance larger the load resistance RL larger will be the discharge time
constant CRL and therefore, lower the ripples and more the output voltage. On the other hand lower the
load resistance (or more the load current), lower will be the output voltage.

2. Similarly smaller the filter capacitor, the less charge it can hold and more it will discharge. Thus the
peak-to-peak value of the ripple will increase, and the average dc level will decrease. Larger the filter
capacitor, the more charge it can hold and the less it will discharge. Hence the peak-to-peak value of the
ripple will be less, and the average dc level will increase. But, the maximum value of the capacitance
that can be employed is limited by another factor. The larger the capacitance value, the greater is the
current required to charge the capacitor to a given voltage. The maximum current that can be handled by
a diode is limited by the figure quoted by the manufacturer. Thus the maximum value of the capacitance,
that can be used in the shunt filter capacitor is limited.

2.3.2 Series Inductor Filter.

In this arrangement a high value inductor or choke L is connected in series with the rectifier element and
the load, as illustrated in figure. The filtering action of an inductor filter depends upon its property of
opposing any change in the current flowing through it. When the output current of the rectifier
increases above a certain value, energy is stored in it in the form of magnetic field and this energy is
given up when the output current falls below the average value. Thus by placing a choke coil in series
with the rectifier output and load, any sudden change in current that might have occurred in the circuit
without an inductor is smoothed out by the presence of the inductor L.

The function of the inductor filter may be viewed in terms of impedances. The choke offers high
impedance to the ac components but offers almost zero resistance to the desired dc components. Thus
ripples are removed to a large extent. Nature of the output voltage without filter and with choke filter is
shown in figure.

For dc (zero frequency), the choke resistance R c in series with the load resistance R L forms a voltage
divider and dc voltage across the load is given as

where Vdc is dc voltage output from a full-wave rectifier. Usually choke coil resistance Rc, is much
small than RL and, therefore, almost entire of the dc voltage is available across the load resistance R L.

Since the reactance of inductor increases with the increase in frequency, better filtering of the higher
harmonic components takes place, so effect of third and higher harmonic voltages can be neglected.

As obvious from equation , if choke coil resistance R c is negligible in comparison to load resistance R L,
then the entire dc component of rectifier output is available across 2 RL and is equal to — VL max. The ac
voltage partly drops across XL and partly over RL.

2.3.3 L-SECTION FILTER:

A simple series inductor reduces both the peakand effective values of the output current and output
voltage. On the other hand a simple shunt capacitor filter reduces the ripple voltage but increases the
diode current. The diode may get damaged due to large current and at the same time it causes greater
heating of supply transformer resulting in reduced efficiency.

In an inductor filter, ripple factor increases with the increase in load resistance RL while in a capacitor
filter it varies inversely with load resistance RL.

From economical point of view also, neither series inductor nor shunt capacitor type filters are suitable.

Practical filter-circuits are derived by combining the voltage stabilizing action of shunt capacitor with
the current smoothing action of series choke coil. By using combination of inductor and capacitor ripple
factor can be lowered, diode current can be restricted and simultaneously ripple factor can be made
almost independent of load resistance (or load current). Two types of most commonly used
combinations are choke-input or L-section filter-and capacitor-input or Pi-Filter.
Choke-input filter is explained below:

Choke-input filter consists of a choke L connected in series with the rectifier and a capacitor C
connected across the load . This is also sometimes called the L-section filter because in this arrangement
inductor and capacitor are connected, as an inverted L. ln figure only one filter section is shown. But
several identical sections are often employed to improve the smoothing action. (The choke L on the
input side of the filter readily allows dc to pass but opposes the flow of ac components because its dc
resistance is negligibly small but ac impedance is large. Any fluctuation that remains in the current even
after passing through the choke are largely by-passed around the load by the shunt capacitor because Xc
is much smaller than RL. Ripples can be reduced effectively by making XL greater than Xc at ripple
frequency. However, a small ripple still remains in the filtered output and this is considered negligible if
it than l%. The rectified and filtered output voltage waveforms from a full-wave re with choke-input
filter are shown in figure.
 2.3.4 Π-SECTION FILTER:

Capacitor-Input or Pi-Filter.

Such a filter consists of a shunt capacitor C1 at the input followed by an L-section filter formed by
series inductor L and shunt capacitor C 2. This is also called the n-filter because the shape of the circuit
diagram for this filter appears like Greek letter n (pi). Since the rectifier feeds directly into the capacitor
so it is also called capacitor input filter.

As the rectified output is fed directly into a capacitor C1. Such a filter can be used with a half-wave
rectifier (series inductor and L-section filters cannot be used with half-wave rectifiers). Usually
electrolytic capacitors are used even though their capacitances are large but they occupy minimum
space. Usually both capacitors C1 and C 2 are enclosed in one metal container. The metal container
serves as, the common ground for the two capacitors.

A capacitor-input or pi- filter is characterized by a high voltage output at low current drains. Such a filter
is used, if, for a given transformer, higher voltage than that can be obtained from an L-section filter is
required and if low ripple than that can be obtained from a shunt capacitor filter or L-section filter is
desired. In this filter, the input capacitor C1 is selected to offer very low reactance to the ripple
frequency. Hence major part of filtering is accomplished by the input capacitor C1. Most of the
remaining ripple is removed by the L-section filter consisting of a choke L and capacitor C 2.)
 The action of this filter can best be understood by considering the action of L-section filter, formed by L
and C2, upon the triangular output voltage wave from the input capacitor C 1 The charging and
discharging action of input capacitor C1 has already been discussed. The output voltage is roughly the
same as across input capacitor C1 less the dc voltage drop in inductor. The ripples contained in this
output are reduced further by L-section filter. The output voltage of pi-filter falls off rapidly with the
increase in load-current and, therefore, the voltage regulation with this filter is very poor.

SALIENT FEATURES OF L-SECTION AND PI-FILTERS.

1. In pi-filter the dc output voltage is much larger than that can be had from an L-section filter with the
same input voltage.

2. In pi-filter ripples are less in comparison to those in shunt capacitor or L-section filter. So smaller
valued choke is required in a pi-filter in comparison to that required in L-section filter.

3. In pi-filter, the capacitor is to be charged to the peak value hence the rms current in supply
transformer is larger as compared in case of L-section filter.

4. Voltage regulation in case of pi-filter is very poor, as already mentioned. So n-filters are suitable for
fixed loads whereas L-section filters can work satisfactorily with varying loads provided a minimum
current is maintained.

5. In case of a pi-filter PIV is larger than that in case of an L-section filter.

COMPARISON OF FILTERS
1) A capacitor filter provides Vm volts at less load current. But regulation is poor.
2) An Inductor filter gives high ripple voltage for low load currents. It is used
for high load currents
3) L – Section filter gives a ripple factor independent of load current. Voltage
Regulation can be improved by use of bleeder resistance
4) Multiple L – Section filter or π filters give much less ripple than the single L
– Section Filter.

A regulator is an important device when it comes to power electronics as it controls the power output.
Need for a Regulator
For a Power supply to produce a constant output voltage, irrespective of the input voltage variations or the load
current variations, there is a need for a voltage regulator.
A voltage regulator is such a device that maintains constant output voltage, instead of any kind of fluctuations in the input
voltage being applied or any variations in current, drawn by the load.
 Types of Regulators
Regulators can be classified into different categories, depending upon their working and type of connection.
Depending upon the type of regulation, the regulators are mainly divided into two types namely, line and load regulators.
 Line Regulator − The regulator which regulates the output voltage to be constant, in spite of input line variations, it is
called as Line regulator.
 Load Regulator − The regulator which regulates the output voltage to be constant, in spite of the variations in load at
the output, it is called as Load regulator.
Depending upon the type of connection, there are two type of voltage regulators. They are

 Series voltage regulator

 Shunt voltage regulator
The arrangement of them in a circuit will be just as in the following figures.
4.1 NEED FOR TRANSISTOR BIASING
If the o/p signal must be a faithful reproduction of the i/p signal, the transistor must be operated
in active region. That means an operating point has to be established in this region . To establish an
operating point (proper values of collector current I c and collector to emitter voltage V CE) appropriate
supply voltages and resistances must be suitably chosen in the ckt. This process of selecting proper
supply voltages and resistance for obtaining desired operating point or Q point is called as biasing and
the ckt used for transistor biasing is called as biasing ckt.

There are four conditions to be met by a transistor so that it acts as a faithful ampr:

1) Emitter base junction must be forward biased (VBE=0.7Vfor Si, 0.2V for Ge) and collector base
junction must be reverse biased for all levels of i/p signal.
2) Vce voltage should not fall below VCE (sat) (0.3V for Si, 0.1V for Ge) for any part of the i/p signal.
For VCE less than VCE (sat) the collector base junction is not probably reverse biased.
3) The value of the signal Ic when no signal is applied should be at least equal to the max. collector
current t due to signal alone.
4) Max. rating of the transistor Ic(max), VCE (max) and PD(max) should not be exceeded at any value of i/p
signal.

Consider the fig shown in fig1. If operating point is selected at A, A represents a condition when no
bias is applied to the transistor i.e, I c=0, VCE =0. It does not satisfy the above said conditions necessary
for faithful amplification.

Point C is too close to PD(max) curve of the transistor. Therefore the o/p voltage swing in the positive
direction is limited.

Point B is located in the middle of active region .It will allow both positive and negative half cycles
in the o/p signal. It also provides linear gain and larger possible o/p voltages and currents

Hence operating point for a transistor amplifier is selected to be in the middle of active region.
 IC(max)

PD(max)

Vce(sat)

Fig 4.1CE Output Characteristics

4.2 DC LOAD LINE

Referring to the biasing circuit of fig 4.2a, the values of VCC and RC are fixed and Ic and VCE are
dependent on RB.

Applying Kirchhoff’s voltage law to the collector circuit in fig. 4.2a, we get

Fig 4.2a CE Amplifier circuit (b) Load line

 The straight line represented by AB in fig4.2b is called the dc load line. The coordinates of the end

point A are obtained by substituting VCE =0 in the above equation. Then . Therefore The

coordinates of A are VCE =0 and .

The coordinates of B are obtained by substituting Ic=0 in the above equation. Then Vce = Vcc.
Therefore the coordinates of B are V CE =Vcc and Ic=0. Thus the dc load line AB can be drawn if the
values of Rc and Vcc are known.

As shown in the fig4.2b, the optimum POINT IS LOCATED AT THE MID POINT OF THE
MIDWAY BETWEEN a AND b. In order to get faithful amplification, the Q point must be well within
the active region of the transistor.

Even though the Q point is fixed properly, it is very important to ensure that the operating point
remains stable where it is originally fixed. If the Q point shifts nearer to either A or B, the output voltage
and current get clipped, thereby o/p signal is distorted.

In practice, the Q-point tends to shift its position due to any or all of the following three main
factors.

1) Reverse saturation current, Ico, which doubles for every 10oC raise in temperature
2) Base emitter Voltage ,VBE, which decreases by 2.5 mV per oC
3) Transistor current gain, hFE or β which increases with temperature.

If base current IB is kept constant since IB is approximately equal to Vcc/RB. If the transistor is
replaced by another one of the same type, one cannot ensure that the new transistor will have identical
parameters as that of the first one. Parameters such as β vary over a range. This results in the variation of
collector current Ic for a given IB. Hence , in the o/p characteristics, the spacing between the curves
might increase or decrease which leads to the shifting of the Q-point to a location which might be
completely unsatisfactory.

4.3 AC LOAD LINE

After drawing the dc load line, the operating point Q is properly located at the center of the dc
load line. This operating point is chosen under zero input signal condition of the circuit. Hence the ac
load line should also pas through the operating point Q. The effective ac load resistance R ac, is a

combination of RC parallel to RL i.e. || . So the slope of the ac load line CQD will be .
To draw the ac load line, two end points, I.e. VCE(max) and IC(max) when the signal is applied are required.
, which locates point D on the Vce axis.

, which locates the point C on the IC axis.

By joining points c and D, ac load line CD is constructed. As RC > Rac, The dc load line is less steep
than ac load line.

4.4 STABILITY FACTOR (S):

The rise of temperature results in increase in the value of transistor gain β and the leakage current
Ico. So, IC also increases which results in a shift in operating point. Therefore, The biasing network
should be provided with thermal stability. Maintenance of the operating point is specified by S, which
indicates the degree of change in operating point due to change in temperature.

The extent to which IC is stabilized with varying IC is measured by a stability factor S

,

For CE configuration

Differentiate the above equation w.r.t IC , We get

S should be small to have better thermal stability.

Stability factor S’ and S’’:

S’ is defined as the rate of change of IC with VBE, keeping IC and VBE constant.

S’’ is defined as the rate of change of IC with β, keeping ICO and VBE constant.
4.5 METHODS OF TRANSISTOR BIASING

1) Fixed bias (base bias)

Fig 4.3 Fixed Biasing Circuit

This form of biasing is also called base bias. In the fig 4.3 shown, the single power source (for example,
battery) is used for both collector and base of a transistor, although separate batteries can also be used.

In the given circuit,

Vcc = IBRB + Vbe

Therefore, IB = (Vcc - Vbe)/RB

Since the equation is independent of current ICR, dIB//dICR =0 and the stability factor is given by the
equation….. reduces to

S=1+β

Since β is a large quantity, this is very poor biasing circuit. Therefore in practice the circuit is not used fo
biasing.

For a given transistor, Vbe does not vary significantly during use. As Vcc is of fixed value, on selection of
R the base current IB is fixed. Therefore this type is called fixed bias type of circuit.

Also for given circuit, Vcc = ICRC + Vce

 Therefore, Vce = Vcc - ICRC

Merits:

 It is simple to shift the operating point anywhere in the active region by merely changing
the base resistor (RB).
 A very small number of components are required.

Demerits:

 The collector current does not remain constant with variation in temperature or power
supply voltage. Therefore the operating point is unstable.
 Changes in Vbe will change IB and thus cause RE to change. This in turn will alter the
gain of the stage.
 When the transistor is replaced with another one, considerable change in the value of β
can be expected. Due to this change the operating point will shift.

2) EMITTER-FEEDBACK BIAS:

The emitter feedback bias circuit is shown in the fig 4.4. The fixed bias circuit is modified by
attaching an external resistor to the emitter. This resistor introduces negative feedback that stabilizes the
Q-point. From Kirchhoff's voltage law, the voltage across the base resistor is

VRb = VCC - IeRe - Vbe.

Fig 4.4 Self Biasing Circuit

From Ohm's law, the base current is

 Ib = VRb / Rb.

The way feedback controls the bias point is as follows. If Vbe is held constant and temperature
increases, emitter current increases. However, a larger Ie increases the emitter voltage Ve = IeRe, which
in turn reduces the voltage VRb across the base resistor. A lower base-resistor voltage drop reduces the
base current, which results in less collector current because Ic = ß IB. Collector current and emitter
current are related by Ic = α Ie with α ≈ 1, so increase in emitter current with temperature is opposed, and
operating point is kept stable.

Similarly, if the transistor is replaced by another, there may be a change in IC (corresponding to

change in β-value, for example). By similar process as above, the change is negated and operating point
kept stable.

For the given circuit,

IB = (VCC - Vbe)/(RB + (β+1)RE).

Merits:

The circuit has the tendency to stabilize operating point against changes in temperature and β-
value.

Demerits:

 In this circuit, to keep IC independent of β the following condition must be met:

which is approximately the case if ( β + 1 )RE >> RB.

 As β-value is fixed for a given transistor, this relation can be satisfied either by keeping
RE very large, or making RB very low.

 If RE is of large value, high VCC is necessary. This increases cost as well as

precautions necessary while handling.
 If RB is low, a separate low voltage supply should be used in the base circuit. Using
two supplies of different voltages is impractical.

 In addition to the above, RE causes ac feedback which reduces the voltage gain of
the amplifier.

3) COLLECTOR TO BASE BIAS OR COLLECTOR FEED-BACK BIAS:

 Fig 4.5 Collector to Base Biasing Circuit

This configuration shown in fig 4.5 employs negative feedback to prevent thermal runaway and
stabilize the operating point. In this form of biasing, the base resistor RB is connected to the collector
instead of connecting it to the DC source Vcc. So any thermal runaway will induce a voltage drop across
the RC resistor that will throttle the transistor's base current.

From Kirchhoff's voltage law, the voltage across the base resistor Rb is

By the Ebers–Moll model, Ic = βIb, and so

From Ohm's law, the base current , and so

Hence, the base current Ib is

If Vbe is held constant and temperature increases, then the collector current Ic increases.
However, a larger Ic causes the voltage drop across resistor Rc to increase, which in turn reduces the
voltage across the base resistor Rb. A lower base-resistor voltage drop reduces the base current Ib,
which results in less collector current Ic. Because an increase in collector current with temperature is
opposed, the operating point is kept stable.

Merits:

 Circuit stabilizes the operating point against variations in temperature and β (i.e.
replacement of transistor)

Demerits:

 In this circuit, to keep Ic independent of β, the following condition must be met:

which is the case when

 As β-value is fixed (and generally unknown) for a given transistor, this relation can be
satisfied either by keeping Rc fairly large or making Rb very low.

 If Rc is large, a high Vcc is necessary, which increases cost as well as precautions

necessary while handling.
 If Rb is low, the reverse bias of the collector–base region is small, which limits the range
of collector voltage swing that leaves the transistor in active mode.

 The resistor Rb causes an AC feedback, reducing the voltage gain of the amplifier. This
undesirable effect is a trade-off for greater Q-point stability.

Usage: The feedback also decreases the input impedance of the amplifier as seen from the base,
which can be advantageous. Due to the gain reduction from feedback, this biasing form is used only
when the trade-off for stability is warranted.
 4) COLLECTOR –EMITTER FEEDBACK BIAS:

Fig 4.6 Collector-Emitter Biasing Circuit

The above fig4.6 shows the collector –emitter feedback bias circuit that can be obtained by
applying both the collector feedback and emitter feedback. Here the collector feedback is provided by
connecting a resistance RB from the collector to the base and emitter feedback is provided by
connecting an emitter Re from emitter to ground. Both feed backs are used to control collector current
and base current IB in the opposite direction to increase the stability as compared to the previous biasing
circuits.

5) VOLTAGE DIVIDER BIAS OR SELF BIAS OR EMITTER BIAS

The voltage divider as shown in the fig 4.7 is formed using external resistors R 1 and R2. The
voltage across R2 forward biases the emitter junction. By proper selection of resistors R 1 and R2, the
operating point of the transistor can be made independent of β. In this circuit, the voltage divider holds
the base voltage fixed independent of base current provided the divider current is large compared to the
base current. However, even with a fixed base voltage, collector current varies with temperature (for
example) so an emitter resistor is added to stabilize the Q-point, similar to the above circuits with
emitter resistor.

Field Effect Transistor (FET) amplifiers provide an excellent voltage gain and high input
impedence. Because of high input impedence and other characteristics of JFETs they are preferred over
BJTs for certain types of applications.

There are 3 basic FET circuit configurations:

i) Common Source
ii) Common Drain
iii) Common Gain
Similar to BJT CE,CC and CB circuits, only difference is in BJT large output collector
current is controlled by small input base current whereas FET controls output current by means of
small input voltage. In both the cases output current is controlled variable.
FET amplifier circuits use voltage controlled nature of the JFET. In Pinch off region, ID
depends only on VGS.
 5.7 Common Source (CS) Amplifier

Fig. 5.1 (a) CS Amplifier (b) Small-signal equivalent circuit

A simple Common Source amplifier is shown in Fig. 5.1(a) and associated small signal equivalent
circuit using voltage-source model of FET is shown in Fig. 5.1(b)

Voltage Gain
Source resistance (RS) is used to set the Q-Point but is bypassed by CS for mid-frequency operation.
From the small signal equivalent circuit ,the output voltage
VO = -RDµVgs(RD + rd)
Where Vgs = Vi , the input voltage,
Hence, the voltage gain,
AV = VO / Vi = -RDµ(RD + rd)
Input Impedence
From Fig. 5.1(b) Input Impedence is
Z i = RG

For voltage divider bias as in CE Amplifiers of BJT

RG = R1 ║ R2
Output Impedance
Output impedance is the impedance measured at the output terminals with the input voltage VI = 0 From
the Fig. 5.1(b) when the input voltage Vi = 0, Vgs = 0 and hence
µ Vgs = 0
 The equivalent circuit for calculating output impedence is given in Fig. 5.2.
Output impedence Zo = rd ║ RD
Normally rd will be far greater than RD . Hence Zo ≈ RD

5.8 Common Drain Amplifier

A simple common drain amplifier is shown in Fig. 5.2(a) and associated small signal equivalent circuit
using the voltage source model of FET is shown in Fig. 5.2(b).Since voltage Vgd is more easily
determined than Vgs, the voltage source in the output circuit is expressed in terms of Vgs and Thevenin’s
theorem.

Fig. 5.2 (a)CD Amplifier (b)Small-signal equivalent circuit

Voltage Gain
The output voltage,
VO = RSµVgd / (µ + 1) RS +
rd Where Vgd = Vi the input voltage.
Hence, the voltage gain,
Av = VO / Vi = RSµ / (µ + 1) RS + rd
Input Impedence
From Fig. 5.2(b), Input Impedence Zi = RG
Output Impedence
From Fig. 5.2(b), Output impedence measured at the output terminals with input voltage Vi = 0 can be
calculated from the following equivalent circuit.
As Vi = 0: Vgd = 0: µvgd / (µ + 1) = 0
Output Impedence
 ZO = rd / (µ + 1) ║RS
When µ » 1
ZO = ( rd / µ) ║RS = (1/gm) ║RS

5.9 BIASING FET

For the proper functioning of a linear FET amplifier, it is necessary to maintain the
operating point Q stable in the central portion of the pinch off region The Q point should be independent
of device parameter variations and ambient temperature variations

This can be achieved by suitably selecting the gate to source voltage VGS and drain current ID which is
referred to as biasing

JFET biasing circuits are very similar to BJT biasing circuitsThe main difference between JFET
circuits and BJT circuits is the operation of the active components themselves

There are mainly two types of Biasing circuits

1. Self bias
2. Voltage divider bias.

5.13.1. SELF BIAS:-

Self bias is a JFET biasing circuit that uses a source resistor to help reverse bias the JFET gate.

A self bias circuit is shown in the fig 5.3

 Self bias is the most common type of JFET bias. This JFET must be operated such that gate
source junction is always reverse biased. This condition requires a negative VGS for an N channel JFET
and a positive VGS for P channel JFET. This can be achieved using the self bias arrangement as shown
in Fig 5.3. The gate resistor RG doesn’t affect the bias because it has essentially no voltage drop across
it, and : the gate remains at 0V .RG is necessary only to isolate an ac signal from ground in amplifier
applications. The voltage drop across resistor RS makes gate source junction reverse biased.

DC analysis of self Bias:-

In the following DC analysis , the N channel J FET shown in the fig5.4. is used for illustration.

For DC analysis we can replace coupling capacitors by open circuits and we can also replace the
resistor RG by a short circuit equivalent.

:. IG = 0
The relation between ID and VGS is given

by Id=Idss[1- ]2

VGS for N channel JFET is =-id Rs

Substuting this value in the above equation

Id=Idss[1- ]2

Id=Idss[1+ ]2
 For the N-chanel FET in the above figure

Is produces a voltage drop across Rs and makes the source positive w.r.t ground

in any JFET circuit all the source current passes through the device to drain circuit this is due to the fact
that there is no significant gate current

therefore we can define source current as Is=Id and Vg=0 then

Vs= Is Rs =IdRs

Vgs=Vg-Vs=0-IdRs=-IdRs

Drawing the self bias line:-

Typical transfer characteristics for a self biased JFET are shown in the fig5.5.

The maximum drain current is 6mA and the gate source cut off voltage is -3V. This means the gate
voltage has to be between 0 and -3V.

Now using the equation VGS = -IDRS and assuming RS of any suitable value we can draw the self bias
line.

Let us assume RS = 500Ω

With this Rs , we can plot two points corresponding to ID = 0 and Id =

IDSS for ID = 0

VGS = -ID RS

VGS = 0X (500.Ω) = 0V
 So the first point is (0 ,0)

( Id, VGS)

For ID= IDSS=6mA

VGS = (-6mA) (500 Ω) = -3V

So the 2nd Point will be (6mA,-3V)

By plotting these two points, we can draw the straight line through the points. This line will
intersect the transconductance curve and it is known as self bias line. The intersection point gives the
operating point of the self bias JFET for the circuit.

At Q point , the ID is slightly > than 2mA and VGS is slightly > -1V. The Q point for the self
bias JFET depends on the value of Rs.If Rs is large, Q point far down on the transconductance curve ,ID
is small, when Rs is small Q point is far up on the curve , ID is large.

5.13.2 VOLTAGE DIVIDER BIAS:-

The fig5.6 shows N channel JFET with voltage divider bias. The voltage at the source of JFET
must be more positive than the voltage at the gate in order to keep the gate to source junction reverse
biased. The source voltage is

VS = IDRS

The gate voltage is set by resistors R1 and R2 as expressed by the following equation using the
voltage divider formula.
Vg= Vdd
For dc analysis fig 5.5

Applying KVL to the input

circuit VG-VGS-VS =0

:: VGS = VG-Vs=VG-

ISRS VGS = VG-IDRS ::

IS = ID

Applying KVL to the input circuit we

get VDS+IDRD+VS-VDD =0

::VDS = VDD-IDRD-

IDRS VDS = VDD-ID (

RD +RS )

The Q point of a JFET amplifier , using the voltage divider bias is

IDQ = IDSS [1-VGS/VP]2

VDSQ = VDD-ID ( RD+RS )

 Fig 4.7 Voltage Divider Biasing Circuit

In this circuit the base voltage is given by:

voltage across

provided .

Also

For the given circuit,

Let the current in resistor R1 is I1 and this is divided into two parts – current through base and
resistor R2. Since the base current is very small so for all practical purpose it is assumed that I1 also
flows through R2, so we have

Applying KVL in the circuit, we have

 It is apparent from above expression that the collector current is independent of ? thus the
stability is excellent. In all practical cases the value of VBE is quite small in comparison to the V2, so it
can be ignored in the above expression so the collector current is almost independent of the transistor
parameters thus this arrangement provides excellent stability.
Again applying KVL in collector circuit, we have

The resistor RE provides stability to the circuit. If the current through the collector rises, the
voltage across the resistor RE also rises. This will cause VCE to increase as the voltage V2 is
independent of collector current. This decreases the base current, thus collector current increases to its
former value.
Stability factor for such circuit arrangement is given by

If Req/RE is very small compared to 1, it can be ignored in the above expression thus we have

Which is excellent since it is the smallest possible value for the stability. In actual practice the
value of stability factor is around 8-10, since Req/RE cannot be ignored as compared to 1.

Merits:

 Unlike above circuits, only one dc supply is necessary.

 Operating point is almost independent of β variation.
 Operating point stabilized against shift in temperature.
 Demerits:

 In this circuit, to keep IC independent of β the following condition must be met:

which is approximately the case if

where R1 || R2 denotes the equivalent resistance of R1 and R2 connected in parallel.

 As β-value is fixed for a given transistor, this relation can be satisfied either by keeping R E fairly large, or making R1||R2
very low.

 If RE is of large value, high VCC is necessary. This increases cost as well as precautions necessary while handling.
 If R1 || R2 is low, either R1 is low, or R2 is low, or both are low. A low R 1 raises VB closer to VC, reducing the available
swing in collector voltage, and limiting how large R C can be made without driving the transistor out of active mode. A low R 2 lowers Vbe,
reducing the allowed collector current. Lowering both resistor values draws more current from the power supply and lowers the input
resistance of the amplifier as seen from the base.

 AC as well as DC feedback is caused by RE, which reduces the AC voltage gain of the amplifier. A method to avoid AC
feedback while retaining DC feedback is discussed below.

Usage: The circuit's stability and merits as above make it widely used for linear circuits.
 RC COUPLED AMPLIFIER

The resistance-capacitance coupling is, in short termed as RC coupling. This is the mostly used coupling technique in amplifiers.

Construction of a Two-stage RC Coupled Amplifier

The constructional details of a two-stage RC coupled transistor amplifier circuit are as follows. The two stage amplifier circuit has two transistors,
connected in CE configuration and a common power supply V CC is used. The potential divider network R1 and R2 and the resistor Re form the biasing
and stabilization network. The emitter by-pass capacitor Ce offers a low reactance path to the signal.

The resistor RL is used as a load impedance. The input capacitor C in present at the initial stage of the amplifier couples AC signal to the base of the
transistor. The capacitor CC is the coupling capacitor that connects two stages and prevents DC interference between the stages and controls the shift
of operating point. The figure below shows the circuit diagram of RC coupled amplifier.
Operation of RC Coupled Amplifier
When an AC input signal is applied to the base of first transistor, it gets amplified and appears at the collector load R L which is then passed through
the coupling capacitor CC to the next stage. This becomes the input of the next stage, whose amplified output again appears across its collector load.
Thus the signal is amplified in stage by stage action.
The important point that has to be noted here is that the total gain is less than the product of the gains of individual stages. This is because when a
second stage is made to follow the first stage, the effective load resistance of the first stage is reduced due to the shunting effect of the input
resistance of the second stage. Hence, in a multistage amplifier, only the gain of the last stage remains unchanged.

As we consider a two stage amplifier here, the output phase is same as input. Because the phase reversal is done two times by the two stage CE
configured amplifier circuit.

Frequency Response of RC Coupled Amplifier

Frequency response curve is a graph that indicates the relationship between voltage gain and function of frequency. The frequency response of a RC
coupled amplifier is as shown in the following graph.
From the above graph, it is understood that the frequency rolls off or decreases for the frequencies below 50Hz and for the frequencies above 20
KHz. whereas the voltage gain for the range of frequencies between 50Hz and 20 KHz is constant.

We know that,

XC=1/2πfc

It means that the capacitive reactance is inversely proportional to the frequency.

• The function of differential amplifier is to amplify the

difference of two signals.
• The need for differential amplifier in many physical measurements arises where response from d.c to many megahertz is required. It is
also the basic input stage of an integrated amplifier.
Block diagram of differential amplifier
 Fig. Basic configuration of a differential amplifier

• The output signal in a differential amplifier is proportional to the

difference between the two input signals.

Vo α (V1 – V2)
Where,
 V1 & V2 – Two inputsignals

Vo – Single ended output

Differential Gain (Ad):

Where, Ad is the constant of proportionality.

Ad is the gain with which differential amplifier amplifies the difference of two input signals.
Hence it is known as ‘differential gain of the differential amplifier’.

=-g R
m C

V1-V2= Difference of two voltage

 Common Mode Gain (Ad):
An average of the two input signals is called common mode signal denoted as Vc.

Hence, the differential amplifier also produces the output

voltage proportional to common mode signals.
Vo = Ac Vc

Where Ac = - R / R , is the common modegain.

C E

Therefore, there exists some finite output for V1 = V2 due to common mode gain Ac.
Hence the total output of any differential amplifier can be given as,

Vo = Ad Vd + AcVc
Common Mode Rejection Ratio (CMRR):

• The ability of a differential amplifier to reject a common mode signal is defined by a ratio called ‘Common Mode Rejection Ratio’ denoted as
CMRR.

• CMRR is defined as the ratio of the differential voltage gain Ad to common mode gain Ac and is expresses in dB.

CMRR = Ad/Ac = g R
m E
Differential Amplifier using FETs:

A =-g R
d m D
A =-R /R
c D ss
CMRR = Ad/Ac = g R
m ss
Feedback Amplifier

Feedback amplifier is a type of amplifier whose feedback exists between the output and input signal. The
concept of feeding the output signal back to its input circuit is known as feedback and that is why it is
known as a feedback amplifier. It is dependent between the output and input with effective control.
Feedback amplifiers are divided into two types: positive feedback and negative feedback.

Block Diagram of Feedback Amplifier

The above image represents a block diagram for a feedback amplifier.

It consists of two parts: An amplifier and a feedback circuit.

The gain of the amplifier is represented by “A” and is the ratio of the output voltage Vo to the input
voltage Vi and is known as the feedback fraction.

And the voltage feedback is given by,

Vf=βVo from the output of the amplifier.

For negative feedback :

Vi=Vs−Vf=Vs−βVo

For positive feedback :

Vi=Vs+Vf=Vs+βVo

Let’s consider the case of negative feedback,

The output voltage Vo should be equal to Vs−βVo times gain of the amplifier “A”
AVs−AβVo=Vo
AVs=Vo(1+Aβ)
VoVs=A1+Aβ
Where Vs is applied signal voltage.

The overall gain with feedback from the amplifier is,

Af=VoVs
Where Vo is the output voltage and
Vs is the input signal voltage.
The gain feedback for a positive feedback amplifier,

Af=A1−Aβ-EQUATION (1)

And for a negative feedback amplifier,

Af=A1+Aβ- EQUATION (2)

Equations (1) and (2) are the standard equations to calculate the gain feedback of amplifiers depending
on their type.

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Types of Feedback Amplifiers

There are two types of feedback amplifiers namely positive feedback amplifiers and negative feedback
amplifiers.

The diagram below illustrates them.

1. Positive Feedback Amplifiers

o In this feedback amplifier, the input voltage or the current is in phase with the input signal.
o Both the input signal and feedback introduce a phase shift of 180° and makes a 360°
resultant phase shift to be in phase with the input signal.
o It increases the gain of the amplifier but also increases distortion and instability.
2. Negative Feedback Amplifier
o In this feedback, the input voltage or current is out of phase with the input signal, opposing
it.
o In this type of circuit, a 180° phase shift is introduced, but the resultant phase shift is zero.
Hence the feedback voltage would be 180° out of phase with respect to the input signal.
o It reduces the amplifier’s overall gain but also reduces distortion and overall noise.

OSCILLATORS:

In RC and LC oscillators the values of resistance, capacitance and inductance vary with temperature and hence the
frequency gets affected. In order to avoid this problem, the piezo electric crystals are being used in oscillators.
The use of piezo electric crystals in parallel resonant circuits provide high frequency stability in oscillators. Such
oscillators are called as Crystal Oscillators.
Crystal Oscillators
The principle of crystal oscillators depends upon the Piezo electric effect. The natural shape of a crystal is
hexagonal. When a crystal wafer is cur perpendicular to X-axis, it is called as X-cut and when it is cut along Y-axis,
it is called as Y-cut.

The crystal used in crystal oscillator exhibits a property called as Piezo electric property. So, let us have an idea on
piezo electric effect.

Piezo Electric Effect

The crystal exhibits the property that when a mechanical stress is applied across one of the faces of the crystal, a
potential difference is developed across the opposite faces of the crystal. Conversely, when a potential difference is
applied across one of the faces, a mechanical stress is produced along the other faces. This is known as Piezo
electric effect.
Certain crystalline materials like Rochelle salt, quartz and tourmaline exhibit piezo electric effect and such materials
are called as Piezo electric crystals. Quartz is the most commonly used piezo electric crystal because it is
inexpensive and readily available in nature.

When a piezo electric crystal is subjected to a proper alternating potential, it vibrates mechanically. The amplitude of
mechanical vibrations becomes maximum when the frequency of alternating voltage is equal to the natural frequency
of the crystal.

Working of a Quartz Crystal

In order to make a crystal work in an electronic circuit, the crystal is placed between two metal plates in the form of
a capacitor. Quartz is the mostly used type of crystal because of its availability and strong nature while being
inexpensive. The ac voltage is applied in parallel to the crystal.

The circuit arrangement of a Quartz Crystal will be as shown below −

If an AC voltage is applied, the crystal starts vibrating at the frequency of the applied voltage. However, if the
frequency of the applied voltage is made equal to the natural frequency of the crystal, resonance takes place and
crystal vibrations reach a maximum value. This natural frequency is almost constant.
Equivalent circuit of a Crystal

If we try to represent the crystal with an equivalent electric circuit, we have to consider two cases, i.e., when it
vibrates and when it doesn’t. The figures below represent the symbol and electrical equivalent circuit of a crystal
respectively.

The above equivalent circuit consists of a series R-L-C circuit in parallel with a capacitance C m. When the crystal
mounted across the AC source is not vibrating, it is equivalent to the capacitance Cm. When the crystal vibrates, it
acts like a tuned R-L-C circuit.
Frequency response
The frequency response of a crystal is as shown below. The graph shows the reactance (XL or XC) versus frequency
(f). It is evident that the crystal has two closely spaced resonant frequencies.
The first one is the series resonant frequency (fs), which occurs when reactance of the inductance (L) is equal to the
reactance of the capacitance C. In that case, the impedance of the equivalent circuit is equal to the resistance R and
the frequency of oscillation is given by the relation,
f=1/2π√L.C−−

OPERATIONAL AMPLIFIER:
Operational Amplifier, also called as an Op-Amp, is an integrated circuit, which can be used to perform various
linear, non-linear, and mathematical operations. An op-amp is a direct coupled high gain amplifier. You can
operate op-amp both with AC and DC signals. This chapter discusses the characteristics and types of op-amps.
Construction of Operational Amplifier
An op-amp consists of differential amplifier(s), a level translator and an output stage. A differential amplifier is
present at the input stage of an op-amp and hence an op-amp consists of two input terminals. One of those
terminals is called as the inverting terminal and the other one is called as the non-inverting terminal. The
terminals are named based on the phase relationship between their respective inputs and outputs.
Characteristics of Operational Amplifier

The important characteristics or parameters of an operational amplifier are as follows −

 Open loop voltage gain

 Output offset voltage
 Common Mode Rejection Ratio
 Slew Rate

This section discusses these characteristics in detail as given below −

Open loop voltage gain

The open loop voltage gain of an op-amp is its differential gain without any feedback path.

Mathematically, the open loop voltage gain of an op-amp is represented as −

 Av=v0/v1−v2
Output offset voltage
The voltage present at the output of an op-amp when its differential input voltage is zero is called as output offset
voltage.
Common Mode Rejection Ratio
Common Mode Rejection Ratio (CMRR) of an op-amp is defined as the ratio of the closed loop differential
gain, Ad and the common mode gain, Ac.

Mathematically, CMRR can be represented as −

CMRR=Ad/Ac
Note that the common mode gain, Ac of an op-amp is the ratio of the common mode output voltage and the common
mode input voltage.
Slew Rate

Slew rate of an op-amp is defined as the maximum rate of change of the output voltage due to a step input voltage.

Mathematically, slew rate (SR) can be represented as −

SR=Maximum of dV0/dt
Where, V0 is the output voltage. In general, slew rate is measured in either V/μSec or V/mSec
Types of Operational Amplifiers

An op-amp is represented with a triangle symbol having two inputs and one output.

Op-amps are of two types: Ideal Op-Amp and Practical Op-Amp.

Ideal Op-Amp
An ideal op-amp exists only in theory, and does not exist practically. The equivalent circuit of an ideal op-amp is
shown in the figure given below −

An ideal op-amp exhibits the following characteristics −

 Input impedance Zi=∞Ω
 Output impedance Z0=0Ω
 Open loop voltage gaine Av=∞
 If (the differential) input voltage Vi=0V, then the output voltage will be V0=0V
 Bandwidth is infinity. It means, an ideal op-amp will amplify the signals of any frequency without any
attenuation.
 Common Mode Rejection Ratio (CMRR) is infinity.
 Slew Rate (SR) is infinity. It means, the ideal op-amp will produce a change in the output instantly in
response to an input step voltage.
Practical Op-Amp
Practically, op-amps are not ideal and deviate from their ideal characteristics because of some imperfections during
manufacturing. The equivalent circuit of a practical op-amp is shown in the following figure −
A practical op-amp exhibits the following characteristics −
 Input impedance, Zi in the order of Mega ohms.
 Output impedance, Z0 in the order of few ohms..
 Open loop voltage gain, Av will be high.

Multivibrator
According to the definition, A Multivibrator is a two-stage resistance coupled amplifier with positive feedback from
the output of one amplifier to the input of the other.

Two transistors are connected in feedback so that one controls the state of the other. Hence the ON and OFF states of
the whole circuit, and the time periods for which the transistors are driven into saturation or cut off are controlled by
the conditions of the circuit.

The following figure shows the block diagram of a Multivibrator.

Types of Multivibrators
There are two possible states of a Multivibrator. In first stage, the transistor Q1 turns ON while the transistor Q2 turns
OFF. In second stage, the transistor Q1 turns OFF while the transistor Q2 turns ON. These two states are interchanged
for certain time periods depending upon the circuit conditions.

Depending upon the manner in which these two states are interchanged, the Multivibrators are classified into three
types. They are

Astable Multivibrator
An Astable Multivibrator is such a circuit that it automatically switches between the two states continuously
without the application of any external pulse for its operation. As this produces a continuous square wave output, it
is called as a Free-running Multivibrator. The dc power source is a common requirement.
The time period of these states depends upon the time constants of the components used. As the Multivibrator keeps
on switching, these states are known as quasi-stable or halfstable states. Hence there are two quasi-stable states for
an Astable Multivibrator.
Monostable Multivibrator
A Monostable Multivibrator has a stable state and a quasi-stable state. This has a trigger input to one transistor.
So, one transistor changes its state automatically, while the other one needs a trigger input to change its state.
As this Multivibrator produces a single output for each trigger pulse, this is known as One-shot Multivibrator. This
Multivibrator cannot stay in quasi-stable state for a longer period while it stays in stable state until the trigger pulse
is received.
Bistable Multivibrator
A Bistable Multivibrator has both the two states stable. It requires two trigger pulses to be applied to change the
states. Until the trigger input is given, this Multivibrator cannot change its state. It’s also known as flip-flop
multivibrator.
As the trigger pulse sets or resets the output, and as some data, i.e., either high or low is stored until it is disturbed,
this Multivibrator can be called as a Flip-flop.

BOOTSTRAP SWEEP GENERATOR

A bootstrap sweep generator is a time base generator circuit whose output is fed back to the input through the
feedback. This will increase or decrease the input impedance of the circuit. This process of bootstrapping is used to
achieve constant charging current.
Construction of Bootstrap Time Base Generator
The boot strap time base generator circuit consists of two transistors, Q1 which acts as a switch and Q2 which acts as
an emitter follower. The transistor Q1 is connected using an input capacitor CB at its base and a resistor RB through
VCC. The collector of the transistor Q1 is connected to the base of the transistor Q2. The collector of Q2 is connected
to VCC while its emitter is provided with a resistor RE across which the output is taken.
A diode D is taken whose anode is connected to VCC while cathode is connected to the capacitor C2 which is
connected to the output. The cathode of diode D is also connected to a resistor R which is in turn connected to a
capacitor C1. This C1 and R are connected through the base of Q2 and collector of Q1. The voltage that appears across
the capacitor C1 provides the output voltage Vo.

The following figure explains the construction of the boot strap time base generator.

Operation of Bootstrap Time Base Generator

Before the application of gating waveform at t = 0, as the transistor gets enough base drive from V CC through RB,
Q1 is ON and Q2 is OFF. The capacitor C2 charges to VCC through the diode D. Then a negative trigger pulse from
the gating waveform of a Monostable Multivibrator is applied at the base of Q1 which turns Q1 OFF. The capacitor
C2 now discharges and the capacitor C1 charges through the resistor R. As the capacitor C2 has large value of
capacitance, its voltage levels (charge and discharge) vary at a slower rate. Hence it discharges slowly and maintains
a nearly constant value during the ramp generation at the output of Q2.
During the ramp time, the diode D is reverse biased. The capacitor C2 provides a small current IC1 for the capacitor
C1 to charge. As the capacitance value is high, though it provides current, it doesn’t make much difference in its
charge. When Q1 gets ON at the end of ramp time, C1 discharges rapidly to its initial value. This voltage appears
across VO. Consequently, the diode D gets forward biased again and the capacitor C2 gets a pulse of current to
recover its small charge lost during the charging of C1. Now, the circuit is ready to produce another ramp output.
The capacitor C2 which helps in providing some feedback current to the capacitor C1 acts as a boot strapping
capacitor that provides constant current.
Output Waveforms

The output waveforms are obtained as shown in the following figure.

The pulse given at the input and the voltage VC1 which denotes the charging and discharging of the capacitor
C1 which contributes the output are shown in the figure above.
Advantage

The main advantage of this boot strap ramp generator is that the output voltage ramp is very linear and the ramp
amplitude reaches the supply voltage level.

The transistor Miller time base generator circuit is the popular Miller integrator circuit that produces a sweep
waveform. This is mostly used in horizontal deflection circuits.

Let us try to understand the construction and working of a Miller time base generator circuit.

Construction of Miller Sweep Generator

The Miller time base generator circuit consists of a switch and a timing circuit in the initial stage, whose input is
taken from the Schmitt gate generator circuit. The amplifier section is the following one which has three stages, first
being an emitter follower, second an amplifier and the third one is also an emitter follower.
An emitter follower circuit usually acts as a Buffer amplifier. It has a low output impedance and a high input
impedance. The low output impedance lets the circuit drive a heavy load. The high input impedance keeps the
circuit from not loading its previous circuit. The last emitter follower section will not load the previous amplifier
section. Because of this, the amplifier gain will be high.
The capacitor C placed between the base of Q1 and the emitter of Q3 is the timing capacitor. The values of R and C
and the variation in the voltage level of VBB changes the sweep speed. The figure below shows the circuit of a Miller
time base generator.
Operation of Miller Sweep Generator
When the output of Schmitt trigger generator is a negative pulse, the transistor Q4 turns ON and the emitter current
flows through R1. The emitter is at negative potential and the same is applied at the cathode of the diode D, which
makes it forward biased. As the capacitor C is bypassed here, it is not charged.
The application of a trigger pulse, makes the Schmitt gate output high, which in turn, turns the transistor Q 4 OFF.
Now, a voltage of 10v is applied at the emitter of Q4 that makes the current flow through R1 which also makes the
diode D reverse biased. As the transistor Q4 is in cutoff, the capacitor C gets charged from VBB through R and
provides a rundown sweep output at the emitter of Q3. The capacitor C discharges through D and transistor Q4 at the
end of the sweep.
Considering the effect of capacitance C1, the slope speed or sweep speed error is given by
es=VsV(1−A+RRi+CCi)
Applications

Miller sweep circuits are the most commonly used integrator circuit in many devices. It is a widely used saw tooth
generator.

Integrated Circuits
Integrated Circuits (ICs), usually referred to as microchips or chips, are at the middle of modern-day-day digital devices,
powering the whole IOT from smartphones and computer systems to clinical tool and vehicle structures. These miniature
digital circuits, created from lively and passive components, are fabricated on a silicon substrate.
The integration of numerous additives on an unmarried chip gives several blessings, making ICs a crucial technology within
the electronics employer. Here are some of the important factors considered below:
Active and Passive Components in ICs
 Active Components: ICs encompass energetic additives, collectively with diodes and transistors. Diodes
are semiconductor devices that permit the go together with the float of electrical present day-day in a single
route, allowing capabilities like rectification. Transistors are the building blocks of digital suitable judgment
gates and amplifiers, bearing in thoughts sign amplification and switching.
 Passive Components: Passive components in ICs encompass resistors and capacitors. Resistors alter the go
along with the float of electrical modern-day-day-day, limiting voltage stages and making sure right sign
shaping. Capacitors hold and release electric strength, permitting skills like filtering and power storage.

Integrated Circuits Fabrication Process

Firstly , fabrication is the process of construction or manufacturing of electronic device or product . Basically it is the
process of making large electronic components from may small electronic components .
The process involved for the Integrated Circuits is as follows:
 Silicon Wafer Preparation
 Ion Implantation
 Diffusion
 Photolithography
 Oxidation
 Chemical-Vapor Deposition
 Metallization
  Packaging

Silicon Wafer Preparation

Silicon Wafer Preparation is the first step of IC Fabrication and usually silicon is used in Integrated Circuits Fabrication
Process . Wafer is the base of the Integrated Circuits -which is thin, round shaped with varying diameter . The material used
in this making is pure crystalline silicon . Some wafers have irregular – shape, surface , extra edges so in order to make it at
a particular thickness the shaping , polishing and cutting is done .

Ion Implantation
Ion Implantation is the process to implant the impurities in the silicon wafer . The ions get penetrated to the wafer which
depends on the accelerating field voltage . This process is performed at low temperature so that it can be maintained at room
temperature and at high energy , but sometimes the high energy distort the structure of solid . High energy dopant ions are
used to penetrate on the surface of the solid and it is the controllable process which is able to change the properties of the
solid.

Diffusion
Diffusion is the process of adding impurities to the silicon from high concentration region to low concentration region. The
impurities or we can say the dopants added to the silicon changes the resistivity of the silicon. Dopants used can be of any
state- solid , liquid or gas. This process is carried out at high temperature(around 1000 degree Celsius) in furnaces so we can
say that it is very much temperature dependent. Pentavalent or n type impurity are preferred as dopants . This process is not
performed at last stages because number of layers are formed initially so high temperature it is not able to resist.

Photolithography

Photolithography is the process of producing the film with the help of light , the type of light used is of different
frequencies- X ray light , UV light and most probably the UV light is used . The incident of light takes place directly or
through the lens. Photoresist is the sensitive material which forms the first layer over the surface of wafer and above the
photoresist layer a mask pattern is formed.
The pattern is formed and some are is left exposed and on that exposed area UV light falls and breaks the photoresist layer
and soften part of the layer gets removed . Photolithography is very efficient method to form patterns but not on the irregular
surface.

Oxidation
Basically , Oxidation is the process of addition of oxygen and in this context the addition of oxygen and silicon forms silicon
dioxide which forms in furnaces at higher temperature (around 1000 degree Celsius). Silicon dioxide is hard protective
coating that is why it is used . Oxidation is of two types : Dry oxidation and Wet oxidation . Both types are good in its own
way .
In dry oxidation no water vapour is used so the produced oxide is good and has less defects . Its rate of oxidation is less than
that of wet oxidation , but dry oxidation has good electrical properties . On the other hand , wet oxidation is fast because of
presence of water vapour the rate of reaction gets fast. Oxidation process is the important part of the fabrication process of
any device or component .

Chemical-Vapor Deposition
CVD method is used in the production of thin films , on the surface of wafer the chemicals and vapours are reacted and form
solid , so the layers on the solid get deposited using CVD process. So a high quality solid material is produced and this
process is carried out at low pressure , almost lower than the atmospheric pressure and this all depends on the reaction of the
process. It is totally different from VCD method . This method has faster deposition rate and acts as an insulator on the
surface of wafer.
Metallization
Metallization is the process of coating of metallic layer on the metal and non metallic surface in order to protect the surface
from the external environmental factors . This method is also used to connect different components like capacitor , transistor
, etc. and the metal layer is form on the wafer then the mask pattern is formed above the layer .It has good conductivity and
makes good bond with silicon.

Packaging
Packaging is the last process of IC Fabrication process , in which the silicon wafer is tested electrically that how it is
working , either working or not .This method is cost effective because for checking purpose of the wafer , machines includes
microwave and radio frequency testing. the circuits which are having any defect are separated from them and the circuits
which are proper and good are send for further process or to header .This method also assembles ICs with the other devices
and makes a product which can be suitable to use t the end.
The packaging is sealed with plastic so that it can be protected from the external environmental factors and prevent it from
oxygen to get inside the packaging so it is performed in the vacuum.