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Lab2_Addition_Subtraction_Circuit

Uploaded by

andrew.ng2210
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Ho Chi Minh City University of Technology

Institute of International Education

Lab 02: Addition and Subtraction Binary Circuit


Date: December 6, 2024; Duration: 225 minutes

Subject: Practice: Computer Architecture (ID: COS139)


Instructor: Dr. Hieu Nguyen

I) Prelab
This lab focuses on creating schematics and simulating the following four
circuits:

1. Half Adder
2. Full Adder
3. 4-bit Unsigned Adder
4. 4-bit Signed Add/Subtract Circuit

Below are their circuits and truth tables:


1) Half Adder
2) Full Adder

3) 4-bit Unsigned Adder


4) 4-bit Signed Add/Subtract Circuit
II) Quick Instructions
This instruction will show you how to perform the half adder.
- File | New | New Quartus Prime Project

- Choose the working folder, name the project then → Finish


- File | New | Block Diagram/Schematic File
- Click Text Tool (A) to write Your name, Class Number, and which
circuit you are drawing

- Click Symbol Tool and select appropriate gates, input and output pins

- Rename the pin approariate


- Click Orthogonal Node Tool to connect the pin

- Ctrl+S to save the bdf file → Save


- Assigments | Device, select Cyclone V, 5CGXFC7C7F23C8

- Processing | Start Compilation, make sure no error


- File | New | University Program VWF

- Simulation Waveform Editor dialog will pop up

- Edit | Insert | Insert Node or Bus…

- Insert Node or Bus dialog will pop up, make sure the Radix is Binary
- Click Node Finder, Node Finder dialog will pop up
- Click List

- Hold Ctrl to select All input output pins

- Click symbol > to copy to Selected Nodes

- Click OK | Click OK

- Simulation Waveform Editor dialog with waveforms will pop up


- Make sure Quartus is linked to ModelSim
- Tools | Options | General | EDA Tool Options | ModelSim
- Check Path: C:/intelFPGA/18.1/modelsim_ase/win32aloem

- Edit | Grid size… | 100ns | OK

- Select pin_A, then use left mouse to select and drag the 2 period 0-
100, 100-200

- Double click and set the “numeric or named value” as 0

- Drag 200 – 400, double click and set “numeric or named value” as 1
- Waveform will become 0 0 1 1 for period 0 - 400ns as pin A in truth
table

- Continue with 0 1 0 1 for pin B

- Ctrl+S to save the waveform (.vwf)


- Simulation | HDL Language | VHDL | Save
- Simulation | Run Functional Simulation

- Make sure there is no error in the “Simulation Flow Process”

- The complete Simulation Waveform Editor with complete output


waveforms will pop up
- Check the waveform with the Half Adder Truth Table

III) In-Class Practice

- Save your schematic and screenshot the timming


diagram to your WORD file
- Perform Full Adder, 4-bit unsigned Adder, and 4-bit
signed Add/Subtract circuit
- Provide 2 binary addition number for 4-bit unsigned
Adder and explain
- Provide 2 binary addition number, and 2 binary
substraction number for 4-bit signed Add/Subtract
Circuit and explain

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