2282 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO.

4, DECEMBER 2023

A Two-Stage Module Based Cell-to-Cell Active

Balancing Circuit for Series Connected
Lithium-Ion Battery Packs
Kenguru Manjunath , Student Member, IEEE, R Kalpana , Senior Member, IEEE, Bhim Singh , Fellow, IEEE,
and Kiran R , Student Member, IEEE

Abstract—This article addresses a two-stage module based cell- to its electrochemical limits, which is insufficient to fulfill the
to-cell active equalization topology based on a modified buck-boost high voltage requirements of electric vehicle. Therefore, a large
converter for series connected Lithium-ion battery packs. In the number of lithium-ion cells are need to be connected in series and
proposed topology, initially module based equalizing currents are
controlled. Subsequently, cell-based equalizers are controlled in parallel to provide the battery voltage and power requirements.
parallel within each battery module. The proposed topology signif- The electric properties of cell in the battery pack can change
icantly reduces the balancing time by transferring higher balancing due to the manufacturing and environmental variations, which
current from a strong cell to the weakest cell in a module directly. leads to voltage mismatches between the cells while the battery
With the proposed topology’s modularized design, reduces voltage
pack is in charging or discharging state. Due to these specific
stress on long strings of switches, resulting in improved perfor-
mance with fewer components. The operating principle, control cells, they may be overcharged or depleted, that reduces usable
strategy and design constraints are analyzed in detail. The MAT- battery capacity and lifetime. Thus, the battery pack must be
LAB/Simulink platform is utilized to demonstrate the feasibility of provided with a reliable cell balancing system to reduce the cell
the proposed technique for balancing the energy in series connected voltage mismatches and to enhance system performance.
battery cells. To reduce the complexity of the control approach, The state-of-charge (SoC) and cells’ terminal voltage are two
the digital control is implemented using an FPGA control board.
Further, a laboratory prototype is developed to show the feasibility often utilized indices for cell balancing. Since, the cells’ SoC and
and operability of the proposed topology. open-circuit voltage (OCV) have a known relationship, they can
provide the same balancing effect [2].
Index Terms—Active cell balancing topology, buck-boost
converter, balancing speed, lithium-ion batteries. Moreover, obtaining the precise SoC of each individual cell is
quite difficult. Consequently, cell voltage balancing can be used
I. INTRODUCTION instead of cell SoC balancing for lithium-ion batteries.
ITHIUM-ION batteries are extensively used in various There are two types of balancing methods: passive and active.
L applications from electric vehicles to smart grid, due to
their high power density, high energy density, low self-discharge
A resistor is generally used in parallel with each cell in passive
techniques. The main drawback of the passive techniques, is that
rate, compact structure, higher safety, and no memory effect. The the overcharged cell’s extra energy is dissipated as heat by the
battery pack voltage in electric vehicle applications generally resistor. The passive cell balancing circuit is mainly employed
varies from 48V to 400V [1]. However, single lithium-ion battery in low power applications due to its low cost and easy control.
cell can only deliver voltage in between 2.5 V to 4.2 V due To overcome the drawbacks of passive cell balancing circuits,
the active methods are used to balance the charge between
cells using active components such as inductors, transformers,
Manuscript received 25 May 2022; revised 25 September 2022, 28 December
2022, and 22 March 2023; accepted 12 May 2023. Date of publication 6 June capacitors and combination of inductors and capacitors.
2023; date of current version 28 November 2023. This work was supported in Regarding the Lithium-ion cell energy transfer, active cell
part by the SERB NSC Fellowship and in part the DST-SERB, Govt. of India balancing topologies can be predominantly categorized as cell-
under Grant EEQ/2022/001003. Paper no. TEC-00533-2022. (Corresponding
author: Kenguru Manjunath.) to-pack (C2P) [3], [4], pack-to-cell (P2C) [5], [6], direct cell-to-
Kenguru Manjunath is with the Electrical and Electronics Engineering, cell (DC2C) [7], [8], [9], [10], [11], [12], adjacent cell-to-cell
National Institute of Technology Karnataka, Surathkal 575025, India (e-mail: (AC2C) [13], [14], [15] and any cell-to-any cell (AC2AC) [16],
[email protected]).
R Kalpana is with the Department of Electrical Engineering, Na- [17], [18].
tional Institute of Technology Karnataka, Mangaluru 575025, India (e-mail: In the C2P type, the charge is transferred from the highly
[email protected]). charged cell to the pack, and this method is suitable for balancing
Bhim Singh is with the Electrical Engineering, Indian Institute of Technology,
New Delhi 110016, India (e-mail: [email protected]). the cells while the battery is being charged. The P2C method can
Kiran R is with the National Institute of Technology Karnataka, Surathkal transfer charge from the pack to low charged cell; this method
575025, India (e-mail: [email protected]). is suited for balancing the cells during the battery discharge.
Color versions of one or more figures in this article are available at
https://doi.org/10.1109/TEC.2023.3283424. The cell balancing speed can be improved to some extent by
Digital Object Identifier 10.1109/TEC.2023.3283424 these methods. However, these methods cannot achieve direct

© 2023 The Authors. This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see
https://creativecommons.org/licenses/by/4.0/
MANJUNATH et al.: TWO-STAGE MODULE BASED CELL-TO-CELL ACTIVE BALANCING CIRCUIT FOR SERIES 2283

charge transfer between unbalanced cells, which leads to a lower circuit is presented in [25], where the cell equalization time is
balancing efficiency. more, although the zero-voltage switching technique is used.
In the direct C2C type, charge can be transferred from a However, the above discussed topologies are difficult to apply
highly charged cell to a low charged cell while the battery is for a long battery string. Hence, to overcome these difficulties,
in charging or discharging condition. However, these circuits modularization technique is used. In this technique, a long series
can simultaneously process only one healthy and one weak cell, battery string is divided into several modules, each containing
resulting in a lower cell balancing speed for a long series cell the same number of series cells. To attain equalization between
string. The multi-winding transformer balancing circuit [7], LC modules, requires two transformers for the circuits presented
series resonant circuit [8] and balancing circuit with a single in [26], [27]. In [3], each module has its transformer though it
inductor [9] can transfer energy directly from C2C. However, in can balance some cells in the module. Multiple cell equalization
[7], the circuit is limited in terms of windings, complicated and is achieved simultaneously in [28], but each module requires a
expensive. In [8], the balancing current is proportional to the multi-winding transformer. Nevertheless, the equalization sys-
difference in voltage between the unbalanced cells. Despite the tem must include active switches and transformers due to mod-
small difference in voltage between the cells, it requires more ularization. Therefore, the equalization system is to be bulky,
cell equalization time and it has more complexity in control heavy, and expensive. In addition, the additional components
algorithm. In [9], the balancing circuit requires more switches reduce the efficiency of the system.
and diodes to combine unbalanced cells with an inductor. In the To overcome the limitations in the above-mentioned literature
AC2C type, charge can only be transferred between two adjacent and to aid in enhancing the balancing speed with fewer compo-
cells [13], [14], [15]. Switched capacitors and Bidirectional nents, this article addresses an active cell balancing topology
buck-boost based equalizers are good choices for the AC2C type. based on the modified buck-boost converter.
In [13], a single equalization unit is shared by neighbouring The following are salient features of the proposed topology
two cells. Each equalization unit has an identical structure, and over the conventional methods.
charge can flow efficiently from one cell to another cell in either 1) The conventional circuit can target only one cell at a
way. The main drawback of this topology is that the balancing time. Whereas, the proposed circuit can target two cells
speed decreases with an increase in the number of cells. simultaneously. Thus, the balancing speed is increased.
Most of the topologies mentioned above can simultane- 2) Detecting and balancing low charge cells, becomes easier
ously balance one or maximum of two cells. To overcome with proposed module based cell balancing circuit.
this problem, AC2AC balancing method is used, which can 3) In the proposed active cell balancing topology, equaliza-
balance many cells at a time. The AC2AC balancing circuits are tion is not only confined among the cells, but it is also
mainly categorized into three types: multi winding transformers feasible between two unbalanced modules simultaneously.
[16], switched capacitors [17] and individual balancing units 4) Modularized cells of the proposed circuit can signifi-
[18], [19], [20], [21]. In the multi-winding transformer-based cantly reduce the voltage stress on the switches. More-
method, each cell requires an individual winding. Since, the over, it improves the system performance with fewer
transformer-based circuits are limited in windings, it is impossi- components.
ble to practically design and implement the transformer with ‘N’ The rest of this article is organized as follows. The circuit
number of windings. In the switched capacitor-based method, structure, operational principles and control strategy of the pro-
the balancing speed increases with an increase in switching posed topology are described in Section II. Section III describes
frequency, but its efficiency decreases accordingly. The individ- the design parameter calculations. Simulation and experimental
ual balancing unit method can achieve better balancing perfor- results are presented in Section IV. Comparison of the proposed
mance, but it has complex control circuit and increased circuit topology with conventional topologies is provided in Sections V
size. and VI concludes this article.
Multiple equalization mode based circuit is presented in [22],
which can balance the cells in a unit-to-unit and middle-to-sides II. PROPOSED ACTIVE CELL BALANCING TOPOLOGY
modes. However, it is difficult to achieve a balance between the
The circuit structure, operating principle and control strategy
non-adjacent cells due to the lack of direct charge transfer paths.
of the proposed topology is discussed in this section.
A multiphase interleaved converter is presented for transferring
charge from AC2AC [23]. The large volume of the inductor
is the main drawback of the circuit, which directly affects the A. Circuit Structure
converter parameters, including maximum current, switching The conventional one-stage cell balancing circuit based on a
frequency, and nominal DC bus voltage. The analysis of an buck-boost converter is shown in Fig. 1(a). This circuit consists
active charge balancing topology based on a single non-isolated of three series connected battery cells (C1 , C2 & C3 ), two induc-
DC/DC converter is presented in [24]. Due to increased number tors (L1 & L2 ) and four switches (S1 , S2 , S3 & S4 ) along with
of cells connected in series, the total estimated efficiency and body diodes. Similarly, the conventional two-stage cell balanc-
converter power rating are reduced proportionally. Hence, this ing circuit based on a buck-boost converter is shown in Fig. 1(b),
approach is only suitable for low voltage applications. Fur- which is composed of eight inductors (L1 , L2 . . . L6 , Lm1 &
thermore, to increase the efficiency of the balancing circuit, a Lm2 ) and fourteen switches (S1 , S2 , … S11 , Sm1 , Sm2 & Sm3 )
continuous conduction mode based buck-boost cell balancing along with body diodes.
2284 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO. 4, DECEMBER 2023

Fig. 1. Conventional cell equalization circuit, (a) one-stage buck-boost topol-

ogy, (b) two-stage cell equalization circuit.

Fig. 3. Operational principle of module balancing, (a) Sm1 operating, (b) Sm2
operating, (c) key waveforms in discontinuous current mode of operation.

Fig. 2. (a) Cell equalization circuit, (b) proposed two-stage cell equalization
circuit. the exact SoC of each cell is highly challenging. However,
the SoC is proportional to the battery’s OCV. Therefore, the
equalizer in the proposed cell balancing topology determines
Fig. 2 shows the proposed active cell balancing topology the operating modes and switching patterns based on the voltage
composed of two stages of balancing circuits. Fig. 2(a) shows difference of the cells.
a second stage of the balancing circuit, which contain three 1) First Stage (Module Balancing): The module balancing
cells, two inductors (L1 & L2 ) and four switches (S1 , S2 , S3 & operates on the principle of buck-boost converter topology. The
S4 ), to form single cell equalization unit. In contrast, the first source and target modules are decided by the module depending
stage structure is similar to the buck-boost converter topology. on the level of voltages. Fig. 3 shows that by controlling the
The complete structure of the proposed two-stage balancing switches Sm1 and Sm2 , energy can be transferred from source
topology, where six cells are connected in series, is composed module to the target module by monitoring the voltages of two
of five inductors (L1 , L2 , L3 , L4 & Lm ) and ten switches adjacent battery modules.
(S1 , S2 , …S8 , Sm1 & Sm2 ) along with body diodes shown in In the module balancing, switches Sm1 and Sm2 are turned
Fig. 2(b). on and off in a complementary manner. Let us consider the VM 1
From conventional topology shown in Fig. 1(a), the energy and VM 2 are the voltages of the module 1(M1 ) and module
can be transferred from C1 to C3 via C2 only; it includes 2 (M2 ) respectively, iM 1 & iM 2 are the module currents,
two inductors L1 and L2 . Whereas, in the proposed topology Lm is the inductor and i+ −
Lm and iLm are the charging and
shown in Fig. 2(a), energy can be transferred directly from discharging currents of the inductor, respectively. Fig. 3 shows
cell C1 to C3 through the inductors L1 or L2 , improving the when Sm1 operational circuit and its corresponding waveforms
system’s flexibility. Thus, the cell balancing speed is high, and of iLm , iM 1 & iM 2 .
power losses decrease in the proposed cell balancing topology. Case 1: (VM 1 > VM 2 )
Moreover, the proposed two-stage active balancing topology Mode 1 [t0 -t1 ]: It is assumed that module M1 as the source
requires only five inductors and ten switches to meet the same module and M2 as target module. Thus, the voltage from module
current limit. Conversely, the conventional two-stage balancing M1 is applied to the inductor Lm , when Sm1 is turned on as
circuit requires eight inductors and fourteen switches, which shown in Fig. 3(a).
increases the circuit complexity and the number of components. The inductor current iLm increases linearly from zero during
this period, whereas the electric energy is converted into mag-
B. Operational Principle netic energy, which is stored in the inductor Lm . The source
module M1 , discharge current iM 1 also rises linearly from
A battery pack with six cells, is considered to demonstrate zero. As a result, the excess energy of the source module M1
the operational principle of the proposed active cell balancing is transferred to Lm . The charging current of inductor Lm is
topology, with each module containing three cells. The proposed expressed as,
cell balancing topology has two stages of equalization circuits
such as module balancing and cell balancing. SoC equalization is VM 1
one of the techniques for balancing a battery pack but obtaining i+
Lm = (t1 − t0 ) = iM 1 (1)
Lm
MANJUNATH et al.: TWO-STAGE MODULE BASED CELL-TO-CELL ACTIVE BALANCING CIRCUIT FOR SERIES 2285

Mode 2 [t1 -t2 ]: Since, iLm cannot change abruptly when Sm1
is turned off, the body diode of Sm2 offers a freewheeling path
for iLm . Consequently, at this period, the body diode conducts
before the switch Sm2 conducts, and the inductor Lm is paral-
leled with target module M2 via Sm2 , as shown in Fig. 3(b).
Hence, the inductor’s polarity is flipped, and iLm drops linearly
when Sm2 is turned on. The discharging current of the inductor
Lm is expressed as,
VM 1 VM 2
i−
Lm = t1 − (t2 − t1 ) = iM 2 (2)
Lm Lm
The inductor’s magnetic energy is converted to electric energy
and delivered to the target module M2 . These two periods make
up one switching cycle as shown in Fig. 3(c).
Mode 3 [t2 -t3 ]: Mode 3 begins at t = t2 , when the inductor
current returns to zero. In mode 3, as the circuit operates in
discontinuous conduction mode (DCM) both the switches are
turned off. Similarly, in case 2, by controlling switch Sm2 ,
energy can be transmitted from M2 to M1 .
2) Second Stage (Cell Balancing): Unlike module balanc-
ing, the balancing process occurs between the three cells and
achieves the balance in the second stage. In this stage, two types
of energy transfer scenarios are possible between the cells.
a) Charge transfer between adjacent cells: In this sce-
nario, the charge is transferred from source cells to the tar-
get cells directly in one step. The working principle of pro-
posed cell balancing circuit is divided into four different cases.
Fig. 4(a)–(h) show the operational principle for the four cases.
Case 1: VC1 > VC2 & VC3 , Case2: VC2 & VC3 > VC1 , Case3:
VC1 & VC2 > VC3 and Case 4: VC3 > VC1 & VC2 .
Considering VC1 , VC2 & VC3 are the voltages of the cells C1 ,
C2 & C3 , respectively, L1 and L2 are the inductors, iL1 and iL2
are the inductor currents. By comparing the three cell voltages,
analyse of the circuit is carried out as follows.
Case 1: ( VC1 > VC2 & VC3 )
The source and target cells are decided by the cell with higher
and lower voltages, respectively. This case is operated under
DCM, and it has three modes. The key waveforms of current
during charging and discharging conditions of the inductor L1 ,
cell currents (iC1 , iC2 & iC3 ), switch voltages (VDS1 & VDS2 )
and inductor voltages (VL1 & VL2 ) are presented in Fig. 5(a). Fig. 4. Operational principle of the proposed cell balancing circuit:
(a), (b): Case 1 (VC1 > VC2 & VC3 ). (c), (d): Case 2 (VC2 & VC3 > VC1 ).
Mode 1 [t0 -t1 ]: When S1 is turned on at t = t0 , the cell (e), (f): Case 3 (VC1 & VC2 > VC3 ). (g), (h): Case 4 (VC3 > VC1 & VC2 ).
C1 starts discharging and excess energy of C1 is stored in the
inductor L1 in the form of magnetic energy. Subsequently, C1 ,
S1 and L1 form a loop and the balancing current builds up with discharging current of the inductor L1 is expressed as,
the direction shown in Fig. 4(a). The charging current of the
VC1 (VC2 + VC3 )
inductor L1 is expressed as, i−
L1 = t1 − (t2 − t1 ) (5)
L1 L1
VC1
i+
L1 = (t1 − t0 ) (3) Mode 3 [t2 -t3 ]: Mode 3 begins at t = t2 when the inductor
L1
current returns to zero. In this mode, both the switches are
at t = t1 , the current in the inductor L1 reaches its maximum
turned off as circuit operates in the DCM of operation. The total
value:
balancing current of the inductor L1 for a period of (t0 − t3 ) is
VC1 expressed as,
iL1 max = t1 (4)
L1 ⎧ VC1
Mode 2 [t1 -t2 ]: When S1 is turned off at t = t1 and the loop ⎨ L1 (t1 − t0 ) ,
⎪ t0 ≤ t < t1
V (V +V )
L1 , C2 , C3 and D2 is formed as shown in Fig. 4(b), during this iL1 = L t1 −
C1 C2 C3
(t2 − t1 ) , t1 ≤ t < t2 (6)
⎪
⎩ 1
L1
period the energy is transferred from L1 to C2 & C3 , and the 0, t2 ≤ t < t3
2286 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO. 4, DECEMBER 2023

Fig. 5. Key waveforms of the proposed cell balancing topology (a) Case 1 (VC1 > VC2 & VC3 ), (b) Case 2 (VC2 & VC3 > VC1 ), (c) Case 3 (VC1 & VC2 >
VC3 ), (d) Case 4 (VC3 > VC1 & VC2 ).

TABLE I
OPERATING MODES OF PROPOSED MODULE BASED CELL BALANCING FOR CASE 1, CASE 2, CASE 3 AND CASE 4

Similarly, the inductor currents (iL1 & iL2 ), cell currents second step. Therefore, the charge is transferred from a source
(iC1 , iC2 & iC3 ), switch voltages (VDS1 , VDS2 , VDS3 cell to the target cell in two steps.
& VDS4 ) and inductor voltages (VL1 , VL2 ) for case 2, case For the analysis, it is assumed that the source cell is C2 , and
3 and case 4 are given in Table I and the correspond- the target cells are C1 and C3 in case 5 (VC2 > VC1 &VC3 ). The
ing key waveforms are presented in Fig. 5(b), (c) and (d), charge can transfer from the source cell to either of the cells C3
respectively. or C1 in the first step, thus the cells C1 or C3 can be considered
b) Charge transfer between non-adjacent cells: In this as intermediate cells. In the next step, the charge is transferred
scenario, the charge transfer from a source cell to the target cell from either of the cells C2 and C3 to cell C1 or C1 and C2 to C3 ,
cannot be transferred directly in one step due to inappropriate depending upon the switching operation, same as in case 2 and
direct energy transfer paths. However, the first step transfers case 3. The proposed cell balancing circuit’s operating principle
charge from a source cell to an adjacent cell. Subsequently, the for case 5 is explained as follows.
charge is transferred from the adjacent cell to the target cell in the Case 5: ( VC2 > VC1 &VC3 )
MANJUNATH et al.: TWO-STAGE MODULE BASED CELL-TO-CELL ACTIVE BALANCING CIRCUIT FOR SERIES 2287

Fig. 7. Key waveforms of the proposed cell balancing topology (a) Case 5
(VC2 > VC1 & VC3 ), (b) Case 6 (VC1 & VC3 > VC2 ).

Mode 3 ( t2 − t3 ): After the first step ends, the cells C1 and

C2 having higher charge than C3 . Thus, mode 3 starts when S3
is turned on at t = t2 as shown in Fig. 6(c), and excess energy
of C1 and C2 is stored in the inductor L2 .
Mode 4 ( t3 − t4 ): Mode 4 starts when S3 is turned off at
t = t3 as illustrated in Fig. 6(d), and the loop is formed with
L2 , C3 and D4 , during this period, the charge is transferred
from L2 to C3 , which means that the charge is transferred from
a highly charged cell, i.e., C2 to the target cell C3 .
Case 6: ( VC1 &VC3 > VC2 )
If VC1 & VC3 > VC2 , to discharge highly charged cells
VC1 &VC3 , switches S1 and S4 are turned on and off in a com-
plementary manner. Fig. 6(e)–(h) show the operating principle
for the case 6 and the key waveforms are shown in Fig. 7(b).
Mode 1 ( t0 − t1 ): In first step, when S1 is turned on at
t = t0 as shown in Fig. 6(e), the highly charged cell C1 starts
Fig. 6. Operational principle of the proposed cell balancing circuit: (a)–(d)
Case 5 and (e)–(h) Case 6. discharging, and excess energy of C1 is stored in the inductor
L1 . Subsequently, C1 , S1 and L1 form a closed circuit, and the
balancing current (iL1 ) builds up in the inductor L1 .
If VC2 > VC1 & VC3 , to discharge highly charged cell i.e., C2 , Mode 2 ( t1 − t2 ): When S1 is turned off at t = t1 as shown
switches S2 and S3 are turned on and off in a complementary in Fig. 6(f), and the loop with L1 , C2 , C3 and D2 is formed,
manner. Fig. 6(a)–(d) show the operating principle for the case during this period, the energy is transferred from L1 to C2 &C3
5 and the corresponding key waveforms are shown in Fig 7(a). which means that the energy is transferred from a highly charged
Mode 1 ( t0 − t1 ): In first step, when S2 is turned on at cell C1 to an adjacent cells C2 &C3 .
t = t0 as shown in Fig. 6(a), the highly charged cell C2 starts Mode 3 ( t2 − t3 ): After the first step ends, the cells C3
discharging, and excess energy of C2 is stored in the inductor having higher energy than C1 &C2 . Thus, mode 3 starts when
L1 . Subsequently, C2 , C3 , S2 and L1 form a closed circuit, and S4 is turned on at t = t2 as shown in Fig. 6(g), and excess
the balancing current (iL1 ) builds up in the inductor L1 . energy of C3 stored in inductor L2 . Subsequently, C3 , S4 and
Mode 2 ( t1 − t2 ): When switch S2 is turned off at t = t1 L2 form a closed circuit, and the balancing current (iL2 ) builds
as illustrated in Fig. 6(b), and the loop with L1 , D1 and C1 is up in the inductor L2 .
formed, during this period, the charge is transferred from L1 to Mode 4 ( t3 − t4 ): Mode 4 starts when S4 is turned off at
C1 , which means that the charge is transferred from a highly t = t3 as illustrated in Fig. 6(h), and the loop with L2 , D3 , C1
charged cell C2 to an adjacent cell C1 . and C2 is formed, during this period, the charge is transferred
2288 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO. 4, DECEMBER 2023

TABLE II
OPERATING MODES OF PROPOSED MODULE BASED CELL BALANCING FOR CASE 5 AND CASE 6

the VOC of each cell is estimated. The main aim is to equalize

each cell VOC . Thus, the difference of reference voltage Vt
and ΔV is considered as the error signal, the error signal is
generated only when the ΔV is greater than the predefined
threshold voltage value Vt .
The error signal represented as,

err = Vt − ΔV (7)

P I = err KP + KI err dt (8)

To eliminate stability difficulties and improve steady-state

error, the error signal is sent through a PI controller block. The
output signal of the PI controller is fed to the FPGA controller
board, which is composed of a data processor, digital controller
and PWM generator. Based on the control signal from the PI
controller, gate signals are generated, which are provided to
the isolated gate driver to operate the cell balancing circuit.
The equalizer can be switched off to save power and the error
integration can be reset after complete equalization has been
achieved, i.e., error signals are extremely near to zero.
This proposed module based cell balancing circuit utilizes the
constant current and constant voltage (CC/CV) charging mode
to charge the cell. The cell is charged with the constant current
source in CC mode until the cell voltage reaches rated value.
The cell is charged with constant voltage and decreasing current
in CV mode until the current exceeds the specified level. The
constant current discharging method is used to discharge the
cell.

III. DESIGN PARAMETERS

Fig. 8. (a) Control strategy for the proposed topology, (b) CC/CV modes for
cell charging, controller for cell discharging, (c) comparator and its operational The inductor design, OCV estimation and measurement of
table, S1 = 1(closed), S1 = 0(open). battery internal resistance & temperature are discussed in this
section.

from L2 to C2 , which means that the charge is transferred from A. Inductor Design
a highly charged cell, i.e., C3 to the target cell C2 .The operating
modes of case 5 and case 6 are given in Table II. To avoid the magnetization effect of the inductor, the inductor
saturation current must be configured higher than the maximum
C. Control Strategy inductor peak current. Thus, the inductor is determined by the
following expression,
A control scheme is developed to analyse the operation of
equalization, as shown in Fig. 8. The controller detects the V D 2 Ts
Li = (9)
cell terminal voltages. Based on the identified terminal voltage, 2 ILi,avg
MANJUNATH et al.: TWO-STAGE MODULE BASED CELL-TO-CELL ACTIVE BALANCING CIRCUIT FOR SERIES 2289

Where i = 1 & 2, V is the cell voltage, D is the duty cycle,

Ts is switching time and ILi, avg is the average inductor current.
By considering the terminal voltages of source and target cells
VCSource and VCT arget , respectively, D is the duty cycle, Li is
the inductor where i = 1&2 and Ts is switching time, the
condition to ensure the DCM buck-boost operation in [11] is,
 
VCSource VCT arget
DTs − (Ts − DTs ) < 0 (10)
Li Li
VCT arget
D= (11) Fig. 9. Equivalent circuit for Li-ion battery (a) thevenin model, (b) simplified
VCSource + VCT arget battery model.
During normal operating conditions, the open-circuit voltage
of a battery varies from 2.5 V to 4.2 V. Using this voltage, the
value of duty cycle is computed as follows,
D1 & D4 ≤ 0.66
(12)
D2 & D3 ≤ 0.33
By considering the battery with a capacity of 2 Ampere-hour
at a 3C rate, it is required to manage equalizing inductor current
below 6A. 10 kHz switching frequency is considered for the
designing of the circuit parameters.
Similarly, for module balancing, the duty cycle (Dm ) of Sm1 Fig. 10. (a) Typical voltage & current response curves with pulse charge during
req measurement, (b) equivalent internal resistance profiles of lithium-ion
and Sm2 is considered as, batteries.
Dm ≤ 0.5 (13)
From (1) and (3) the expressions of balancing inductors for When the battery is charged continuously with the constant
the first and second stages are as follows: current source. A step pulse current(ICP ) is applied to the
VM 1 battery when the measurement begins. The corresponding RC
Lm = Dm Ts = 4/6 (0.5) (0.0001) = 33.33µH (14)
i+
Lm
network impedance of the Thevenin model can be neglected
when compared to the internal resistance. From Fig. 10(a), it can
VC1
L 1 = L2 = D1 Ts = 4/3 (0.66) (0.0001) = 88µH observe that the initial voltage variations are due to the voltage
i+
L1 drop of internal resistance in a short period.
(15) Therefore, the difference between terminal voltage (ΔVn ) and
pulse charging current (ΔICP ) of the battery can be used to
Therefore L1 &L2 are considered as 100 µH and Lm is 50 µH. calculate the equivalent internal resistance (req ).
B. OCV Estimation ΔVn
req = (17)
There is usually a discrepancy between the OCV and terminal ΔIcp
voltage (Vn ) of the battery during the equalization process due to The typical equivalent resistance characteristics of NCR
inconsistency between diffusion characteristics and the battery’s 18650 lithium-ion batteries are presented in [29]. The responses
internal resistance. The accuracy of equalization assessment is of req versus battery OCV are presented in Fig. 10(b), indicating
governed by the voltage drop due to battery’s internal resistance. that the variation of req throughout the entire OCV range is
Fig. 9 shows the commonly used battery model. The OCV is substantially less than the average value. Hence, the average req
represented with DC voltage source. The RC network (rp and is used to calculate the OCV of each cell in the proposed cell
cp ) represents the polarization resistance, capacitance and (ri ) balancing topology to simplify the control algorithm. By com-
represents the ohmic resistance. The battery req can be deter- pensating the voltage drop due to req , the OCV parameter can be
mined using the simplified battery model depicted in Fig. 9(b). estimated precisely. This enhances the precision of equalization
judgment.
C. Measurement of Battery Internal Resistance & Temperature The typical acceptable temperature region for Lithium-ion
batteries, is −20 °C to +60 °C. Both low and high temperatures
As shown in Fig. 9(a), req contains the equivalent impedance
outside of this region lead to degradation of performance and ir-
of the RC network and ri. When (−icn ) and (icn ) are the
reversible damages, such as lithium plating and thermal runaway
charging and discharging currents of battery respectively, the
that leads to energy loss of battery.
estimated OCV of the battery while charging and discharging is
The charging should take place only at a battery temperature of
expressed as,
+5 °C to +45 °C for minimum energy loss. During experiments,
Voc = Vn ± icn req (16) various temperature readings are taken for both charging and
2290 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO. 4, DECEMBER 2023

during the turned-on period of Sm1 , as illustrated in Fig. 3(a).

Fig. 12(a) and (c) illustrate simulated and experimental wave-
forms of the module balancing current (i+ Lm = iM 1 ), that is
stored in the inductor Lm during turn-on period of Sm1 . It flows
into target module M2 i.e., (i− Lm = iM 2 ), through body diode
of Sm2 during turn-off period of Sm1 , as shown in Fig. 3(b).
These results validate (1) and (2) and theoretical waveforms
of Fig. 3(c). It is considered module balancing is verified by
Fig. 11. Typical temperature response curves of Li-ion cell during equalization the positive current (discharging) of the source module (iM 1 )
(a) cell-to-cell, (b) module-to-module. and the negative current (charging) of the target module (iM 2 ).
Moreover, the lower voltage module (M2 ) receives more current.
TABLE III It can be observed that the average current of module 2 is greater
EXPERIMENTAL PARAMETERS than module 1, that expedites the balancing speed.
Fig. 12(b) and (d) illustrate the simulated and experimental
waveforms of drain to source voltage of the switches Sm1 and
Sm2 is restricted to 10 V in a steady state, and the switch voltage
spike is limited to 12 V with proper snubber circuit design. It
is evident that the proposed balancing circuit has significant
characteristics, such as low voltage stress across the switches.
2) Case 2. (VM 2 > VM 1 ): Fig. 12(e)–(h) show the current
and voltage waveforms of the proposed module balancing circuit
for case 2, where M2 is the source module, i.e., VM 2 = 11.9
V with C4 = 4.1 V, C5 = 3.95 V, C6 = 3.85 V, and M1 is the
discharging of each cell. It can be illustrated from the graphs target module, i.e., VM 1 = 11.45 V with C1 = 3.75 V, C2 =
that during both cell to cell Fig. 11(a) and module to module 3.8V, C3 = 3.9 V.
Fig. 11(b). It is found that the temperature varies between max- Since VM 2 is greater than VM 1 , the switch Sm2 should be
imum of 25 °C to 28 °C, which is normal during the operation turned on. Therefore, the energy is transferred from the source
and it can be considered that energy loss is minimum. module (M2 ) to the inductor (Lm ) during the turned-on period
of Sm2 . Fig. 12(e) and (g) illustrate simulated and experimental
IV. SIMULATION AND EXPERIMENTAL VALIDATION waveforms of the module balancing current (i+ Lm = iM 2 ), that is
stored in the inductor Lm during turn-on period of Sm2 . It flows
In order to prove the theoretical analysis of the proposed
into target module M1 i.e., (i− Lm = iM 1 ), through body diode
topology, simulation and laboratory prototype are implemented.
of Sm1 during turn-off period of Sm2 . Fig. 12(f) and (h) show
Figs. 12–15 present the simulation and experimental waveforms
the simulated and experimental waveforms of drain to source
of all the six operating cases, respectively. Figs. 16–18 show
voltage of the switches Sm2 and Sm1 , respectively.
the experimental results of equalization process. A laboratory
prototype for the proposed topology consisting of five modules
containing three lithium-ion cells connected in series is devel- B. Cell Balancing
oped. Each cell is equipped with a voltage sensor to sense the
1) Case 1. (VC1 > VC2 & VC3 ): To evaluate the theoretical
cell voltage. Fig. 19 shows the laboratory setup for the proposed
waveforms illustrated in Fig. 5(a), the simulation and experi-
topology. Table III summarizes the experimental parameters that
mental results are measured at D1 = 0.4 as expressed in (12)
are used to laboratory prototype. An FPGA based digital control
are shown in Fig. 13(a)–(d), where cell C1 is the highly charged
algorithm has been implemented for the proposed topology that
cell and C2 & C3 are the low charged cells. Since C1 is greater
aid of simple control and robust performance.
than C2 & C3 , the switch S1 should be turned on. Therefore,
In order verify the effectiveness of the proposed two-stage
the charge is transferred from the highly charged cell C1 to
topology, various case studies are investigated for module and
the inductor L1 during the turn-on period of S1 , as shown in
cell balancing.
Fig. 4(a).
Fig. 13(a) and (c) show the simulated and experimental wave-
A. Module Balancing forms of discharging current from cell C1 (positive current i.e.,
1) Case 1. (VM 1 > VM 2 ): Fig. 12(a)–(d) depict the simu- iC1 = i+ L1 ), that is stored in the inductor L1 during turn-on
lation and experimental waveforms of current and voltage of period of S1 and recovered charging current to cells C2 and
module balancing circuit for case 1, where M1 is the source C3 (negative current i.e., −iC2 = −iC3 = i− L1 ) during turnoff
module, i.e., VM 1 = 11.3V with C1 = 3.85 V, C2 = 3.75 V, C3 period of S1 as shown in Fig. 4(b). These results support (3) and
= 3.7 V, and M2 is the target module VM 2 = 10.3 V with C4 = (5) and the waveforms illustrated in Fig. 5(a).
3.7V, C5 = 3.4V, C6 = 3.2 V. At this instant VM 1 is greater than Fig. 13(b) and (d) show the simulated and experimental
VM 2 , hence the switch Sm1 is turned on. Therefore, the charge waveforms of gate pulse (S1 ), inductor current iL1 ≈ 1.6A and
is transferred from the source module (M1 ) to the inductor (Lm ) the drain to source voltage of the switches S1 and S2 i.e.,
MANJUNATH et al.: TWO-STAGE MODULE BASED CELL-TO-CELL ACTIVE BALANCING CIRCUIT FOR SERIES 2291

Fig. 12. Simulation and experimental waveforms of proposed module balancing (a)–(d): Case1 (VM 1 > VM 2 ), (e)–(h): Case2 (VM 2 > VM 1 ).

Fig. 13. Simulation and experimental waveforms of proposed cell balancing (a)–(d): Case 1 (VC1 > VC2 & VC3 ) and (e)–(h) Case 2 (VC2 & VC3 > VC1 ).

VDS1 ≈ 4V, VDS2 ≈ 8V. It is notable that the experimental current i.e., i+
L1 = iC2 = iC3 ), that is stored in the inductor L1
waveforms are almost matchup with simulated waveforms, and during turn-on period of S2 and recovered charging current to
both the waveforms are concurred with (6). cell C1 (negative current i.e., −iC1 = i−
L1 ) during turnoff period
2) Case 2. (VC2 & VC3 > VC1 ): To evaluate the theoretical of S2 as shown in Fig. 4(d).
waveforms illustrated in Fig. 5(b), the simulation and experi- Fig. 13(f) and (h) present the simulated and experimental
mental results are measured at D2 = 0.3 as expressed in (12) waveforms of gate pulse (S2 ), iL1 ≈ 2.4 A and voltage stress
are shown in Fig. 13(e)–(h), where cells C2 and C3 are the highly across switches S2 and S1 i.e., VDS2 ≈ 8V, VDS1 ≈ 4V respec-
charged cells and C1 is the low charged cell. Since C2 & C3 is tively.
greater than C1 , the switch S2 should be turned on. Therefore, 3) Case 3. (VC1 & VC2 > VC3 ): To evaluate the theoretical
the charge is transferred from the highly charged cells (C2 & C3 ) waveforms illustrated in Fig. 5(c), the simulation and experi-
to the inductor (L1 ) during the turn-on period of S2 , as shown mental results are measured at D3 = 0.3 as expressed in (12)
in Fig. 4(c). are shown in Fig. 14(a)–(d), where cells C1 & C2 are the highly
Fig. 13(e) and (g) show the simulated and experimental charged cells and C3 is the low charged cell. Since C1 & C2 is
waveforms of discharging currents from cells C2 & C3 (positive greater than C3 , the switch S3 should be turned on. Therefore,
2292 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO. 4, DECEMBER 2023

Fig. 14. Simulation and experimental waveforms of proposed cell balancing (a)–(d): Case 3 (VC1 & VC2 > VC3 ) and (e)–(h) Case 4 (VC3 > VC1 & VC2 ).

Fig. 15. Simulation and experimental waveforms of proposed cell balancing (a), (b): Case 5 (VC2 > VC1 & VC3 ) and (c), (d) Case 6 (VC1 & VC3 > VC2 ).

the charge is transferred from the highly charged cells (C1 & C2 ) waveforms of discharging current from cell C3 (positive current
to the inductor (L2 ) during the turn-on period of S3 , as shown i.e., iC3 = i+L2 ), that is stored in the inductor L2 during turn-on
in Fig. 4(e). period of S4 and recovered charging current to cells C1 and C2
Fig. 14(a) and (c) show the simulated and experimental wave- (negative current i.e., − iC1 = − iC2 = i− L2 ) during turnoff
forms of discharging currents from cells C1 & C2 (positive period of S4 as shown in Fig. 4(h). Fig. 14(f) and (h) show
current i.e., i+
L2 = iC1 = iC2 ), which is stored in the inductor the simulated and experimental waveforms of gate pulse (S1 ),
L2 during turn-on period of S3 and recovered charging current inductor current iL2 ≈ 1.6A and drain to source voltage of the
to cell C1 (negative current i.e., − iC3 = i− L2 ) during turnoff switches S4 and S3 i.e., VDS4 ≈ 4V, VDS3 ≈ 8V.
period of S3 as shown in Fig. 4(f). Fig. 14(b) and (d) present 5) Case 5. (VC2 > VC1 & VC3 ): To evaluate the theoretical
the simulated and experimental waveforms of gate pulse (S3 ), waveforms illustrated in Fig. 7(a), the simulation and experimen-
iL2 ≈ 2.4A and voltage stress across switches S3 and S4 i.e., tal results are shown in Fig. 15(a) and (b), where cell C2 is the
VDS3 ≈ 8V, VDS4 ≈ 4V. source cell and C1 & C3 are the target cells. Since C2 is greater
4) Case 4. (VC1 & VC2 > VC3 ): To evaluate the theoretical than C1 & C3 , switches S2 and S3 are turned on and off in a
waveforms illustrated in Fig. 5(d), the simulation and experi- complementary manner. Fig. 15(a) and (b) show the simulation
mental results are measured at D4 = 0.4 as expressed in (12) and experimental results of gate pulse of switches S2 & S3 ,
are shown in Fig. 14(e)–(h), where cell C3 is the highly charged charging and discharging currents of inductors L1 & L2 during
cell and C1 &C2 are the low charged cells. Since C3 is greater the period S2 & S3 operated in complementary manner.
than C1 &C2 , the switch S4 should be turned on. Therefore, 6) Case 6. (VC1 & VC3 > VC2 ): To evaluate the theoretical
the charge is transferred from the highly charged cell C3 to waveforms illustrated in Fig. 7(b), the simulation and experi-
the inductor L2 during the turn-on period of S4 , as shown in mental results are shown in Fig. 15(c) and (d), where cells C1
Fig. 4(g). Fig. 14(e) and (g) show the simulated and experimental & C3 are the source cells and C2 is the target cell. Since C1 &
MANJUNATH et al.: TWO-STAGE MODULE BASED CELL-TO-CELL ACTIVE BALANCING CIRCUIT FOR SERIES 2293

Fig. 16. Experimental results of module voltages during module equalization process of two cases: (a) Case 1 (VM 1 > VM 2 ), (b) Case 2 (VM 2 > VM 1 ) and
Cell voltages during cell equalization process of six cases: (c) Case 1 (VC1 > VC2 & VC3 ), (d) Case 2 (VC2 & VC3 > VC1 ), (e) Case 3 (VC1 & VC2 > VC3 ),
(f) Case 4 (VC3 > VC1 & VC2 ), (g) Case 5(VC2 > VC1 & VC3 ), (h) Case 6 (VC1 & VC3 > VC2 ) and (i) Experimental results of module and cell balancing.

Fig. 17. Experimental results of cell voltage versus balancing time of 15 series
connected cells: (a) with cell balancing, (b) without cell balancing.
Fig. 19. Experimental setup for (a) fifteen cells with five cell equalizers and
four module equalizers, (b) single cell equalizer, (c) single module equalizer.

C. Validation of Balancing Effect

For the proposed topology, the module equalization must be
completed before the cell equalization to avoid the consequences
of inconsistency between the cell voltages within the module.
Thus, the threshold voltage of the module equalization should
Fig. 18. Experimental results of module voltage versus balancing time: three be greater than cell equalization. In order to ensure accuracy
cells are connected in series to form a module, and five modules are connected of the circuit, the threshold voltages for the module and cell
to form a battery pack (a) with module balancing, (b) without module balancing.
equalizations are set to 0.03 V and 0.02 V, respectively.
1) Module Balancing: In order to verify the module balanc-
ing effect an experiment is conducted for two cases with different
C3 are greater than C2 , switches S1 and S4 are turned on and module initial voltages were presented in Fig. 16.
off in a complementary manner. Fig. 16(a) presents the experimental module balancing wave-
Fig. 15(c) and (d) show the simulation and experimental form for case 1, where M1 is the source module i.e., VM 1 =
results of gate pulse of switches S1 & S4 , charging and discharg- 11.3 V with C1 = 3.85 V, C2 = 3.75 V, C3 = 3.7 V, and M2 is
ing currents of inductors L1 & L2 during the period S1 & S4 the target module i.e., VM 2 = 10.3 V . After the equalization
operated in complementary manner. process initiated by the controller, module M1 starts discharging
2294 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO. 4, DECEMBER 2023

and M2 starts charging periodically. As soon as voltage gap starts, cells C1 &C2 start discharging, and cell C3 starts charging
between modules is reduced from 1 V to 25 mV, the complete periodically (refer Fig. 16(e)). Due to the voltage difference
module equalization is achieved at point (A = 250 s) with between C2 and C1 is small compared to C2 and C3 . Hence, the
10.75 V. equalization is achieved first between the cells C2 and C1 at point
Fig. 16(b) presents the experimental waveform for case 2, A3 before C2 and C3 at point B3 . The complete equalization is
where M2 is the source module i.e., VM 2 = 11.9 V, and M1 is the achieved at E = 280 s as soon as the voltage difference between
target module, i.e., VM 1 = 11.45 V. After the equalization pro- all the three cells is reduced from 0.112 V to 12 mV.
cess starts, module M2 starts discharging and M1 starts charging The initial values for case 4 are 3.75 V, 3.8 V, 3.9 V. In this
periodically. As soon as voltage gap between modules is reduced case cell C3 has the highest voltage (3.9 V), C1 has the lowest
from 0.45 V to 22 mV, the complete module equalization is voltage (3.75V) and C2 has the second lowest voltage (3.8V)
achieved at point (B = 260 s) with 11.65 V. Threshold voltage among the three cells. The initial voltage differences between
values are determined by the accuracy required. Higher accu- the highest and lowest cells are 0.15 V. After the equalization
racy requires a smaller threshold, and longer equalization time. process starts, cells C3 starts discharging, and cells C1 and C2
Therefore, the balancing time in this case is more compared to start charging periodically (refer Fig. 16(f)). Due to the voltage
case 1. gap between C3 and C2 is less than C3 and C1 . Thus, the earlier
2) Cell Balancing: To verify the feasibility of the control equalization is achieved between C3 and C2 at point A4 before
strategy, an experiment is conducted for six cases with different C3 and C1 at point B4 . However, the cell with lower voltage
initial Lithium-ion cell voltages are presented in Fig. 16. As i.e., cell 1 in this case receives more current. Hence, the more
discussed above, after completion of module equalization for equalization current is transferred from C3 to C1 than C2 . As
case1 the cell voltages within the module1 are sensed as C1 = soon as the voltage gap between all the three cells is reduced
3.65 V, C2 = 3.6 V, C3 = 3.55 V. Hence, the initial values for from 0.15 V to 16 mV, the complete equalization is achieved at
case 1 are 3.65 V, 3.6 V, 3.55 V concerning with C1 , C2 and point F = 405 s.
C3 . In this case, C1 has the highest voltage (3.65 V), C3 has The initial voltage values for case 5 are 3.85 V, 3.95 V and 3.8
the lowest voltage (3.55 V), and C2 is the second lowest voltage V. In this case, cell C2 has the highest voltage (3.95V), C3 has
(3.6 V) among the three cells. the lowest voltage (3.8V) and C1 has the second highest voltage
The initial voltage difference between the highest and lowest (3.85 V) among the three cells.
cells are 0.1 V. Therefore, after the equalization process starts, The initial voltage difference between the highest and lowest
cell C1 starts discharging, and cells C2 &C3 start charging peri- cells is 0.15 V. Therefore, after the equalization process starts,
odically (refer Fig. 16(c)). Since the voltage difference between cell C2 starts discharging, and cells C1 &C3 start charging pe-
C1 and C2 is less than C1 and C3 . Thus, the earlier equalization riodically (refer Fig. 16(g)). In the first step, the excess energy
is achieved between C1 and C2 at point A1 before C1 and C3 of cell C2 is transferred to adjacent cell C1 . Hence the equal-
at point B1 . The complete equalization is achieved at point ization is achieved first between the cells C2 and C1 at point
(C = 400 s) as soon as the voltage difference between all A5 .
the three cells is reduced from 0.1 V to 18 mV. In the next step, the energy is transferred from cells C1 &C2 to
The initial voltage values for case 2 are 3.89 V, 3.95 V and 4.01 C3 same as in the case 3 and achieves equalization at point B5 .
V. In this case, cell C3 has the highest voltage (4.01 V), C1 has the The complete equalization is achieved at G = 610 s as soon
lowest voltage (3.89 V) and C2 has the second highest voltage as the voltage difference between all three cells is reduced from
(3.95 V) among the three cells. 0.15V to 10 mV.
The initial voltage difference between the highest and lowest The initial voltage values for case 6 are 4 V, 3.89 V and 3.95
cells are 0.12 V. Therefore, after the equalization process starts, V. In this case, cell C1 has the highest voltage (4 V), C2 has the
cells C2 &C3 start discharging, and cell C1 starts charging lowest voltage (3.89 V) and C3 has the second highest voltage
periodically (refer Fig. 16(d)). Due to the voltage difference (3.95V) among the three cells. The initial voltage difference
between C3 and C2 , is small compared to C3 and C1 . Hence, the between the highest and lowest cells is 0.11 V. Therefore, after
equalization is achieved first between the cells C3 and C2 at point the equalization process starts, cells C1 &C3 start discharging,
A2 before C3 and C1 at point B2 . The complete equalization and cell C2 starts charging periodically (refer Fig. 16(h)).
is achieved at D = 270 s, as soon as the voltage difference In the first step, the excess energy of cell C1 is transferred to
between all the three cells is reduced from 0.12 V to 15 mV. adjacent cells C2 &C3 . Hence the equalization is achieved first
Moreover, it can be observed from Fig. 13(e), the lower voltage between the cells C1 and C3 at point A6 . After the first step
cell i.e., cell C1 receives more current than other cells. Hence, ends, cell C3 has highest charge than C1 &C2 . Thus, the energy
the average current of cell C1 is higher than the cells C2 and is transferred from cell C3 to C2 and achieves equalization at
C3 . Therefore, the balancing time in this case is less compared point B6 . The complete equalization is achieved at H = 508 s,
to case 1. as soon as the voltage difference between all three cells, is
Similarly, the initial values for case 3 are 3.880 V, 3.904 V, reduced from 0.11 V to 20 mV. Moreover, it can be observed
3.792 V. In this case cell C2 has the highest voltage (3.904 V), C3 from Fig. 16(h), the balancing time is less compared to case 5
has the lowest voltage (3.792 V) and C1 has the second highest because in this case two cells (C1 &C3 ) are the source cells and
voltage (3.880 V) among the three cells. one cell (C2 ) is the target cell.
The initial voltage difference between the highest and lowest Further, extensive experimentation is conducted to show the
cells are 0.112 V. Therefore, after the equalization process module equalization is accomplished before the cell equalization
MANJUNATH et al.: TWO-STAGE MODULE BASED CELL-TO-CELL ACTIVE BALANCING CIRCUIT FOR SERIES 2295

TABLE IV
MODULE BALANCING PROCESS

TABLE V
CELL BALANCING PROCESS

TABLE VI
COMPARISON OF THE PROPOSED TOPOLOGY WITH CONVENTIONAL TOPOLOGIES FOR 330V BATTERY PACK

of the proposed two-stage topology, with initial module and cell The fifteen series connected cells are modularized into five
voltages of case 1 presented in Tables IV and V respectively. modules to verify the module balancing circuit, each with three
Since the module balancing inductor (Lm ) is smaller than the cells. The initial module voltages are 11.33V, 10.65V, 10.86
cell balancing inductors (L1 and L2 ), more equalization current V, 11.12 V and 11 V, respectively. Fig. 18(a) shows that, all the
is transferred between modules than the cells. It leads to an modules are equalized to 10.992 V at 480 seconds of the module
early equalization accomplishment between the modules before balancing. It is observed that, with the cell balancing circuit, all
achieving the cells equalization. From Fig. 16(i), it can observe the cells are equalized at the 1080s, but module balancing circuit
that clearly, the module equalization is achieved before the cell reduces approximately half of the balancing time compared to
equalization. the cell balancing circuit.
In order to evaluate the proposed cell balancing circuit with
more cells, it is verified with the 55V battery pack, consisting
V. COMPARISON OF PROPOSED TOPOLOGY WITH
of fifteen series connected cells.
CONVENTIONAL METHODS
The initial cell voltage values of fifteen cells are considered
as 3.8 V, 3.5 V, 3.59 V, 3.55 V, 3.6 V, 3.79 V, 3.7 V, 3.68 V, To show the superiority of the proposed topology, a compari-
3.62 V, 3.741 V, 3.695V, 3.78 V, 3.62 V, 3.645 V and 3.65 V, son has been made with conventional cell balancing topologies
respectively. All the cell voltages are balanced to 3.66 V at 1080s given in Table VI. The number of components is calculated under
of cell equalization shown in Fig. 17(a). the assumption that the battery pack voltage is 330 V, which is
2296 IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 38, NO. 4, DECEMBER 2023

composed of six modules, each module is having fifteen series modularized cells. The proposed topology with fewer compo-
connected cells. nents can simultaneously target and balance the two cells. Thus,
The modularized fly-back converter based balancing circuit is the balancing speed is improved effectively. The equalization is
presented in [5]. This topology can transfer energy using the C2C achieved for both cell-to-cell and module-to-module stages, with
and M2M methods and has a simple control structure. However, the proposed active cell balancing topology by utilizing FPGA
it requires more transformer windings, which increases the size based digital control strategy. A control strategy is developed
of the balancing circuit, and it has a low balancing speed due to based on its operating principles to deal with the unbalanced
the diodes involved in the circuit. LC series resonant balancing cells. A laboratory prototype has been developed to study the
circuit is presented in [8]. This topology utilizes a balancing performance of the proposed active cell balancing topology. Ex-
current that is proportional to the voltage difference between the tensive tests have been conducted for the prototype to validate the
imbalanced cells. Despite the small voltage difference between proposed topology. The proposed topology has been validated
the cells, it requires more cell equalization time. The switched for six cases with different initial cell voltage conditions, and
capacitor-based balancing circuits are presented in [10] and [14]. the test results are found satisfactory. The cell equalization time
These circuits require more balancing time because energy can is found to be 400 s with the proposed topology, which is signifi-
be transferred between two adjacent cells only using the C2C cantly less compared to conventional topologies. Therefore, the
method. In [26], the modularized two-stage balancing circuit proposed active cell balancing circuit is a suitable and promising
is presented. This circuit can be implemented using the P2C topology for equalizing series connected Li-ion cells in a long
method, and it can reduce the balancing time. However, it string.
requires seven converters to transfer energy from the pack to
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two steps. Therefore, balancing time is more for non-adjacent [8] K.-M. Lee, Y.-C. Chung, C.-H. Sung, and B. Kang, “Active cell balancing
cells than adjacent cells equalization. However, the proposed of Li-ion batteries using LC series resonant circuit,” IEEE Trans. Ind.
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topology achieves cell equalization with less balancing time than [9] S. Yarlagadda, T. T. Hartley, and I. Husain, “A battery management
conventional topologies presented in Table VI. Therefore, the system using an active charge equalization technique based on a DC/DC
proposed topology is suitable for equalizing the series connected converter topology,” IEEE Trans. Ind. Appl., vol. 49, no. 6, pp. 2720–2729,
Nov./Dec. 2013.
Li-ion battery pack. [10] M.-Y. Kim, C.-H. Kim, J.-H. Kim, and G.-W. Moon, “A chain structure
of switched capacitor for improved cell balancing speed of lithium-ion
batteries,” IEEE Trans. Ind. Electron., vol. 61, no. 8, pp. 3989–3999,
VI. CONCLUSION Aug. 2014.
[11] S.-H. Park, K.-B. Park, H.-S. Kim, G.-W. Moon, and M.-J. Youn, “Single-
A two-stage module based active cell-to-cell balancing topol- magnetic cell-to-cell charge equalization converter with reduced number
ogy based on modified buck-boost converter has been proposed of transformer windings,” IEEE Trans. Power Electron., vol. 27, no. 6,
pp. 2900–2911, Jun. 2012.
in this article. The proposed configuration consists of (2N-2) [12] M.-Y. Kim, J.-H. Kim, and G.-W. Moon, “Center-cell concentration
high-frequency switches and (N-1) inductors. It facilitates the structure of a cell-to-cell balancing circuit with a reduced number of
direct paths for energy transfer between the cells in a module by switches,” IEEE Trans. Power Electron., vol. 29, no. 10, pp. 5285–5297,
Oct. 2014.
appropriately placing the inductors, that improves the system’s [13] T. H. Phung, A. Collet, and J.-C. Crebier, “An optimized topology for
efficiency. Further, the performance of the system has been next-to-next balancing of series-connected lithium-ion cells,” IEEE Trans.
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MANJUNATH et al.: TWO-STAGE MODULE BASED CELL-TO-CELL ACTIVE BALANCING CIRCUIT FOR SERIES 2297

[14] Y. Yuanmao, K. W. E. Cheng, and Y. P. B. Yeung, “Zero-current switch- R Kalpana (Senior Member, IEEE) received the
ing switched-capacitor zero-voltage-gap automatic equalization system bachelor’s degree in electrical and electronics engi-
for series battery string,” IEEE Trans. Power Electron., vol. 27, no. 7, neering from Madras University, Chennai, India, in
pp. 3234–3242, Jul. 2012. 1998, the master’s degree in power systems from
[15] F. Baronti, G. Fantechi, R. Roncella, and R. Saletti, “High-efficiency Anna University, Chennai, India, in 2000, and the
digitally controlled charge equalizer for series-connected cells based on Ph.D. degree in electrical engineering from the Indian
switching converter and super-capacitor,” IEEE Trans. Ind. Informat., Institute of Technology Delhi, New Delhi, India, in
vol. 9, no. 2, pp. 1139–1147, May 2013. 2012. She is currently an Assistant Professor with
[16] S. Li, C. C. Mi, and M. Zhang, “A high-efficiency active battery-balancing the Department of electrical and electronics engi-
circuit using multi-winding transformer,” IEEE Trans. Ind. Appl., vol. 49, neering, National Institute of Technology Karnataka,
no. 1, pp. 198–207, Jan./Feb. 2013. Surathkal, Mangalore, India. Her research interests
[17] Y. Ye and K. W. E. Cheng, “Modeling and analysis of series–parallel include power quality studies, power electronics, and battery management
switched-capacitor voltage equalizer for battery/supercapacitor strings,” systems for Electric Vehicle.
IEEE J. Emerg. Sel. Topics Power Electron., vol. 3, no. 4, pp. 977–983,
Dec. 2015.
[18] M. Evzelman, M. M. Ur Rehman, K. Hathaway, R. Zane, D. Costinett,
and D. Maksimovic, “Active balancing system for electric vehicles with
incorporated low-voltage bus,” IEEE Trans. Power Electron., vol. 31,
no. 11, pp. 7887–7895, Nov. 2016.
[19] X. Zheng, X. Liu, Y. He, and G. Zeng, “Active vehicle battery equalization
scheme the condition of constant-voltage/current charging and discharg- Bhim Singh (Fellow, IEEE) received the B.E. degree
ing,” IEEE Trans. Veh. Technol., vol. 66, no. 5, pp. 3714–3723, May 2017. in electrical from the University of Roorkee (Now IIT
[20] Q. Ouyang et al., “Module-based active equalization for battery packs: Roorkee), Roorkee, India, in 1977, and the M.Tech.
A two-layer model predictive control strategy,” IEEE Trans. Transp. degree in power apparatus and systems and the Ph.D.
Electrific., vol. 8, no. 1, pp. 149–159, Mar. 2022. degree in electrical from the IIT Delhi, India, in 1979
[21] M. Raeber, A. Heinzelmann, and D. O. Abdeslam, “Analysis of an active and 1983, respectively. In 1983, he was a Lecturer
charge balancing method based on a single non isolated DC/DC converter,” with the Department of Electrical Engineering, Uni-
IEEE Trans. Ind. Electron., vol. 68, no. 3, pp. 2257–2265, Mar. 2021. versity of Roorkee, where he became a Reader in
[22] S. Wang, S. Yang, W. Yang, and Y. Wang, “A new kind of balancing circuit 1988. In 1990, he was an Assistant Professor with
with multiple equalization modes for serially connected battery pack,” the Department of Electrical Engineering, IIT Delhi,
IEEE Trans. Ind. Electron., vol. 68, no. 3, pp. 2142–2150, Mar. 2021. India, where he become an Associate Professor in
[23] F. Mestrallet, L. Kerachev, J.-C. Crebier, and A. Collet, “Multiphase 1994 and a Professor in 1997. From 2007 to 2012, he was the ABB Chair
interleaved converter for lithium battery active balancing,” IEEE Trans. Professor. From 2014 to 2016, he was the Head with the Department of Electrical
Power Electron., vol. 29, no. 6, pp. 2874–2881, Jun. 2014. Engineering, IIT Delhi. From 2016 to 2019, he was the Dean, Academics, IIT
[24] M. Raeber, A. Heinzelmann, and D. O. Abdeslam, “Analysis of an active Delhi. From 2015 to 2021, he has been JC Bose Fellow of DST, Government of
charge balancing method based on a single non isolated DC/DC converter,” India. Since July 2021, he has been the SERB National Science Chair. Prof. Singh
IEEE Trans. Ind. Electron., vol. 68, no. 3, pp. 2257–2265, Mar. 2021. has guided 116 Ph.D. dissertations, and 176 M.E./ M.Tech./M.S.(R) theses. He
[25] F. Peng, H. Wang, and L. Yu, “Analysis and design considerations of has filed 106 patents. He has executed 90 sponsored and consultancy projects.
efficiency enhanced hierarchical battery equalizer based on bipolar CCM He has co-authored a textbook on power quality Power Quality Problems and
buck–boost units,” IEEE Trans. Ind. Appl., vol. 55, no. 4, pp. 4053–4063, Mitigation Techniques published by John Wiley Sons Ltd. 2015. His research
Jul./Aug. 2019. interest include solar PV grid interface systems, microgrids, power quality
[26] C.-H. Kim, M.-Y. Kim, H.-S. Park, and G.-W. Moon, “A modularized two- monitoring and mitigation, solar PV water pumping systems, improved power
stage charge equalizer with cell selection switches for series-connected quality ac-dc converters, and electric vehicles.
lithium-ion battery string in an HEV,” IEEE Trans. Power Electron.,
vol. 27, no. 8, pp. 3764–3774, Aug. 2012.
[27] C.-H. Kim, M.-Y. Kim, and G.-W. Moon, “A modularized charge equal-
izer using a battery monitoring IC for series-connected Li-ion battery
strings in electric vehicles,” IEEE Trans. Power Electron., vol. 28, no. 8,
pp. 3779–3787, Aug. 2013.
[28] S. Fan, J. Duan, L. Sun, and K. Zhang, “A fast modularized multiwinding
transformer balancing topology for series-connected super capacitors,” Kiran R (Student Member, IEEE) received the bach-
IEEE Trans. Power Electron., vol. 34, no. 4, pp. 3255–3268, Apr. 2019. elor’s degree in electrical and electronics engineering
[29] D. Wang, Y. Bao, and J. Shi, “Online lithium-ion battery internal resistance from Bangalore University, Bangalore, India, and the
measurement application in state-of-charge estimation using the extended M.Tech. degree in power electronics from Visves-
Kalman filter,” Energies, vol. 10, no. 9, Aug. 2017, Art. no. 1284. varaya Technological University, Belagavi, India, and
the Ph.D. degree in dc-dc converters and battery man-
agement systems for Telecom load from the Depart-
ment of Electrical and Electronics Engineering, Na-
Kenguru Manjunath (Student Member, IEEE) re- tional Institute of Technology Karnataka, Surathkal,
ceived the bachelor’s degree in electrical and elec- Mangalore, India.
tronics engineering from the Sri Venkateswara Uni- He is currently a Lead Power Electronics Engineer
versity College of Engineering, Tirupati, India, in with BuyMYEV Technologies Pvt. Limited. His research interests include con-
2012, and the M.Tech. degree in power electronics trol application in power electronics, dc-dc converters, energy storage system,
from the National Institute of Technology, Trichy, and renewable energy applications.
India, in 2014. He is currently working toward the
Ph.D. degree in electrical and electronics engineering
with the National Institute of Technology Karnataka,
Surathkal, Mangalore, India. His research interests
include dc-dc converters, active cell balancing circuits
for battery strings, battery management, and energy storage system.