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23ECE202_Assgt_01

analog electronics assignment-1

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3 views

23ECE202_Assgt_01

analog electronics assignment-1

Uploaded by

marvelcbe20
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Amrita School of Engineering, Coimbatore July – Nov.

2024

23ECE202 Analog Electronics - I

Assignment # 1

(Note: Please note that the circuits of all the questions above are to be simulated and your results verified with
those obtained by your analysis.)

1. Consider the network shown in


Fig. 1.

(i) If 𝑉1 & 𝑉2 can be expressed as


𝑉1 = 𝑟11 𝐼1 + 𝑟12 𝐼2
then, obtain
𝑉2 = 𝑟21 𝐼1 + 𝑟22 𝐼2 ,
expressions for 𝑟11 & 𝑟22 . What
do they signify ?

(ii) For the following values of the


various components, determine
(i) 𝑣2 /𝑣𝑖 ; (ii) 𝑟11 and (iii) 𝑟22 .
Interpret your answers. 𝑅1 =
30 𝑘Ω; 𝑅2 = 3 𝑘Ω; 𝑅3 =
40 𝑘Ω; 𝑅4 = 100 Ω; R 5 =
2.2 𝑘Ω and 𝑔𝑚 = 0.1 𝐴𝑉 −1 .
Fig. 1

2. Consider the 𝐼𝐶 𝑣𝑠 𝑉𝐶𝐸 relationship of the BC547 BJT, as depicted in Fig. 2. A load line is also shown
superimposed on the V-I
characteristics. (i) Using 12
these 𝑉 − 𝐼 curves, bias the
10
BJT using a voltage divider
Collector Current Ic (mA)

network, such that the


8
operating point is
𝑃(4.4 𝑚𝐴, 7.2 𝑉); (ii) What
6
would be the voltage gain of
IB = 2 mA
this amplifier ?; (iii) What is 4 IB = 6 mA
the maximum amplitude of a IB = 10 mA
sinusoidal input that can be 2 IB = 16 mA
IB = 24 mA
applied to this amplifier, such
Load Line
that the output is not 0
distorted ? 0 5 10 15 20
Voltage - VCE (V)

Fig. 2

Department of Electronics and Communication Engineering 1/ 2


Amrita School of Engineering, Coimbatore July – Nov. 2024

3. Design the circuit shown in Fig. 3, such that the quiescent drain current is 0.5
′𝑊
𝑘𝑛 𝑽𝑫𝑫
mA. The MOSFET is specified to have 𝑉𝑡 = 1. 5 𝑉 and = 2 𝑚𝐴/𝑉 2 . The
𝐿
channel length modulation effect can be neglected. Use 10 V for 𝑉𝐷𝐷 . Calculate
the change in drain current 𝐼𝐷 , when the MOSFET is replaced with another of
′𝑊
𝑹𝟑
𝑘𝑛 𝑹𝟏
the same but with 𝑉𝑡 = 2𝑉.
𝐿
𝑻𝟏
4. Design an NMOS amplifier to provide a 0.4 V peak output across a 20 𝑘Ω load
that can be used as a drain resistor. If a gain of 15 𝑉/𝑉 is required, what should 𝑹𝟐
be the value of 𝑔𝑚 ? Using a dc supply of 2 V, what should be the values of
𝐼𝐷 & 𝑉𝑂𝑉 ? What 𝑊/𝐿 ratio would you use, if 𝜇𝑛 𝐶𝑜𝑥 = 200 𝜇𝐴/𝑉 2 ? Assuming
𝑉𝑡 = 1.2 𝑉, determine 𝑉𝐺𝑆 .
Fig. 3

Note:

1. Your submission is due by 2359hrs of Sep. 15, 2024. No excuses; no exceptions.


2. Please remember that the above is a deadline and that there is nothing to prevent you from submitting
your assignment before that time.
3. Your assignment should be submitted as a pdf attachment in AUMS. The pdf file should be named
“xxxx_24.y.pdf” (without the quotes), where y stands for the assignment number and xxxx represents the
last four digits of your roll number. Please note that any deviations from the above instructions will result
in your submission being deleted without notice. It is your responsibility to ensure that the pdf file is a
faithful copy of what you want to convey – no complaints of disappearing figures, strange fonts, gibberish
looking letters, will be entertained.
4. Note that your submissions are to be made to your individual classes (for 23ECE202) in AUMS and NOT to
the common class, created for taking the online quizzes in the subject.
5. A template for your assignment submissions is available in AUMS. All submissions should strictly follow
that template.

Department of Electronics and Communication Engineering 2/ 2

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