Lab 11
Lab 11
Circuit Analysis
Session:
Group:
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11.1 Objective
To determine the values VTH (Thevenin voltage) and RTH (Thevenin resistance) in a DC circuit
containing a single voltage source. Also obtain the voltage across and current passing through different RL
(Load resistance).
11.2 Equipment
4. DMM
5. DC Supply x 2
6. Resistors of (1k, 1.2k, 2.2k, 2.7k, 4.7k) Ω.
11.3 Theory
Thevenin Theorem states that
“It is possible to simplify any linear circuit, no matter how complex, to an equivalent circuit with
just a single voltage source and series resistance connected to a load.”
Thevenin Theorem is especially useful in analyzing power systems and other circuits where one
resistor in the circuit (called the "load" resistor) is subject to change, and re-calculation of the
circuit is necessary with each trial value of load resistance, to determine voltage across it and
current through it. Thevenin Theorem makes this easy by temporarily removing the load resistance
from the original circuit and reducing what's left to an equivalent circuit composed of a single
voltage source and series resistance. The load resistance can then be re-connected to this
"Thevenin equivalent circuit" and calculations carried out as if the whole network were nothing
but a simple series circuit. Let suppose the following circuit in Figure 11-1.
And after converting from circuit (Figure 11-1) to Thevenin equivalent (Figure 11-2)
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The "Thevenin Equivalent Circuit" is the electrical equivalent of V1, R1, R2, and V2 (Figure 11-1) as
seen from the two points where our load resistor (R_load) connects.
11.4 Procedure
1. Connect the circuit as shown in the Figure 11-3. Measure VAB and VAC
2. Now Calculate the ILOAD, VLOAD, RTH and VTH and note down the values
3. Remove the Resistance (R_load) from the circuit across which the Thevenin equivalents must be
evaluated as shown in Figure 11-4
4. To measure the value of VTH place a DMM in Voltage mode across the terminals A and B (Figure
11-4) and find the voltage VAC across A and C
5. Confirm the value of the equivalent voltage VTH from calculations and record it
6. To measure the RTH remove the voltage sources from the circuit and short circuit the terminals
from which the supply was connected. Now place a DMM in ohm (Ω) mode across the terminals
A and B as shown in Figure 11-5
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Figure 11-5 Circuit to calculate RTH
7. Confirm the value of the equivalent resistance RTH from calculations and record it
8. Now construct the Thevenin equivalent circuit and measure VAB and ILOAD
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Table 11-3 load values calculations
VAB =
Readings for RLOAD ILOAD VLOAD
Calculated Multisim Measured Calculated Multisim Measured
1k
Circuit Figure 9-3
1.2k
1k
Circuit Figure 9-6
1.2k
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11.6 Calculation
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11.7 Answer the following
1. How much power is absorbed by both RLOAD. Is this the maximum power that can
be drawn from the supply?
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2. What value of RL will draw the maximum power from the circuit? Calculate the
maximum power.
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3. In your words, explain significance of this theorem in circuit analysis, if any:
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Assessment Rubrics for: Circuit Analysis
Method:
Lab report evaluation and instructor observation during lab sessions.
Outcomes Assessed:
bb. Ability to conduct experiments as well as to analyze and interpret data.
cc. Ability to function in a team and adhere to rules and guidelines.
dd. Ability to use the techniques, skills and modern engineering tools necessary for
engineering practice.
Performance Exceeds expectation (5-4) Meets expectation (3-2) Does not meet expectation (1) Marks
Realization Selects relevant equipment / Needs guidance to select Incapable of selecting relevant
of parts to the experiment, relevant equipment / parts equipment / parts to the
experiment develops circuit diagrams of to the experiment and to experiment and unable to
(a) part connections or wiring develop setup diagrams develop setup diagrams
Actively engages and Cooperates with other Distracts or discourages other
Teamwork cooperates with other group
group members in a group members from
(b) members in an effective
manner reasonable manner conducting the experiments
Lab Engineer:
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