C HAPTER 2

8051 A SSEMBLY L ANGUAGE

P ROGRAMMING .
 S YLLABUS

Topic Fine Detailing No of Hours

8051 Assembly 2.1 Instruction set 3

Language
Programming. 2.2 Addressing mode

2.3 Assembler directives

2.4 Programs related to: arithmetic, logical,

delay, input, output port, serial
communication and interrupts
 O BJECTIVE

 To give students an understanding of various

functions of the registers in 8051 programming
model.
 It defines and explains the various addressing
modes of 8051.
 it classify the instructions in terms of their word
size and categories the instruction set into 5
groups.
 It helps the students to perform various
arithmetic and logical operations
 D EFINITIONS

 Op-code (Operation code): Op-code is the part of an

instruction / directive that identifies a specific operation.

 Operand: Operand is a part of an instruction / directive

that represents a value on which the instruction acts.

 MNEMONIC : refers to the operation an instruction

performs (copy, addition, logic operation etc.).
Mnemonics are abbreviations of the name of operation
being executed

 Assembly language: The language in which the

mnemonics (short -hand form of instructions) are used
to write a program is called assembly language. The
manufacturers of microprocessor give the mnemonics.
 A DDRESSING MODES OF 8051

 Addressing modes of 8051

 An "addressing mode" refers to how you are
addressing a given memory location. Each of these
addressing modes provides important flexibilityThe
8051 instruction set supports 6 addressing
modes
 Immediate addressing mode
 Direct addressing
 Register Indirect addressing
 Indexed addressing mode
 Relative addressing mode
 ADDRESSING MODE

 Direct addressing: In this mode, the operands

are (addressed) specified using the 8 bit address
field in the instruction format. Only internal data
RAM and SFRS can be directly addressed.

 Example: MOV R0, 89H; 89 H is an address of

special function Register TMOD.
 ADDRESSING MODE

 Register Indirect addressing: In this mode the 8

bit address of a operand is stored in a register.
The register R0 and R1 of the selected bank of
register or SP can be used as address register for
storing the 8 bit addresses.

 Example: ADD A, @ R0.

 ADDRESSING MODE

 Register Instructions: In this mode the operands are

stored in the register R0_R7 of the selected register
Bank. One of these register is (R0_R7) is specified in
the instruction using the 3-bit register specification
field of the opcode format.

 Example: ADD A, R7.

 Register Specific instruction: In this case the operand

is implicitly stated as a part of register. Some of the
instruction always operate only on a specific register.

 Example: RLA Rotates accumulator left.

 ADDRESSING MODE

 Immediate Mode: In this mode an immediate

data i.e., a constant is specified in the instruction
after the opcode byte.

 Example: MOV A, #10.

 ADDRESSING MODE

 Indexed addressing:

 Only program memory can be accessed using this addressing mode.

 Used in 8051 for look up table operation.

 PC and data pointers are allowed 16 bit address register is this mode of
addressing.

 These 16 bit register points the base of the lookup table and accumulator
register contains code to be converted using the looking table.

 The lookup table data address is found by adding the contents of accumulator
register with that of PC or data pointer.

 In the case of jump instruction the contents of accumulator are added with one
of the specified 16 bit register to form a jump destination address.

 Example: MOVC A, @A+DPTR

 I NSTRUCTION S ET

 The process of writing program for the

microcontroller mainly consists of giving instructions
(commands) in the specific order in which they
should be executed in order to carry out a specific
task. All commands are known as INSTRUCTION SET.

 All microcontrollers compatible with the 8051 have

in total of 255 instructions, i.e. 255 different words
available for program writing.
 I NSTRUCTION S ET

 Depending on operation they perform, all

instructions are divided in several groups:
 Arithmetic Instructions
 Branch Instructions
 Data Transfer Instructions
 Logic Instructions
 Bit-oriented Instructions
 D ATA T RANSFER I NSTRUCTIONS

 Data transfer instructions move the content of

one register to another. The register the content
of which is moved remains unchanged. If they
have the suffix “X” (MOVX), the data is
exchanged with external memory.
 D ATA T RANSFER I NSTRUCTIONS

T R A N SF E R I N S T R U C TI O N S
Mnemonic Description Byte Cycle
MOV A,Rn Moves the register to the accumulator 1 1
MOV A,direct Moves the direct byte to the accumulator 2 2
MOV A,@Ri Moves the indirect to the accumulator 1 2
MOV A,#data Moves the immediate data to the accumulator 2 2
MOV Rn,A Moves the accumulator to the register 1 2
MOV Rn,direct Moves the direct byte to the register 2 4
MOV Rn,#data Moves the immediate data to the register 2 2
MOV direct,A Moves the accumulator to the direct byte 2 3
MOV direct,Rn Moves the register to the direct byte 2 3
MOV direct,direct Moves the direct byte to the direct byte 3 4
MOV direct,@Ri Moves the indirect to the direct byte 2 4
 D ATA T RANSFER I NSTRUCTIONS

Mnemonic Description Byte Cycle

MOV @Ri,A Moves the accumulator to the indirect 1 3
MOV @Ri,direct Moves the direct byte to the indirect 2 5
MOV @Ri,#data Moves the immediate data to the indirect 2 3
MOV ,#data Moves a 16-bit data to the data pointer 3 3
MOVC A,@A+ Moves the code byte relative to the to the accumulator (address=A+) 1 3
MOVC A,@A+PC Moves the code byte relative to the PC to the accumulator (address=A+PC) 1 3
MOVX A,@Ri Moves the external (8-bit address) to the accumulator 1 3-10
MOVX A,@ Moves the external (16-bit address) to the accumulator 1 3-10
MOVX @Ri,A Moves the accumulator to the external (8-bit address) 1 4-11
MOVX @,A Moves the accumulator to the external (16-bit address) 1 4-11
PUSH direct Pushes the direct byte onto the stack 2 4
direct Pops the direct byte from the stack/td> 2 3
XCH A,Rn Exchanges the register with the accumulator 1 2
XCH A,direct Exchanges the direct byte with the accumulator 2 3
XCH A,@Ri Exchanges the indirect with the accumulator 1 3
XCHD A,@Ri Exchanges the low-order nibble indirect with the accumulator 1 3
 A RITHMETIC I NSTRUCTIONS
Mnemonic Description Byte Cycle
ADD A,Rn Adds the register to the accumulator 1 1
ADD A,direct Adds the direct byte to the accumulator 2 2
ADD A,@Ri Adds the indirect RAM to the accumulator 1 2
ADD A,#data Adds the immediate data to the accumulator 2 2
ADDC A,Rn Adds the register to the accumulator with a carry flag 1 1
ADDC A,direct Adds the direct byte to the accumulator with a carry flag 2 2
ADDC A,@Ri Adds the indirect RAM to the accumulator with a carry flag 1 2
ADDC A,#data Adds the immediate data to the accumulator with a carry flag 2 2
SUBB A,Rn Subtracts the register from the accumulator with a borrow 1 1

SUBB A,direct Subtracts the direct byte from the accumulator with a borrow 2 2

SUBB A,@Ri Subtracts the indirect RAM from the accumulator with a borrow 1 2

SUBB A,#data Subtracts the immediate data from the accumulator with a borrow 2 2
 A RITHMETIC I NSTRUCTIONS

INC A Increments the accumulator by 1 1 1

INC Rn Increments the register by 1 1 2
INC Rx Increments the direct byte by 1 2 3
INC @Ri Increments the indirect RAM by 1 1 3
DEC A Decrements the accumulator by 1 1 1
DEC Rn Decrements the register by 1 1 1
DEC Rx Decrements the direct byte by 1 1 2
DEC @Ri Decrements the indirect RAM by 1 2 3
INC DPTR Increments the Data Pointer by 1 1 3
MUL AB Multiplies A and B 1 5
DIV AB Divides A by B 1 5
DA A Decimal adjustment of the accumulator according to BCD code 1 1
 B RANCH I NSTRUCTIONS

Mnemonic Description Byte Cycle

ACALL addr11 Absolute subroutine call 2 6
LCALL addr16 Long subroutine call 3 6
RET Returns from subroutine 1 4
RETI Returns from interrupt subroutine 1 4
AJMP addr11 Absolute jump 2 3
LJMP addr16 Long jump 3 4
SJMP rel Short jump (from –128 to +127 locations relative to 2 3
the following instruction)
JC rel Jump if carry flag is set. Short jump. 2 3
JNC rel Jump if carry flag is not set. Short jump. 2 3
JB bit,rel Jump if direct bit is set. Short jump. 3 4
JBC bit,rel Jump if direct bit is set and clears bit. Short jump. 3 4
JMP @A+DPTR Jump indirect relative to the DPTR 1 2
JZ rel Jump if the accumulator is zero. Short jump. 2 3
JNZ rel Jump if the accumulator is not zero. Short jump. 2 3
 B RANCH I NSTRUCTIONS

Compares direct byte to the accumulator and jumps if not

CJNE A,direct,rel 3 4
equal. Short jump.
Compares immediate data to the accumulator and jumps if
CJNE A,#data,rel 3 4
not equal. Short jump.
Compares immediate data to the register and jumps if not
CJNE Rn,#data,rel 3 4
equal. Short jump.
Compares immediate data to indirect register and jumps if
CJNE @Ri,#data,rel 3 4
not equal. Short jump.
DJNZ Rn,rel Decrements register and jumps if not 0. Short jump. 2 3

DJNZ Rx,rel Decrements direct byte and jump if not 0. Short jump. 3 4
NOP No operation 1 1
 L OGIC INSTRUCTION

Mnemonic Description Byte Cycle

ANL A,Rn AND register to accumulator 1 1

ANL A,direct AND direct byte to accumulator 2 2

ANL A,@Ri AND indirect RAM to accumulator 1 2

ANL A,#data AND immediate data to accumulator 2 2

ANL direct,A AND accumulator to direct byte 2 3

ANL direct,#data AND immediae data to direct register 3 4

ORL A,Rn OR register to accumulator 1 1

ORL A,direct OR direct byte to accumulator 2 2

ORL A,@Ri OR indirect RAM to accumulator 1 2

ORL direct,A OR accumulator to direct byte 2 3

ORL direct,#data OR immediate data to direct byte 3 4

 L OGIC INSTRUCTION

XRL A,Rn Exclusive OR register to accumulator 1 1

XRL A,direct Exclusive OR direct byte to accumulator 2 2
XRL A,@Ri Exclusive OR indirect RAM to accumulator 1 2
XRL A,#data Exclusive OR immediate data to accumulator 2 2
XRL direct,A Exclusive OR accumulator to direct byte 2 3
XORL direct,#data Exclusive OR immediate data to direct byte 3 4
CLR A Clears the accumulator 1 1
CPL A Complements the accumulator (1=0, 0=1) 1 1
SWAP A Swaps nibbles within the accumulator 1 1
RL A Rotates bits in the accumulator left 1 1
RLC A Rotates bits in the accumulator left through carry 1 1
RR A Rotates bits in the accumulator right 1 1
RRC A Rotates bits in the accumulator right through carry 1 1
 B IT - ORIENTED I NSTRUCTIONS

Mnemonic Description Byte Cycle

CLR C Clears the carry flag 1 1
CLR bit Clears the direct bit 2 3
SETB C Sets the carry flag 1 1
SETB bit Sets the direct bit 2 3
CPL C Complements the carry flag 1 1
CPL bit Complements the direct bit 2 3
ANL C,bit AND direct bit to the carry flag 2 2
ANL C,/bit AND complements of direct bit to the carry flag 2 2

ORL C,bit OR direct bit to the carry flag 2 2

ORL C,/bit OR complements of direct bit to the carry flag 2 2

MOV C,bit Moves the direct bit to the carry flag 2 2

MOV bit,C Moves the carry flag to the direct bit 2 3
 P RGRAMING WITH 8051

 Write a program to copy a block of 10 bytes from RAM location

starting at 37h to RAM location Starting at 59h.

 PROGRAM:

 MOV R0,#37h

 MOV R1,#59h

 MOV R2,#10

 L1: MOV A,@R0

 MOV @R1,A

 INC R0

 INC R1

 DJNZ R2, L1
 P RGRAMING WITH 8051

 Write a program to Exchange the content of FFh and

FF00h, where one is internal memory location and
other is memory external location.
MOV DPTR, #0FF00h ; take the address in dptr
MOVX A, @DPTR ; get the content of 0050h in a
MOV R0, 0FFh ; save the content of 50h in r0
MOV 0FFh, A ; move a to 50h
MOV A, R0 ; get content of 50h in a
MOVX @dptr, A ; move it to 0050h
 P ROGRAMING WITH 8051

 Write a program in 8051 to unpack the BCD number stored in

register A
 MOV A, #92H ; load the number in accumulator.
 MOV B, A ; Store the number in register B
 ANL A, #0F0h ; mask lower nibble
 SWAP A ; MSB digit= LSB digit
 MOV R1, A ; Store the result in register R1
 MOV A, B ; Load the number back in accumulator
 ANL A, #0Fh ; Store the result in register R0
 HERE: SJMP HERE
 P ROGRAMING WITH 8051

 Write a program to generate square wave of 50% duty

cycle (with equal portions high and low) on the P1.5 bit.
Timer 0 is used to generate the time delay.

 Write a Program to generate a rectangular wave of

1KHz having 25% duty cycle from TXD pin of 8051 using
timer1. Assume XTAL of 12MHz.

 Write a program for the 8051 to transfer letter “A”

serially at 4800baud, continuously.

 Write a program to transfer the message “YES” serially

at 9600 baud, 8-bit data, 1 stop bit. Do this
continuously.
 P ROGRAMING WITH 8051

 Program the 8051 to receive bytes of data serially,

and put them in P1. Set the baud rate at 4800, 8-bit
data, and 1 stop bit.

 Write a program to perform the following:

 Keep monitoring the P1.2 bit until it becomes high
 When P1.2 becomes high, write value 45H to port 0
 Send a high-to-low (H-to-L) pulse to P2.3

 Write a program to get the status of the switch and

send it to the LED. Assume switch is connected to pin
P1.7 and an LED to pin P2.0
 P RGRAMING WITH 8051

 Write a program to get the x value from P1 and send x2 to P2,

continuously

 After the execution of the following program what will be the

contents of R3.

 MOV R3, #00H

 MOV R1, #02H

 MOV R2, #04H

 UP: INC 03H

 DJN2 R2, UP

 DJN2 R1, UP

 HERE: SJMP HERE

 P RGRAMING WITH 8051

 Explain the following instructions in 8051

 MOV C, P0.7
 XCHDA, TL0
 CJNE A, 24H, Repeat
 RETI

 Explain the addressing modes of 8051 Also compare

MOV, MOVX and MOVC Instructions.