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Flip Flops

It is the topic on flip flops of computer system architecture

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Arpna mamta
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22 views

Flip Flops

It is the topic on flip flops of computer system architecture

Uploaded by

Arpna mamta
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Flip-flop types, their Conversion

and Applications
Flip-flop is a circuitthat maintains a state
until directed by input to change the state.
A basic flip-flop can be constructed using
four-NAND or four-NOR gates.
Types of flip-flops:

1.RS Flip Flop


2. JR Flip Flop
3. D Flip Flop
4. T Flip Flop
Applications of Flip-Flops
These are the various types of flip-flops being
used in digital electronic circuits and the
applications of Flip-flops are as specified
below.

Counters
Frequency Dividers
• Shift Registers
Storage Registers
R ( reset) s

o 0 1 0 (afters 0)

2 o O O I (afters l)
S(set) 100
(a) Logic diagram (b) Truth table

Figure6-2 Basic flip-flopcircuit with


NOR gates
(b) Truth table
Figure 0-3 Basic flip-flop circuit with NAND gates
indeterminatß

indeterminate
c diagram (c) Characteristic table

SR

SR = O

(b) Graphic symbol (d) Characteristic equation

Figure6-4 Clocked RS flip-flop


Flip-Flop Excitation Tables
TABLE 4-10
Hip—mopExcitation Tables
(a) JK Flip-Flop (b) SR Flip-Flop
J
o x
x o
(c) O Flip-Hop (d) TFlip-F10p

Table 4—10Flip-Flop ExcitationTables


D Flip-Elop
The I) flip-flop sho« n In ( ihc_clockctl RS-flxp.flop--
It Into a
clocked RS flip-flop
throuch cate S, IS the input. As lone as the, c.I(wk input at 0,
gates 3 and a hase a I tn outputs. rdlcss of thc value of the other Inputs.
Tliisconfortns to the requnetncnt that thc Inputs of a bastc flip-flop
'Ihc Input sampled during the
. the output of gate 3 goes to 0. the
flip-fier to the set slate (upless It already set). If It IS 0, the output of gate
to 0, the flip-flop to the clear state
The D fhp-flep recetvcs the designation from Its ability to transfer •data"

4 2
5

(a) Logic diagram with NAND gates

Q D Q (t 4-1) o I
(2 o O 0
o
o o

(b) Graphic symbol (c) Characteristic table (d) Characteristic equation

Figure 6-5 Clocked D flip-flop


(a) Logic diagram
Q oo

0000
0010

(b) Graphic symbol table


(c) Characteristic (d) Characteristic equation

Figure 6-6 Clocked JK flip-flop


CC
0

の 0 (り

0 (し
① 丁

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