DELL - Latitude 3490 3590 - LA-F115P
DELL - Latitude 3490 3590 - LA-F115P
1 0
7
ZZZ PCB R1 ZZZ PCB R3 @ : Un-pop Component
UMA@/DIS@ : UMA & DIS Type
1
DA8001BS000 DAZ21C00101
PCB@ PCB_R3@ U22@/U42@ : KBL U/KBL U-R
0
PCB 21C LA-F115P REV0 M/B 3 PCB CAL50 LA-F115P LS-F111P GOLD A31 ! SKL@/KBL@:SKL/KBL
EC@ : EC
2
KBL R1
UC1
KBL R3
UC1
JP@/PJP@ : JUMP
EMI@/ESD@/RF@ : EMI, ESD and RF Component 2 2
@
SA0000AWC0L SA0000AWC2L
i7KBLR_1.8G_QS@ i7KBLR_R3@ @EMI@/@ESD@/@RF@ : EMI, ESD and RF Un-POP Component
S IC A31 FJ8067703281816 QNBF Y0 1.8G S IC FJ8067703281816 SR3LC Y0 1.8G A31! TYPEC@EMI@/TYPEC@ESD@/TYPEC@RF@:EMI, ESD ,RFTYPEC Component
UC1 UC1
MAD@RF@:RF MAD Component
w
SA0000A370L SA0000AWB3L
i5KBLU_2.5G_R1@ i5KBLR_R3@ LOKI@EMI@/LOKI@ESD@:EMI/ESD LOKI Component
ie
S IC FJ8067702739739 SR2ZU H0 2.5G A31! S IC FJ8067703282221 SR3LB Y0 1.6G A31! CMC@ : XDP Component
UC1
SA0000AWB1L
UC1
SA0000B2Y1L
CONN@ : Connector Component
TP_WAKE@/NTP_WAKE@ : TouchPad wake
v
i5KBLR_1.6G_QS@ i3KBLU_R3@
KBBL@ : KB Backlight
re
S IC A31 FJ8067703282221 QNEG Y0 1.6G S IC FJ8067702739765 SR3JY H0 2.7G A31!
UC1
SA0000AQZ0L
UC1
SA0000ADV3L
TPM@/FTPM@ : HW TPM/SW TPM
3
i7KBLR_1.8G_ES@ KBLU_Pentium_R3@ MMC@ : eMMC 3
S IC A31 FJ8067703281813 QN5C Y0 1.8G S IC FJ8067702739932 SR348 H0 2.3G A31! FFS@ : Free Fall Sensor
L TYPEC@/LOKI@TYPEC@ : typeC
UC1 UC1
SA0000A344L SA0000ADL3L
DSX@ : Deep sleep
L
i7KBLU_2.7G@ KBLU_Celeron_R3@
S IC FJ8067702739740 SR2ZV H0 2.7G A31! S IC FJ8067702739933 SR349 H0 1.8G A31! GEN8@/GEN9@:RTC GEN8/9
ODD@:ODD Component
E
UC1 UC1
D
S IC FJ8066201931106 SR2UW D1 2G A31! S IC FJ8066201931106 SR2UW D1 2G A31!
UC1 M2_50@ : GPU R17M_2_50
Layout Dell logo 2G@/2G_H@/2G_S@/2G_M@ : VRAM type
r
SA0000B2Y0L
i3KBLU_R1@
4G@/4G_H@/4G_S@/4G_M@ : VRAM type
fo
UC1
4 4
SA0000A374L
i5KBLU_R3@
UC1
Security Classification Compal Secret Data Compal Electronics, Inc.
SA0000AWS0L Issued Date 2016/12/01 Deciphered Date 2017/12/01 Title
COPYRIGHT 2014 i5KNLR_R1@ Cover Page
ALL RIGHT RESERVED THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
REV: X00 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
PWB: 9HTP8 MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-F115P
Date: Thursday, October 05, 2017 Sheet 1 of 65
A B C D E
A B C D E
5
DDR4
4GB/8GB
DDR4 2400MHz Channel A
GPU SODIMM A
P20
0
1 1
VRAM(GDDR5)* 4 AMD
2GB/4GB GDDR5 R17M-M2-50 PCIe x 4
(15"/17") DDR4
P49~50
25W 4GB/8GB
DDR4 2400MHz Channel B
P44~48
0
SODIMM B
P20
USB2.0 x 1
1
Port 1 (USB3.0 Type-A)
USB3.0 x 1
eDP connector eDP 1.2 Intel CPU P26
P28 Kabylake - U
7
Kabylake - R USB2.0 x 1
HDMI connector , 1.4 DDI x 4 15W Port 2 (USB3.0 Type-A)
P33 USB3.0 x 1
P26
VGA
Connector
# VGA converter
RTD2166
DP x 2 # DP re-driver
PS8330
DP x 2 # DP MUX
PS8338
P39
DDI x 4
USB2.0 x 1
USB3.0 x 1
1
Port 3 (USB2.0 Type-A)
0
# USB3.0 re-driver USB3.0 x 1
2
PS8713
DP x 4
USB2.0 x 1 # WWAN
2 2
PCIe x 1
USB3.0 x 1 or DP x 4 Type-C MUX USB3.0 x 1
TI TUSB546
USB Type-C P39
Connector
@
PD controller Type-C USB2 MUX Card reader
CC , USB2.0 USB2.0 x 1 USB2.0 x 1 USB2.0 x 1 SD 3.0 SD Card slot
Cypress CCG4 TI TS3DS10224 RTS5170
P40 P38 P40 # RTS5176E
w
P32
SATA x 1
M.2 SSD (NVMe)
PCIe x 4 USB2.0 x 1
ie
P37 Camera
P28
ODD SATA x 1
v
P28
2.5" SATA x 1
HDD/SSD
re
USB2.0 x 1 Finger print
P31
P27
3 3
# FFS SMBus
SPI # dTPM
P31
NPCT650VB2YX
P26
L
*UMA only SPI ROM
P42
16 MB
2CH SPEAKER P8
(2CH 2W/4ohm)
L
HDA CODEC HDA RTC
RING2/SLEEVE Realtek ALC3246-CG
HP_R/L
P23
E
Universal Jack
P24 Precision
I2C
Touchpad
Click Pad
P26
P6~19
D
eSPI PS/2
r
4
SMSC KBC 1416 4
MEC1416-NU
Battery RTC P25
fo
I2C
Charger Daughter board
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-F115P
Date: Thursday, October 05, 2017 Sheet 2 of 65
A B C D E
5 4 3 2 1
POWER STATES
Signal SLP SLP SLP ALWAYS SUS RUN USB 2.0 DESTINATION USB3.0 PCIE SATA DESTINATION
S3# S4# S5# PLANE PLANE PLANE CLOCKS
State
5
1 USB2.0 port1 USB3.0-1 USB3.0 port1
S0 (Full ON) / M0 HIGH HIGH HIGH ON ON ON ON 2 USB2.0 port3 , IO/B USB3.0-2 WWAN , IO/B
0
D D
0
4 TypeC USB3.0-4 TypeC
S4 (Suspend to DISK) / M3 LOW LOW HIGH ON OFF OFF OFF
5 Camera USB3.0-5 PCIE-1 GPU
1
S5 (SOFT OFF) / M3 LOW LOW LOW ON OFF OFF OFF 6 Card reader , IO/B USB3.0-6 PCIE-2 GPU
7 BT PCIE-3 GPU
7
G3 OFF OFF OFF OFF OFF OFF OFF
8 Touch screen PCIE-4 GPU
DS3 LOW HIGH HIGH ON ON OFF OFF
1
9 Finger printer PCIE-5 10/100 LAN
10 WWAN , IO/B PCIE-6 WLAN
Voltage Rails
0
PCIE-7 SATA-0 SATA HDD
Power Plane Descript i on S0 S3 DS3 S4/S5 M3
+SDC_IN Adapter power supply N/A N/A N/A N/A N/A PCIE-8 SATA-1 SATA ODD
2
+17.4V_BATT++ Bat t er y po wer s uppl y N/A N/A N/A N/A N/A
PCIE-9 NVME SSD
+19VB AC or bat t er y po wer r ail f or po wer ci rc ui t N/A N/A N/A N/A N/A
+VCC_CORE Core voltage for CPU ON OFF OFF OFF OFF PCIE-10 NVME SSD
+VCC_GT Sliced graphics power rail ON OFF OFF OFF OFF
C
PCIE-11 SATA-1* NVME SSD C
+0.6V_DDR_VTT DDR +0.6VS power rail for DDR terminator ON OFF OFF OFF OFF
+1.0V_PRIM System +1.0V power rail ON ON OFF ON* ON PCIE-12 SATA-2 NVME SSD
@
+1.0VS_VCCIO +1.0VS IO power rail ON OFF OFF OFF OFF
+1.0V_MPHYPLL +1.0V power for PCH MODPHY rails ON/OFF ON/OFF OFF ON/OFF ON
+0.95VSDGPU +0.9VS power rail for GPU ON OFF OFF OFF ON
+1.35V_MEM_GFX +1.35VS power rail for GPU ON OFF OFF OFF ON
w
+1.2V_DDR DDR4/L-RS +1.2V power rail ON ON ON OFF ON Board ID & Model ID table
+2.5V_MEM DDR4/L-RS +2.5V power rail ON ON ON OFF ON
+1.8V_PRIM System +1.8V power rail ON ON OFF ON* ON Item Pull-down Pull-up Voltage Board ID/Model ID
ie
+1.8VS System +1.8VS power rail ON OFF OFF OFF ON EVT
1 100 10.0 3.000
+3VALW System +3VALW always on power rail ON ON ON ON* ON
+3VLP +19VB to +3VLP power rail for suspend power ON ON ON ON ON 2 100 13.7 2.902
+3.3V_ALW_DSW +3VALW power for PCH DSW rails ON ON ON ON* ON
v
3 100 17.8 2.801 DVT1
+3VALW_PCH +3VALW power for PCH suspend rails ON ON OFF ON* ON
+3VS System +3VS power rail ON OFF OFF OFF ON 4 100 22.1 2.703
re
+3VGS +3VS power rail for GPU ON OFF OFF OFF ON DVT2
5 100 27.0 2.598
+1.8VGS +1.8VS power rail for GPU ON OFF OFF OFF ON
+5VALW System +5VALW power rail ON ON ON ON* ON 6 100 32.4 2.492
+5VS System +5VS power rail ON OFF OFF OFF ON
B 7 100 37.4 2.402 B
+RTC_CELL RTC power ON ON ON ON ON
+VCC_SA System Agent power rail ON OFF OFF OFF ON 8 100 49.9 2.201 Pilot
L
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF
9 100 57.6 2.094
10 100 64.9 2.001
E L 11
12
13
14
100
100
100
100
73.2
82.5
93.1
107.0
1.905
1.808
1.709
1.594
D
15 100 120.0 1.500
16 100 137.0 1.392
r
17 100 154.0 1.299
18 100 200.0 1.100
fo
19 100 232.0 0.994
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Index and Configuration
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-F115P
Date: Thursday, October 05, 2017 Sheet 3 of 65
5 4 3 2 1
5 4 3 2 1
PJPM01
RT8207PGQW
(PUM01)
SIO_SLP_S4 #
+1.2VP
PJPM02
+1.2V_DDR
05 D
0
SIO_SLP_S3 #
SIO_SLP_S0 # JP1
TPS22961
(UZ2) +1.0V_VCCSTG +1.0VS_VCCIO
0.6V_DDR_VTT_ON PJPM03
+0.6VSP +0.6V_DDR_VTT
0ohm 0603
+1.0V_MPHYGT
1
(RC174)
PJPH01 POK PJPH02 SIO_SLP_S4 #
RT6228AGQUF TPS22967
(PUH01) +1VALW P +1.0V_PRIM (UZ1) +1.0V_VCCST
7
JP7
EM5209VF DGPU_PW R_EN
(UZ5) +0.95VSDGPU
FUSE 1.5A_24V 0ohm 0603
(F1) +DCBAT_LCD (R13) +TPAN_VDD
1
0ohm 0805
PJPW01 DGPU_PW ROK PJPH3 (RA1) +5V_PVDD
RT6226AGQUF
(PUW01) +1.35VGPUP +1.35V_MEM_GFX
0
JP5 +5V_HDD
USB_EN#
SY6288D20AAC
(UU1) USB30_VCCA
JP6 +5VS_ODD
2
PJP501 PJP502
CPU PWR EN_5V PJP503 USB_EN#
SY8180CRAC SY6288D20AAC
GPU PWR (PU501) +5VALW P +5VALW (UU3) USB30_VCCB FUSE 1.5A_6V
C
(FI1) +5V_HDMI C
Peripheral Device PWR
SIO_SLP_S3 #
PJP301 EM5209VF FUSE 0.5A_13.2V
(UZ3) +5VS (F3) +5V_KB_BL
SY8180CRAC BAS40C
(PU301) +3VLP (D1) +RTC_CELL
ADAPTER OVP_T RIP_P 1 CHARGER
AP22815AW5-7 5A_Z120_25M_0805_2P AON7409 AON7409 ISL9538HRTZ-T
EN_3V (UT7) +CCG_VBUS (PLS11 , PLS12) +CCG_VBUS_1 (PQS01) +VBUS_DC_SS (PQS02) (PUB01)
@
+RTC_VCC
POK
RT9069-33GB
(UT4) +3.3V_VDD_PIC
CHARGER
ISL9538HRTZ-T +PW R_SRC
(PUB01) (+19VB)
LCD_VCC_TEST_EN_R
or
PJP302 SIO_SLP_S3 # EDP_VDD_EN
EM5209VF SY6288C20AAC
+3VALW P +3VALW +3VS +LCDVDD
w
(UZ3) (U1)
PCH_PW R_EN
EM5209VF SY6288C20AAC
(UZ7) +3VALW_PCH (UZ6) +3.3V_W WAN
BATTERY
ie
DS3 only JP9
DGPU_PW R_EN
0ohm 0603 TPS22967DSGR
(RM1) +3V_EMMC (UZ4) +3VGS
UMA only
v
JP8
PJP1801 POK PJP1802 DGPU_PW R_EN
RT8061AZQW EM5209VF
(PU1801) +1.8VALWP +1.8V_PRIM (UZ5) +1.8VGS
B B
re
0ohm 0603
(RM2) +1.8V_EMMC
DRVON
PWM1_2ph_CPU
NCP302045MNTXG NCP302045MNTXG
(PUI01) (PUI02) +VCC_CORE
NCP302045MNTXG
(PUG01)
NCP81253MNTBG
(PUA01)
DRVON
L
DRVON
L
PWM_1a_CPU
PWM_1b_CPU
+VCC_GT
+VCC_SA
D E ISL62771HRTZ-T
(PUV01)
DGPU_PW R_EN
+VGA_CORE
fo r 4 3 2
Security Classification
Issued Date 2016/12/01
Compal Secret Data
Deciphered Date 2017/12/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size
Date:
1
Compal Electronics, Inc.
Power Rail
Document Number
LA-F115P
Thursday, October 05, 2017 Sheet 4 of 65
Rev
0.1
5 4 3 2 1
5
+3VALW_PCH +3VS
KBL-U 1k ohm 2.2k ohm
R7 MEM_SMBCLK 253
SMBCLK PCH_SMBCLK PCH_SMBCLK SCL
D
R8 MEM_SMBDATA
DMN66D 254 DIMMA D
SMBDATA PCH_SMBDAT PCH_SMBDATA SDA DDR4
0
SMBus Address: 000
253
PCH_SMBCLK SCL
R9 SML0_SMBCLK 1k ohm DIMMB
SML0CLK 254
0
+3VALW_PCH PCH_SMBDATA SDA DDR4
W2 SML0_SMBDATA 1k ohm SMBus Address: 010
SML0DATA
DIS@
1k ohm 45.3k ohm 1
PCH_SMBCLK SCL
DIS@ 4 FFS
+3VALW_PCH +3VGS
1
1k ohm 45.3k ohm PCH_SMBDATA SDA LNG2DM
W3 SML1_SMBCLK U7
SML1CLK VGA_SMB_CK3 SMBCLK
13
V3 SML1_SMBDATA
DMN66D U8
dGPU PCH_SMBCLK SCL
7
SML1DATA VGA_SMB_DA3 EXO VGA
SMBDATA 14
PCH_SMBDATA SDA
1
U6 U7
I2C0_SDA_TCH_PAD 19 SCL
MCP23008T
I2C0_SCL_TCH_PAD 20 SDA (MB) SMBus Address: 0x4e/0x4f
0
2.2k ohm @ 2.2k ohm
2
8
SML1_SMBCLK SML1_SMBCLK THM_SML1_CLK SCL Thermal
C DMN66D 7 NCT7718W C
SML1_SMBDATA SML1_SMBDATA THM_SML1_DATA SDA
SMBus Address: 1001100xb (x is R/W bit)
12 11
4.7k ohm
+3VS 2.2k ohm
+TP_VDD
@
6
KBC I2C0_SCL_TCH_PAD
DMN66D
I2C_SCL_TP
7
MEC 1416 I2C0_SDA_TCH_PAD I2C_SDA_TP
1 TP CONN
4.7k ohm CLK_TP_SIO
2
+TP_VDD DAT_TP_SIO
4.7k ohm SMBus Address: $2C
w
78
PS2_CLK0 CLK_TP_SIO
79
PS2_DAT0 DAT_TP_SIO
ie
4.7k ohm
4.7k ohm
+3VALW_EC
9 100 ohm 4
SMB01_CLK PBAT_CHG_SMBCLK CLK_SMB SCL
BATT CONN
v
SMB01_DATA 8 100 ohm 5
PBAT_CHG_SMBDAT DAT_SMB SDA
SMBus Address: 0x01
B B
0 ohm 3
re
SDA
0 ohm 4 Charger
SCL ISL9538
SMBus Address: 0001001 (R/W#)
4.7k ohm
2.2k ohm
L
SMB03_DATA 89 16 28 22 TUSB546
TYPEC_SMBDA
CCG4 MUX_I2C_DATA
I2C_SDA_SCB1_EC SDA_4 SDA
L
0 ohm 3 B_INp 18 A6 DP1
TYPEC_SMBDA_R DN1
MUX 17 A7
0 ohm 4 TS3DS10224
TYPEC CONN
TYPEC_SMBCLK_R 8 B7 DN2
B_INn DP2
9 B6
D E A
fo r 4 3 2
Security Classification
Issued Date 2016/12/01
Compal Secret Data
Deciphered Date 2017/12/01
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Title
Size
Date:
1
Compal Electronics, Inc.
SMbus Block Diagram
Document Number
LA-F115P
Thursday, October 05, 2017 Sheet 5 of 65
Rev
0.1