SCALABLE MULTICORE QORIQ

LAYERSCAPE PROCESSORS

NXP TECHNOLOGY DAY

MARCH 2016
HAIM COHEN
FEBUARY2016
ACCELERATING TECHNOLOGY TRENDS
DRIVE OPPORTUNITIES FOR NXP
Secure Connections for a Smarter World

Everything Everything Everything

Connected Smart Secure

1B+ additional 40B+ devices with Potential savings to

consumers online, intelligence shipped economy up to
30B+ connected devices in 2020 half trillion dollars
Connectivity ,
Processing Security

Source: Euromonitor; Gartner; ARM Holdings; UBS; Center for Strategic and International Studies;
1 McAfee, NXP analysis, International Telecommunications Union
EXPANDED SOLUTIONS FOR CUSTOMERS

#1 #1 #1 Secure Identification
#1 Communications Processors COMMUNICATIONS BROAD-BASED
PROCESSORS MCUs1 #1 Car Entertainment
#1 RF Power Transistors #1
SECURE #1 In-Vehicle Networking
#1 Automotive Radar
IDENTIFICATION #1 Secure Car Access
#1 Automotive Safety2
#1 Smart Card MCUs
#2 MCUs
#1 #1 Small Signal Discretes
#1 AUTOMOTIVE #1
RF POWER SMALL SIGNAL
TRANSISTORS DISCRETES

Sources: HIS, ABI Research, Strategy Analytics, The Linley Group

2 (1) MCU market excluding Automotive
(2) Automotive Analog and Sensors in Airbag, Braking, Radar, and TPMS applications
A NEW POSITION OF STRENGTH (1)

✓ 50+ year history ✓ 50+ year history

>$10B ~45,000 35+
✓ 17,300 employees IN ANNUAL EMPLOYEES COUNTRIES ✓ 28,000 employees
REVENUE
✓ $4.59b in revenue ✓ $6.03b in revenue
✓ 20.7% EBIT ✓ 27.2% EBIT
11,000+ 9,000+ 4th Largest
✓ $839m in R&D ENGINEERS PATENT SEMICONDUCTOR ✓ $723m in R&D
FAMILIES COMPANY
GLOBALLY

3 Note:
1. All financial figures are based on trailing twelve month reported information; R&D expense and EBIT % are non-GAAP
IOT NEEDS A SECURE AND DYNAMIC NETWORK

Secure Secure
Connections Connections
Trust Architecture Trust Architecture Trust Architecture

MPUs MCUs MPUs MCUs

MPUs
NFC RFID NFC RF
Sensors Analog Sensors Analog Analog
Connectivity Connectivity
Big Data
Edge Nodes Gateway Cloud Application/Action

4
Power & ARM®: A Balanced Strategy for the Market

Continue to drive the “Core” - Power Broaden Market Reach– ARM Addition
1. #1 in wireless/wired Networking 1. First 64-bit ARM® Networking SoC
2. 9 of top 10 WLAN vendors 2. Largest ARM portfolio for Networking
3. 30+ years of R&D leadership 3. Auto, Consumer and Industrial
4. Utilize our communications. expertise

AND

NXP has infrastructure in place to support both Power and ARM

5
Continuing the Leadership: Power-based SoC Solutions

Core Network
Cloud Networking
Wireless

Scalability 24 Virtual Cores T4240

Performance up to 1.8GHz

Integration T4160

Enterprise Campus Leadership in

Line Cards T4080 virtualization
Eight Virtual Cores
up to 1.8GHz
T2080
Quad-Core up to 1.4GHz
Integrated GE Switch T2081
Branch Office Pin compatible solutions
Quad-Core
Industrial up to 1.4GHz
T1040
- Dual-Core up to 1.4GHz
- Integrated GE Switch
Dual-Core
T1042
up to 1.4GHz
• Scaling 1 to 8 cores
T1020 • Power <4W to <20W
Lowest $/W
• Performance 2 to 20Gbps
T1022
T1024 The industry’s most scalable
T1014 pin compatible communication
processor family

6
DIGITAL NETWORKING: BUSINESS EVOLUTION
TODAY FUTURE
Service Provider Service Provider
Wireless & Wired Equipment Wireless & Wired Equipment

Enterprise / Data Center Enterprise / Data Center

Network Infrastructure Network Infrastructure

General Embedded Smart World Infrastructure

Industrial, Mil/Aero, Printing & Imaging IoT Infrastructure, Cloud Edge

Expansion
IoT Infrastructure: Other Base Market
Smart Home
General
Embedded M2M – Industry 4.0
Service Smart Grid Service
Enterprise Provider Provider
Cloud Edge:
Intelligent NIC
Storage Infrastructure Enterprise
Connected Car
Infrastructure

7 Expansion Markets Now Target Segments for Digital Networking

 QorIQ Multicore Communications Processor Solution Roadmap
QorIQ
Next Gen
LS3
High
Next Gen
Performance T4240
12x e6500-dual thread LS3
40W+ TDP
LS2085A Next Gen
LS2088A
8x A57 LS2
8x A72
T2080 LS2045A
LS2048A
Mid range 4x e6500 dual thread 4x A57 Next Gen
8x A72
Performance LS2
15-40W TDP LS1088A
8x A53
LS1048A Next Gen
4x A53 LT1
T1040/42 LS1043A
LS1046A
4x A53
Value 4x e5500 4x A72
<10W TDP LS1023A LS1026A Next Gen
T1024 2x A72
LS1024A 2x A53 LS1
2x e5500
LS1020 / LS1021 / LS1022
2x A7 LS1012A:
LS102MA
1x A53

B4860

Wireless G4860
Qonverge BSC9132
Femto-Macro BSC9131

4Q 1Q 2Q 3Q 4Q 1Q 2Q 3Q 4Q 1Q 2Q 3Q 4Q 1Q 2Q 3Q 4Q
2014 2015 2016 2017 2018

NXP investing in both Power and ARM® portfolio

Scalable portfolio from 1 to 20+ cores with common SW framework and SDK
Production
8 Production Execution Planning Proposal

Sample
 NXP Digital Networking ARM®-based Processor Roadmap
9
8
7
6
5

LS2080A LS2088A
3 LS1046A
• Octal core • Octal core
LS1088A • Quad core • Cortex-A57 • Cortex-A72
2 LS1043A • Octal core • Cortex-A72
• Quad core • Cortex-A53
LS1023A • Cortex-A53

1 LS1024A •• Dual core

Cortex-A53
• Dual core
LS1021A • Cortex-A9
• Dual core
• Cortex-A7
LS1012A
• Single core
• Cortex-A53

NXP Leading ARM revolution in Networking

9
 LS1021A: Dual ARM® Cortex® A7 Processor
2

• 2 x ARM Cortex A9 CPUs, up to 1.0GHz

 ECC protected L1/L2 caches
 DDR3L/4 up to 1.6GHz
• Over 5,000 Coremark at under 3.7W (TDP
power)
• Industry best Coremark / mW ratio
• Outstanding security and IP forwarding
• High integration reduces BOM costs for targeted
applications:
 Industrial gateways
 Industrial Automation
 Printing & Imaging
 HMI
Key Architectural Features: Key System Integration Features:  M2M, Smart “X”
• ARM AMBA4 MPCore™ Virtualization • Low-cost NAND/NOR flash systems
• DDR3L/4 32-bit with ECC support • Low-cost DRAM systems
• 3-port GigE with IEEE 1588 • USB3 SuperSpeed Package & Board:
• 2x PCI Express Gen2 • Audio networking and motor control Package: 525-pin, 19x19mm, 0.8mm ball pitch
• Multi-protocol 4-Lane SerDes • QorIQ processors Trust Architecture and Power: ~2.8W @1.0GHz Typical
• PCIe-2, SATA3, SGMII ARM TrustZone support Temp: -40C (TA) to 105C (Tj)
• QUICC Engine – HDLC/TDM/ProfiBUS • Alignment with Kinetis/Vybrid portfolio Boards: Tower low-cost board
• EnergyStar support with fast wakeup NXP Linux BSPs
• 2Gbps IP forwarding

10
In production now
 3 LS1024A: Dual ARM® Cortex® A9 Processor
ARM ARM
Cortex-A9
General Purpose Processing
Cortex-A9
• 2 x ARM A9 CPUs, up to 1.2GHz
32KB 32KB 32KB 32KB • 256KB L2 cache
L1-D L1-I L1-D L1-I
64-bit
32-bit • Neon SIMD & FPU in all CPUs
64KB
256KB L2 SRAM DDR2/3 • 16/32b DDR2/3 up to 1066MT/s
Memory Controller

Secure Boot
Accelerated Packet Processing
Trust Zone AMBA AXI / AHB crossbar • 2Gbps PPPoE/NAT routing with 64B packets
Flash Controller • 2Gbps crypto acceleration
Power Management • Deep Packet Inspection Engine
SLIC/SLAC, DECT, TDM • Antivirus
2x UART
DPIE
PPFE • Application-specific QoS
1x I2C, 1x I2S
• Advanced Diagnostics
2xSPI, GPIO, JTAG
CE

SATA2

SATA2
PCIe

PCIe
1x USB2.0 + PHY
GbE

GbE

GbE

1x USB3.0 + PHY
DECT
• Integrated DECT and DECT-ULE baseband processor
DECT / DECT-ULE Baseband 3-Lane 5GHz SERDES

High-speed Interfaces
• 2x PCIe 2.0 (5GHz)
Datapath Acceleration
• 2x SATA 2.0 with RAID 0/1/5
• CE - crypto acceleration
• 1x USB 3.0 with PHY
• PPFE - Programmable Packet Forwarding Engine
• 1x USB 2.0 (Host/Device) with PHY
• DPIE – Deep Packet Inspection Engine
• 3x GbE
• 3x RGMII or 2x RGMII and 1x SGMII

11 In production now
 QorIQ LS1043A Processors
Advanced 64b Quad Core ARM® A53 Supporting Network Edge Services
Performance Leading SoCs
Smart Edge Access • Quad ARM A53 CPUs, 64b, up to 1.4 GHz
• Leading headroom for branch
router & WLAN services
• Future Proof, Low Power Memory DDR4
• Multicore for VM services • Extensive Hardware Virtualization
• Hardware offload for secure
edge tunneling • Secure Boot
• Glueless HDLC & TDM support

Industrial Automation
Advanced Packet Processing
• Industrial protocol support • Packet Parse/Classify/Distribution engines
• 10yr life & extended temp
• Lossless flow control & granular traffic management
• Leading 2.5Gbps IMIX Single-pass en/decryption
Line Cards & Control engine
• 64bit ISA & high performance
memory for fast computing
• 10G Base-KR backplane I/0 Fast, Flexible Network Interfaces
• Up to 6x GbE with 2.5G options plus 10GbE XFI
• Integrated QUICC Engine for glueless HDLC, TDM,
Best CPU headroom in its class Industrial Protocols
for Smart Edge, virtual Branch • 3x USB 3.0 interfaces for highest speed LTE, Storage &
Router & WLAN applications Peripheral options

12 Highest Processing Efficiency

• Up to 15 K Coremarks at 8 watts
 5 LS1043A: Quad ARM® Cortex® A53 Processor
ARM
ARM Cortex
Cortex
A53ARM
ARM
A53 64b
64b
Cortex
Cortex
Cores
Cores
Processor
A53
A53 64bCores
64b Cores 32-bit • 4x A53, 64b, up to 1.6GHz
32KB
32KB 32KB
32KB DDR3L/4
32KB 32KB
32KB
I-cache
I-cache
I-cache
32KB
D-cache
D-cache
D-cache
1MB Memory • 1MB L2 cache shared by all cores (and platform
I-cache D-cache L2-cache Controller elements)
Secure Boot
Memory Subsystem
Trust Zone CCI-400™ Coherency Fabric
• 32b DDR3L/4 Controller up to 1600MHz
Power Management SMMU SMMU SMMU SMMU

IFC Flash
CCI-400 Switch Fabric
Security Parse, Classify, Real Time
QuadSPI Flash v5.4 Queue Distribute DMA Debug • Advanced VM hardware support
(XoR, Mgr. Watchpoint
SD/eMMC 1G 1G High Speed Serial IO
SATA 3.0
CRC) Cross
1G 1G 1G 1/10G Trigger

uQE
2x DUART, 6x LP UART
• 3x PCIe Gen2 Controllers
PCIe
PCIe
PCIe

4x I2C / SPI Buffer Perf

Trace
GPIO. FlexTimers, Mgr. Monitor • 1x SATA 3.0, 6Gb/s
PWM
3x USB 3.0 w/PHY
• 3x USB 3.0 with PHY
4-Lane 10GHz SERDES Network IO
• 1x10G + QSGMII or 3x 1/2.5G SGMII + 2x 1G RGMII
Package Data path Acceleration
• FCBPGA, 0.8mm pitch • Proven Packet Parse/Classify/Distribute
• SEC- crypto acceleration
• L2/3 & Custom Classification • Up to 2.5Gbps IMIX
• Tunnel Header Offload • IPSec, GRE, CAPWAP, DTLS Offload
• Reassembly • Lossless Flow Control
• Traffic Management & Shaping

In production now

13 Industry’s most efficient quad core communications SoC solution

 4
LS1023A: Dual ARM® Cortex® A53 Processor
ARM
ARM Cortex
Cortex Processor
A53
A5364b
64bCores
Cores 32-bit • 2x A53, 64b, up to 1.6GHz
32KB 32KB DDR3L/4
32KB
I-cache
32KB
D-cache
1MB Memory • 1MB L2 cache shared by all cores (and platform
I-cache D-cache L2-cache Controller elements)
Secure Boot
Memory Subsystem
Trust Zone CCI-400™ Coherency Fabric
• 32b DDR3L/4 Controller up to 1600MHz
Power Management SMMU SMMU SMMU SMMU

IFC Flash
CCI-400 Switch Fabric
Security Parse, Classify, Real Time
QuadSPI Flash v5.4 Queue Distribute DMA Debug • Advanced VM hardware support
(XoR, Mgr. Watchpoint
SD/eMMC 1G 1G High Speed Serial IO
SATA 3.0
CRC) Cross
1G 1G 1G 1/10G Trigger

uQE
2x DUART, 6x LP UART
• 3x PCIe Gen2 Controllers
PCIe
PCIe
PCIe

4x I2C / SPI Buffer Perf

Trace
GPIO. FlexTimers, Mgr. Monitor • 1x SATA 3.0, 6Gb/s
PWM
3x USB 3.0 w/PHY
• 3x USB 3.0 with PHY
4-Lane 10GHz SERDES Network IO
• 1x10G + QSGMII or 3x 1/2.5G SGMII + 2x 1G RGMII
Package Data path Acceleration
• FCBPGA, 0.8mm pitch • Proven Packet Parse/Classify/Distribute
• SEC- crypto acceleration
• L2/3 & Custom Classification • Up to 2.5Gbps IMIX
• Tunnel Header Offload • IPSec, GRE, CAPWAP, DTLS Offload
• Reassembly • Lossless Flow Control
• Traffic Management & Shaping

In production now

14
Industry’s most efficient quad core communications SoC solution
LS1043A Broadband Home Gateway Reference Design (in development)

NAND DDR4

Flash LS1043A DDR

Dual POTS (FXS)

TDM SLIC POTS (FXS)
ARM ARM ARM ARM
Cortex- Cortex- Cortex- Cortex- SDIO/
USB3.0 SD Card Slot
A53 A53 A53 A53 eMMC
USB3.0 1.6GHz 1.6GHz 1.6GHz 1.6GHz

1MB L2 Cache
mPCIe Slot
Arduino Shield header PCIe Expandable up to 8x8
UART
(ZigBee/BLE/Thread) mPCIe Slot dual-band WiFi
1G 1G PCIe
Console UART 10G 1G 1G 1G

QSGMII F104 Quad PHY

XFI or SGMII
GPON or SFP Module
Copper 10G / 2.5G / 1G

Vx585 xDSL RGMII 4x GbE

xDSL
chipset

15 29
+ Software application software
Introducing the QorIQ LS1088A Processor

Bringing datapath acceleration

to the NETWORK
EDGE

16
QorIQ LS1048A and LS1088A Processors
Target Applications & Key Features
Performance optimized cores with leading power
Intelligent Edge consciousness
Access • 8x ARM® Corte®x-A53 cores, 1.5 GHz, 2 MB L2 cache, w Neon
SIMD
• DDR4 SDRAM support

NFV Solutions
Virtual CPE Delivers needed datapath offload with software
developers in mind
• New datapath hardware and abstracted acceleration that is
called via standard Linux objects
Industrial
• 10Gbps Packet processing performance with security
Control acceleration

Leading network I/O integration

Intelligent
• 2x10Gb Ethernet and 8x 1GB Ethernet
NIC
• PCIe Gen3, Sata3, USB3
• TDM/HDLC support

17
 LS1088A/84A/48A
General Purpose Processing Layer
• 4 or 8 x ARM® A53 CPUs, 64b, 1.5GHz
ARM A53 ARM A53 • 1MB L2 cache / cluster
ARM A53 ARM A53
ARM A53 ARM A53 ARM A53 ARM A53 • HW L1 & L2 Prefetch Engines
32KB 48KB 32KB 48KB 32KB 48KB 32KB 48KB
• Neon SIMD in all CPUs
32KB L1-I
L1-D 32KB L1-I
48KB L1-D 32KB L1-I
48KB L1-D 32KB L1-I
48KB L1-D 48KB
64-bit
L1-D L1-I L1-D L1-I L1-D L1-I L1-D L1-I Memory Subsystem
1MB Banked L2 DDR2/3
DDR4
1MB Banked L2 Memory
• 64b DDR4 up to 2.1GT/s
Controller

Secure Boot CCI-400 Switch Fabric

Trust Zone
Coherency Fabric
• Advanced VM hardware support
Flash Controller IO MMU IO MMU IO MMU

Power Management
Advanced I/O Processor
SDXC/eMMC Buffer
Queue • Programmable packet handling
2x DUART Mgr.

SATA 3.0
Advanced Buffering
4x I2C SEC
IO
High Speed I/O

PCIe
PCIe
PCIe
SPI, GPIO, JTAG Buffer Processor WRIOP
2x USB3.0 + PHY
Mgr. (AIOP)* • 3x PCIe Gen3 controllers
2x1/10 + 8x1
• SATA 3.0, 2 x USB 3.0 with PHYs
4-Lane 10GHz 4-Lane 10GHz
SERDES SERDES Network I/O
Device Security • 2x1/10GbE + 8x1G
• 28HPM Process • Hardware – Encryption (IPSec) • XFI/KR and SGMII/KX
• FCBGA, 0.8mm pitch • Secure Boot • MACSec on up to 4x 1GbE
Power target • Trust Zone & Trust Architecture • uQE for HDLC, T1/E1 support
• <18W • MACSec support
Schedule Performance Industrial connectivity
• Samples: 1Q16 • IPSec: 10 Gbps (IMIX) • Ethernet, Serial (RS485/422), uQE (for
• Production: 4Q16 • IPv4: 10 Gbps (lMIX) additional serial fieldbus applications)
18
* LS1088 only
 6 LS1088A: Octal ARM Cortex A53 Processor

General Purpose Processing Layer

• 8 x ARM A53 CPUs, 64b, 1.5GHz; 2MB L2 cache
System Control ARM Cortex ARM Cortex
ARM
A53 64bv8
ARM v8Core
Core
Cores ARM64bv8
ARM
A53 v8Core
Core
Cores • HW L1 & L2 Prefetch Engines
Internal BootROM ARM v8 Core ARM v8 Core
A53
64-bit • Neon SIMD in all CPUs
Security Fuses
DDR2/3
DDR4 • 1x64b DDR4 up to 2.1GT/s
32KB 32KB 32KB 32KB
Security Monitor Memory
I-cache D-cache I-cache D-cache
Controller
Power Management Interfaces
DMA • Supports x4,x2, x1 PCIe Gen2 controllers
System Interfaces Cache Coherent Interconnect (CCI)
• SATA 3.0, 3x USB 3.0
IFC Flash IO MMU IO MMU IO MMU • SDXC/eMMC
Quad SPI Flash • Network IO
SDXC/eMMC Buffer WRIOP • Wire Rate IO Processor:

TDM/HDLC

TDM/HDLC
Queue
2x DUART Mgr. • 2x 10G and 8 x 1G; MACSEC on 4x 1G
Buffering

SATA 3.0
4x I2C Advanced
SEC
IO • XFI/KR, QSGMII, SGMII/KX, RGMII

PCIe
PCIe
PCIe
GPIO, JTAG Processor
Buffer 2x1/10G 8x1G Datapath Acceleration
Mgr. (AIOP)
3x USB3.0
• SEC- crypto acceleration
• Packet processing engine (AIOP)
4-Lane 10GHz 4-Lane 10GHz
SERDES SERDES • Protocol offload
• Services
Other Parameters
Samples Production • 25 x25mm Flipchip BGA
• 0.8mm Pitch, TBD Pins
May 2016 Dec 2016

19
Unprecedented performance/Watt and ease of use for smarter, more capable networks
 8 LS2080A: Octal ARM® Cortex® A57 Processor
General Purpose Processing
• 8x ARM A57 CPUs, 64b, 2.0GHz
ARM A57 ARM A57 ARM A57 ARM A57
64-bit − 1MB L2 cache
ARM A57 ARM A57 ARM A57 ARM A57
48KB 48KB
32KB 48KB 48KB
32KB DDR2/3
DDR4 • HW L1 & L2 Prefetch Engines
L1-I
48KB
32KB L1-I
L1-D48KB
32KB L1-I
48KB
32KB L1-I
L1-D48KB
32KB Memory
L1-I
L1-D L1-I
L1-D L1-I
L1-D L1-I
L1-D Controller • Neon SIMD in all CPUs
32KB 48KB 32KB 48KB 32KB 48KB 32KB 48KB
L1-D L1-I L1-D L1-I L1-D L1-I L1-D L1-I 64-bit • 1MB L3 platform cache w/ECC
1MB Banked L2 1MB Banked L2 1MB DDR2/3
DDR4
1MB Banked L2 1MB Banked L2 Platform Memory • 4MB Coherent Cache
Cache Controller
• 2x64b DDR4 up to 2.4GT/s
Secure Boot
Coherency Fabric Accelerated Packet Processing
Trust Zone
Flash Controller SMMU SMMU SMMU
• 20Gbps SEC- crypto acceleration
Power Management • 10Gbps Pattern Match/RegEx
Management
SDXC/eMMC PEB Memory
Complex • 20Gbps Data Compression Engine
2x DUART
SRIOV
4x I2C
Queue/ WRIOP
EP Express Packet IO

SATA 3.0

SATA 3.0
DCE SEC Buffer
SPI, GPIO, JTAG Mgr. • Supports1x8, 4x4, 4x2, 4x1 PCIe Gen3

PCIe
PCIe
PCIe
PCIe
2x USB3.0 + PHY controllers
8x1/10 + 8x1
PME − SR-IOV support, Root Complex
8-Lane 10GHz 8-Lane 10GHz • 2 x SATA 3.0, 2 x USB 3.0 with PHY
SERDES SERDES
Other Parametrics Datapath Acceleration • Network IO
• 37.5x37.5 Flipchip • SEC- crypto acceleration • Wire Rate IO Processor:
• 1mm Pitch • DCE - Data Compression Engine
• PME – Pattern Matching Engine
− 8x1/10GbE + 8x1G
• 1292pins
• Management Complex – − XAUI/XFI/KR and SGMII
Configuration Abstraction Samples Production
− MACSec on up to 4x 1/10GbE
Now Dec 2015

20
Full Featured Highly Flexible Platform: 4-8 A57 Cores
9 LS2084A: Octal ARM® Cortex® A72 Processor
General Purpose Processing
• 8x ARM A72 CPUs, 64b, 2.0GHz
ARM A72 ARM A72 ARM A72 ARM A72
ARM A72 ARM A72 ARM A72 ARM A72 64-bit − 1MB L2 cache
48KB 48KB
32KB 48KB 48KB
32KB DDR2/3
DDR4
Memory • HW L1 & L2 Prefetch Engines
L1-I
48KB
32KB L1-I
L1-D48KB
32KB L1-I
48KB
32KB L1-I
L1-D 48KB
32KB
Controller
L1-I
L1-D32KB L1-I
48KBL1-D 32KB 48KB L1-I
L1-D32KB 48KBL1-D 32KB 48KB
L1-I • Neon SIMD in all CPUs
L1-D L1-I L1-D L1-I L1-D L1-I L1-D L1-I 64-bit
1MB Banked L2 1MB Banked L2 1MB DDR2/3
DDR4 • 1MB L3 platform cache w/ECC
1MB Banked L2 1MB Banked L2 Platform Memory
Cache Controller
• 4MB Coherent Cache

Secure Boot • 2x64b DDR4 up to 2.4GT/s

Coherency Fabric
Trust Zone
Flash Controller SMMU SMMU SMMU
Accelerated Packet Processing
Power Management
Management • 20Gbps SEC- crypto acceleration
SDXC/eMMC PEB Memory
Complex
2x DUART • 10Gbps Pattern Match/RegEx
Queue/ SRIOV
4x I2C EP

SATA 3.0

SATA 3.0
DCE SEC Buffer WRIOP
• 20Gbps Data Compression Engine
SPI, GPIO, JTAG Mgr.

PCIe
PCIe
PCIe
PCIe
2x USB3.0 + PHY 8x1/10 + 8x1
PME Express Packet IO
8-Lane 10GHz 8-Lane 10GHz
• Supports1x8, 4x4, 4x2, 4x1 PCIe Gen3
SERDES SERDES
controllers
Other Parametrics Datapath Acceleration − SR-IOV support, Root Complex
Samples Production
• 37.5x37.5 Flipchip • SEC- crypto acceleration
• 2 x SATA 3.0, 2 x USB 3.0 with PHY
• 1mm Pitch • DCE - Data Compression Engine March 2016 Sep 2016
• 1292pins • PME – Pattern Matching Engine Network IO
• Management Complex – Configuration Abstraction • Wire Rate IO Processor:
− 8x1/10GbE + 8x1G
Full Featured Highly Flexible Platform − XAUI/XFI/KR and SGMII
21 4-8 A72 Cores − MACSec on up to 4x 1/10GbE
 NXP Digital Networking ARM®-based Processor Roadmap
9
8
7
6
5

LS2080A LS2088A
3 LS1046A
• Octal core • Octal core
LS1088A • Quad core • Cortex-A57 • Cortex-A72
2 LS1043A • Octal core • Cortex-A72
• Quad core • Cortex-A53
LS1023A
• Cortex-A53

1 LS1024A •• Dual core

Cortex-A53
• Dual core
LS1021A • Cortex-A9
• Dual core
• Cortex-A7
LS1012A
• Single core
• Cortex®-A53

NXP Leading ARM revolution in Networking

22
 LS1046A Target Markets, Key Features

• Highest performance CPU cores in a

Enterprise power envelope
Routers/Switches

• Offload engines – Encryption/

Industrial Computing and Decryption for high performance
Networking security

UTM Security • DPAA – for QoS and balanced

Appliances networking performance

The LS1 embedded processor are • Virtualization to support customers

architected to provide maximum
and 3rd party software
performance per watt

23
 LS1046A: Compelling P2/ P3 upgrade path
• Significant performance increase
− Core performance increased by 75%
− System-level performance:
 L2 cache increased to 2MB
 32/64-bit DDR Controller up to 2.1GT/s

• 64-bit ARM® v8 processor cores

P3041
− 4x A72 up to 1.6GHz

• New Networking interfaces LS1046A

− 2x 10GbE + 3x 1GbE
− 3x PCIe 3.0 P2040/41
− 3x USB 3.0
− 1x SATA 3.0

• The same Datapath architecture

− Datapath Acceleration Architecture 1.0 – the same as in P2040/1 and P3041

• The same power envelope as P2040/1 and P3041

24
 Cortex®-A72 vs Cortex-A57 Benchmark Comparison
Benchmark A57 -> A72 Improvement Reason for Improvement
CoreMark ~ 1.14x Improved Core Branch Prediction Unit
SpecINT2006 ~ 1.12x Improved HW Prefetcher

18% to 25% Better Energy Efficiency 10% to 50% More Performance

Cortex-A72 Performance Uplift

Increase in CPU Efficiency (relative to Cortex-A57)
(Relative to Cortex-A15)
40%
Floating point 25%
30%
+25%
20% Mem streaming 50%

10%
SpecInt avg 12%
0%
Cortex-A57 Cortex-A72
Maia 0% 20% 40% 60%

More performance in constrained thermal

Highest ARM®v8-A performance
budget

25
CPU Summary

• For most workloads, Cortex®-A72 at 1.6GHz is same performance as

Cortex-A57 at 1.8GHz

Cortex-A72 at 1.6GHz better performance than >2GHz Cortex-A57

for floating point or memory streaming workloads

More efficient design than Cortex-A57

26
 7
LS1046A: Quad ARM® Cortex® A72 Processor
Core & Memory
A72 A72 A72 A72 Subsystem
64-bit • 4x ARM Cortex A72 up to 1.6GHz
DDR4
2MB L2 cache • 2MB total L2 cache
Memory Controller
• 64-bit DDR4 up to 2.1GT/s

Secure Boot
Coherent Interconnect (CCI-400) Interfaces
Trust Zone •Three PCIe Gen3 controllers (x4, x2 and
x1)
Flash Controller, QuadSPI IO MMU IO MMU IO MMU
•1x SATA 3.0
Power Management •3x USB 3.0 with PHY
Parse, Classify,
2x SD/SDIO//eMMC Queue Distribute, Autorespond •2x SD3.0/SDIO/eMMC 4.5
Mgr.
4x UART
Network IO

PCIe 3.0

SATA 3.0
PCIe 3.0

PCIe 3.0
SEC
4x I2C
• 2x 10GbE
SPI, GPIO, JTAG Buffer 10 10
G G 1G 1G 1G 1G • 4x 1GbE
Mgr.
3x USB3.0 w/ PHY
Datapath Acceleration
8-Lane 10GHz SERDES • SEC- crypto acceleration
• Datapath Acceleration Architecture 1.x

Samples Production
Other Parameters
June 2016 Dec 2016 •Package:
-23x23mm, Lidless FCBGA
27
Leading Quad A72 processor with two 10GbE ports
 INTRODUCING
LS1012A…

…the world’s smallest and lowest-power 64-bit processor.

28
• Single ARM Cortex-A53 processor
• 1840 DMIPS / 2240 Coremark @ 800MHz
1 LS1012A: Single ARM® Cortex® A53 Processor
• NEON Co-processor and DP FPU
• 256 KB L2 cache with ECC
ARM
• Memory Controller Cortex-A53
• DDR3L up to 1000 MHz
• 16-bit data bus, 1 chip select 32KB 32KB
L1-D L1-I
• High Speed Interconnect 64KB
64-bit
16-bit
DDR2/3
DDR3L
• 1x PCI Express Gen2 256KB L2 SRAM Memory
• 1x SATA Gen3 Controller

• 1x USB 3.0 w/PHY Secure Boot

• 1x USB 2.0 w/ULPI Trust Zone CCI-400 Coherent Interconnect
• Ethernet Packet Accelerator Sec Monitor
• 2x GbE (2.5G or 1G) Power Management
• Datapath 2x SD 3.0/SDIO/eMMC
• Packet Acceleration Engine (PPFE) SEC
2x I2C PPFE
• Security acceleration engine (SEC) 2x I2S, 5x SAI
• 2x SD 3.0/SDIO/eMMC

SATA 3.0
QSPI, 1x SPI

PCIe 2.0
• QSPI, 1x SPI, 2x UART, 2x I2C 2x UART

GbE

GbE
• 2x I2S, 5x SAI GPIO, JTAG
• Secure Boot, Trust Architecture, ARM TrustZone 1x USB3.0 + PHY
3-Lane 6GHz SERDES
• Advanced Power Management 1x USB2.0
• Package: 10x10mm, routable in 4-layers
Samples Production
29 June-2016 Q4-2016
 LS1012A High Level Features
• Processor Complex  Packet Acceleration
− 64-bit ARM® Cortex®-A53 up to 800 MHz
 Packet Acceleration Engine
 NEON SimD / DP FPU
- 2Gbps of PPPoE/NAT routing with 390B packets
 32KB/32KB L1 Parity protected Cache & 256KB L2 Cache with ECC
- RSO/LRO offload
• Data Interfaces (up to 2x 6GHz SerDes Lanes)
 Hardware Security Engine
− 2x Gb Ethernet (2.5G/1G)
- 400 MB/s block mode encryption
− 1x USB3.0 w/PHY
- AES256 CBC, ECB, XTS
− 1x USB2.0 w/ULPI - XOR
− 1x PCIe Gen2 (5 GHz) (x1)
− 1x SATA-3 (6 GHz)  Hardware/Silicon Security
• Memory Interfaces - Secure Boot, JTAG Blocking, 8Kb OTP Memory
- ARM TrustZone + Trust Architecture
− QSPI (NOR flash)
- DRM compliance
− 1x SPI
− 2x SDIO 3.0  Battery Operation
− DDR3L-1066 MHz (16b) - Dynamic Frequency Scaling (DFS) with integrated power
• Control I/Os management
- USB charging
− 2x I2C, 1x SPI
− 2x UARTs
− 2x I2S, 5x SAI
− Watchdog/Timers
− 16 dedicated GPIOs, 6 PWM Capable
• Boot
− SPI FLASH

30
 LS1012A Packet Forwarding Engine - Performance Estimates
Ethernet to Ethernet: NAT Routing
WLAN to Ethernet
Bi-dir Bi-dir 1400
thruput thruput CPU
Frame (IPV4) – (IPV6) - utilization
Size Mbps Mbps target 1200

64 2000 2000 <5%

1000

Thruput Mbps
128 2000 2000 <5%
800
256 2000 2000 <5%
600
512 2000 2000 <5%
400
1024 2000 2000 <5%
200
1280 2000 2000 <5%
0
1518 2000 2000 <5% TCP (ac) UPD (ac) TCP (n+ac) UDP (n+ac)
TX Target 850 956 1050 1200
RX Target 850 957 1050 1200

• NAT routing targets should be achieved with minimal CPU impact for IPV4/6
acceleration

31
LS1012A Ultra-low form-factor package
• Innovative Laminate BGA Technology
− Signal
pins in outer two pad rows with
0.5mm pitch
− Innerballs with 0.8mm pitch used only
for power and ground 9.6mm
• Supports cost-effective 4-layer PCB
• Enables designs with severe space
constraints

9.6mm

32
 LS1012A
ENABLEMENT

33
LS1012A-RDB board

USB2.0 & 3.0 USB

Features KW41Z
BLE /
LS1012A Connector
• 128MB NOR Flash Thread
SDHC2 SGMII GbE GbE
• 256MB DDR3L DRAM PHY
eMMC
• 2x GbE memory
SATA3
• 1x mPCIe SATA

• 1x SATA SDIO Wi-

Fi Module Half-height
• USB3.0 PCIe
mPCIe Connector
• USB2.0
• KW41Z 2.4GHz radio Arduino I2C1
Shield Header QuadSPI 128MB
supports Thread & NOR Flash

Bluetooth Low Energy

SAI2 DDR3L 256MB
• Arduino Shield header for RGMII
16b DRAM
GbE
expansion GbE PHY

USB to JTAG K22 VR5100

PMIC

34
 MC34VR5100: PMIC Solution for LS1012A
High Efficiency, Multi-output buck regulator with up to 3.8A output and six user-programmable LDOs

Differentiating Points
− Optimized to work with single or dual core LS1, T1
network processor systems
− >90% peak, >80% light-load efficiency to meet low
power mode specs for LS1012
− Pre-programmed output voltages, sequencing, and
timing to meet LS1012 applications need
− Dynamic regulator control via I2C
− Voltage, Current Limit, Frequency

Product Features
− Vin = 3.3Vbus Supply (2.8V to 4.5V)
− Three independent buck converters
− Six user programmable LDOs
− Forced PWM/PFM or APS operation
− DDR reference, LiCell Charger, USB-5V Boost
− -40 to +105°C Operating Temp Range
− High power 7x7 mm QFN package

35
35
 TARGET MARKETS &
DIFFERENTIATED
FEATURES
36
 LS1012A Differentiated Features & Target Applications
Performance starts with the core
Cortex-A53
• First 64-bit ARM® Corte®x-A53 core to be offered in a sub- 10x10 mm ARMv8 64b Core Serial IO
package, delivering over 2,000 CoreMark® of performance at 1W (typical)
for outstanding performance at exceptionally low power utilization L1 Cache w/ECC
DDR3L
L2 Cache w/ECC Controller
• Best in class 2.5 CoreMark / mW ratio
Packet Engine Security Engine
Broadest range of peripheral and I/O features in the sub-
USB3.0
$10 ASP price range w/PHY
1x GbE
PCIe SATA 3
• Only product in its class to offer Packet Acceleration for IP forwarding USB2.0 1x GbE
and NAS, delivering ourstanding packet throughput for this power/package
envelope
LS1012A Target Applications
• Trust and Security acceleration enables root of trust and high
performance encryption consistent with much higher cost microprocessors Consumer NAS
Value tier IOT gateway
• First in its class to offer 64-bit support for battery powered mobile
applications and performance efficiency Battery Powered Mobile NAS

• Only 1W 64-bit processor to combine USB 3.0 with integrated PHY, Entry BB Ethernet Gateway
PCIe, 2.5 Gigabit Ethernet and SATA3 on a single SoC to enable lower Trusted Gateway
system-level costs
Industrial Automation & Control
• Enables low-cost, 4-layer board level designs together with high system Building Control systems
level integration to support ultra-small form factor systems
Ethernet Drives
37
Networked Audio
 Use Case Examples

38
 IOT Gateway Use Case

Value IOT Gateway

39
 Ethernet Drive and USB to SATA DAS Use Cases

Ethernet Drive

USB to SATA Bridge

40
 Value IoT Gateway with Audio Networking

41
 Consumer NAS/DAS Use Case
Consumer NAS/DAS
w/optional Wi-Fi

42
 Ethernet Drive and USB to SATA DAS Use Cases

Ethernet Drive

USB to SATA Bridge

43
 Battery Powered Portable NAS Use Case

Portable NAS/Router with

battery power option

44
LS1012A Power Management Features
• Packet-forwarding engine offloads
CPU and reduces power consumption
• Typical 1W power consumption when
active
• Dynamic Frequency Scaling
• On-chip temperature monitor
• Clock-gating of major functional
blocks

45
 LS1012A Security & Trust Architecture Features

TZASC
DDRC
Security Capabilities Supported
• Secure boot – hardware root

TZMA
TZPC
OCRAM
of trust A53

• Secure key handling

• Tamper detection SEC 5.5

• Secure manufacturing Internal BootROM Job Queue

DMA
PROG_SFP Controller

• Secure debug Security Fuse Processor DECO

RTIC
HP_TMP

• ARM® TrustZone Security Monitor

• Cryptographic acceleration
PKHA RNG MDHA AESA DESA
Secure Debug Ctrl

IPsec ucode

PPFE

46
 LS1012A Cryptographic Acceleration features
(1) Public Key Hardware Accelerator (PKHA)
Job Queue

DMA
•RSA and Diffie-Hellman (to 4096b)
•Elliptic curve cryptography (1024b) Job Ring I/F Controller
•Supports Run Time Equalization
Descriptor

RTIC
(1) Random Number Generator (RNG)
•NIST Certified Controller
•RNGB in P1010, RNG4 in PSC9131

(1) Message Digest Hardware Accelerators (MDHA)

•SHA-1, SHA-2 256,384,512-bit digests
• MD5 128-bit digest CHAs
•HMAC with all algorithms PKHA RNG MDHA AESA DESA

(1) Advanced Encryption Standard Accelerators (AESA) Function Rate (Gbps)

•Key lengths of 128-, 192-, and 256-bit
•ECB, CBC, CTR, CCM, GCM, CMAC, OFB, CFB, and XTS AES 1.6

3DES 1.4
(1) Data Encryption Standard Accelerators (DESA)
•DES, 3DES (2K, 3K) SHA-256 1.9
•ECB, CBC, OFB modes RSA (TBD)

(1) CRC Unit IPSec 1.6

•CRC32, CRC32C, 802.16e OFDMA CRC IPSec @ (IMIX) 1.1

Header & Trailer off-load for the following Security Protocols:

•IPSec, SSL/TLS, 3G RLC, PDCP, SRTP, 802.11i, 802.16e,
802.1ae
47
EcoMAP: QorIQ LS1012A

• ARM • RadiSys
• Green Hills • Aricent • Symmetricom
• VortiQa
• Mentor Embedded
• Timesys • koenig-KPA

• Wind River • acontis • Oracle

• Aricent
• Beckhoff • VortiQa
• Adeneo
• Crank Software • Skelmir Embeeded
• Digi International • SYSGO • Advantech • Crank Software
• ADLink • Radisys
• ISaGRAF
• Cognatec • Vitesse
• IXXAT
• CurtissWright
• Digi
• Green Hills International
• CodeWarrior • Mentor Graphics • Embest
• ARM DS-5 • Timesys • Emerson
• QNX Network Power
• Arium
• Wind River • GE Intelligent
• Embest Platform
• IAR • Kontron
• Lauterbach • Broadcom • Mercury
• QorIQ • Ralink
processors • IDC • Phytec
• Rohm
based on • Linear • TQ Systems
the ARM v8 • Sierra Wireless
• Qualcomm Atheros • Radisys
64-bit • Silex
• Vitesse

48