CH7- Memory Organization
CH7- Memory Organization
Chapter Seven
• Memory Hierarchy
• Main Memory
• Cache memory
• Mapping Functions
• Direct Mapping
• Associative Mapping
Cache
Magnetic
Disks Magnetic Tapes
Latency and Bandwidth
The speed and efficiency of data transfers among memory,
processor, and disk have a large impact on the performance of a
computer system.
Memory latency – the amount of time it takes to transfer a
word of data to or from the memory.
Memory bandwidth – the number of bits or bytes that can be
transferred in one second. It is used to measure how much time
is needed to transfer an entire block of data.
Bandwidth is not determined solely by memory. It is the product
of the rate at which data are transferred (and accessed) and the
width of the data bus.
Main Memory
Most of the main memory in a general purpose
computer is made up of RAM integrated circuits chips,
but a portion of the memory may be constructed with
ROM chips
Tran. Access
per bit time Persist?Sensitive? Cost Applications
The RAM have 128 byte and need seven address lines, where the
ROM have 512 bytes and need 9 address lines
Memory Address Map
Memory Address Map
The hexadecimal address assigns a range of hexadecimal
equivalent address for each chip
Block 0
Block 1
Cache
tag
Block 0
tag
Block 1
Block i
tag
Block 127
4096=212.
Figure 5.16. Associative-mapped cache.
Associative Memory
Cache Location 00000000 Main
00000001
•Bootloader or
Memory
00000 Cache low-level system
memory.
00001
•
•
00012000 00012000
•
•Application
• memory or
15000000
• reserved regions
FFFFF •
08000000 08000000
•
•
15000000
•Extended
Address (Key) Data regions or
external memory
3FFFFFFF
Direct Mapping
Associative memory is expensive compared to RAM
In general case, there are 2^k words in cache memory and
2^n words in main memory (in our case, k=9, n=15)
The n bit memory address is divided into two fields: k-bits
for the index and n-k bits for the tag field
Main
memory
Direct Mapping
Block 0
Block 1
11101,1111111,1100
Tag: 11101
Block: 1111111=127, in the 127th block of the cache
Word:1100=12, the 12th word of the 127th block in the cache
Set-Associative Mapping
The disadvantage of direct mapping is that two words
with the same index in their address but with different
tag values cannot reside in cache memory at the same
time
Set-Associative Mapping is an improvement over the
direct-mapping in that each word of cache can store two
or more word of memory under the same index address
Set-Associative Mapping
Set-Associative Mapping
In the slide, each index address refers to two data words and
their associated tags
Each tag requires six bits and each data word has 12 bits, so
the word length is 2*(6+12) = 36 bits
Main
memory
Block 0
Cache
tag
Block 0
Set 0
Block 63
tag
Block 1
Block 64
tag
Block 2
Set 1
tag Block 65
Block 3
present (4096/64=26). Figure 5.17. Set-associative-mapped cache with two blocks per set.
Tag Set Word
6 6 4 Main memory address
Set-Associative Mapping
Address
000 00500
2-Way Set Associative
00000 Cache
00500 000 0 1 A 6 010 0 7 2 1
Tag1 Data1 Tag2 Data2
00900 080 4 7 C C 000 0 8 2 2 000 0 1 A 6 010 0 7 2 1
FFFFF
Compare Compare
20 10 16 10 16
Bits Bits Bits Bits Bits Match No match
(Addr) (Tag) (Data) (Tag) (Data)
Set-Associative Mapping
Tag Set Word
6 6 4 Main memory address
111011,111111,1100
Tag: 111011
Set: 111111=63, in the 63th set of the cache
Word:1100=12, the 12th word of the 63th set in the cache
Auxiliary Memory
Magnetic Disk
Optical Disk
RAID Disk
Magnetic Tape
Thanks!
? QUESTION
End!!