PRACTCAL

PAPER I

NOTE:-
Dear students, kindly write the practicals in practical copy. On blank page write aim,
component list, designing of circuit, circuit diagram, pin configurations, observations,
calculation and result using pencil. Write aim, component list, theory, and result on ruled page
using pen.
EXPERIMENT NO: - 1
Aim: - Use of CRO for Phase Measurement
Component list: - Resistor R = 10 KΩ, capacitor C = 0.001µF, CRO and signal
generator.
Connection Diagram:-

Theory:-
CRO is an analog measuring instrument which displays rapidly changing
voltage against time in the form of graph seen as bright trace on the screen
of CRT. Important front panel control of CRO are:
INTENSITY: Controls the brightness of the display by varying the
negative voltage on the control grid with respect to cathode in CRT.
FOCUS: Controls the sharpness of display by varying the positive voltage
on the focusing anode in CRT.
TIME/DIV: Controls rate of rise of time base signal by changing C in
time base generator.
VARIABLE: clockwise rotation increases the sweep speed by varying R
in sweep generator In CAL position, the calibration of the TIME/DIV.
Holds good.
VOLT/DIV: Y amplifier in different ranges.
: Controls the Vertical position of display.
: Controls the Horizontal position of display.
AC, DC: Select input coupling to the Y-amplifier. For ac coupling a
capacitor is connected in series with input. DC-direct Coupling.
EXT/INT: In INT mode internal sweep generator is connected. In EXT.
Mode, external XC-input is given.
XIN: SWP: Converts the scope into XY Scope.Y input through Y and X
input through IN BCN. In SWP mode normal time base operation.
TRIG. Level: Automatic base line in produced with no input signal.
When rotated clockwise, select the trigger level on the displayed
waveform.
Procedure:-A sine wave input is applied to the RC circuit .The same sine
wave input is applied to the Vertical (Y) input of CRO. The output RC
circuit is applied to the horizontal input of CRO. The amount of phase
difference between the two signals can be as shown in fig .If an ellipse is
obtained Sin Φ = A/B

Where Φ = Phase angle

Φ = Sinˉ¹ (a/b)
Observation Table:-
Sr.No R (in Ω) C (in µF) Φ = Sinˉ¹ (a/b)

1 10K Ω 0.001 µF Φ = Sinˉ¹ (2.6/3.9) = 41.75

Result: - CRO can be used for measurement of phase difference.

EXPERIMENT NO: - 2
AIM:-Study of zener diode as voltage regulator.
Component list:-
Type of component Specifications
Transformer 230/6 V,500mA
Diodes 1N4007 ,Si rectifier diode for
general purpose
Zener Diode Vz = 5.1 V,1W,Voltage stabilizer
Capacitor 1000 µF,25V Electrolytic
Resistor Rs 33 Ω,1/4 W carbon composition
RL 1 KΩ potentiometer, wire wound

Circuit Diagram:-

Theory: - The zener diode is used to regulate the voltage across a load
when there are variations in the supply voltage or load current .The zener
regulator is connected between the output of the bridge rectifier with filter
and load.
The Zener regulator consist of a current limiting resistor Rs connected
in series with the input voltage Vs and the zener diode is connected in
parallel with load RL. The Zener diode is reverse biased. It is selected
with a breakdown voltage Vz equal to the voltage desired across the load.
Rs =(Vs-Vz)/Is As long as Vs is greater than Vz the zener diode operates
in the breakdown region and output voltage remains constant.
Line Regulation: If there is increase in input voltage Vs the current
though zener diode increases and the load current remains constant. The
extra voltage is dropped across Rs. Therefore output voltage remains
constant. If there is decrease in Vs, Iz decreases and voltage drop across
Rs is reduced. As load current remains constant, output voltage remains
constant.
Load regulation: - When there is reduction in load resistance, load
current increases. Iz decrease by the same percentage and Is is kept
constant. Therefore, drop across Rs.is kept constant and Vo remains
constant When the load resistance increases, load current decreases. Iz
increases such that the current Is are kept constant .Therefore, output
voltage remains constant. Thus, line regulation and load regulation is
provided.
Observation Table:-
Load regulation: Use RL to vary the load current
Load current Output Voltage
IL (mA) (IN Volts)
0 (min) VNL = 5.00
1 4.99
2 4.98
3 4.98
4 4.98
5 4.98
6 (max) VFL= 4.98
Calculation:-
Load regulation:
% LR = [(VNL – VFL) / VFL ] *100
Where
VFL = Load voltage with full load current
VNL = Load voltage with no load current
%LR = [(VNL – VFL) / VFL ] *100
= [(5.00 – 4.98) /4.98] *100
= 0.0040 %

Result: - Zener diode can be used to construct a voltage regulator. It

provides good line regulation and load regulation.
EXPERIMENT NO: - 3
Aim: - To study the operation of inverting operational amplifier
using IC741.
Component list:-
Type of component Specifications
Ic741 Operational amplifier .supply voltage = ±12V.
Input offset voltage =2mV, input bias current
=80nA, unity gain frequency = 1MHZ,
CMMR = 90db, input impedance = 2MΩ,
Output impedance =75 Ω, slew rate = 0.5V/µs.
Resistor Rf 10KΩ, ±5%,1/4 W carbon composition
Ri 5KΩ,3.3 KΩ,2.5 KΩ each1/4 W.CC
R 10 KΩ potentiometer, lin

Circuit Diagram:-
Offset nulling:-Under no signal condition, if output voltage is not equal to
zero, vary potentiometer of 10KΩ connected between pin1 and pin5 for
offset nulling .Adjust output voltage to Zero. Resistors of 100 Ω each may
be required to be connected to pins 2 and 3 for offset nulling.
Pin Connections of IC 741:-

Design:-
Gain = -2
Ri = Rf / Gain = 10K/2 = 5KΩ ≈ 5.1KΩ
Theory: -
The operational amplifier is a high gain dc amplifier which basically
consist of differential amplifier. Its performance can be changed as desired
by changing external components. In inverting op.Amp, input signal is
applied to the inverting input terminal through input resistor Ri. Non-
inverting input terminal is grounded. Inverting voltage feedback is
obtained through Rf .The output signal is 180º out of phase with the input.
Output Voltage = Vo = - (Rf / Ri) Vi
Closed-loop gain of inverting op-amp.
= (Vo / Vi) = Acl = - (Rf / Ri)
Observation Table:-
Sr.No Input Vi Output Vo Gain = -Vo / Vi
1 1V 2V 2
2 1.5V 3V 2
3 2.4V 4.8V 2
4 5.1V 10.2V 2

Result:-Op.amp can be used as inverting amplifier. Output signal is 180º

out of phase with input.
EXPERIMENT NO: - 4
Aim: - To study the operation of Non-inverting operational amplifier
using IC741.
Component list:-
Type of component Specifications
Ic741 Operational amplifier .supply voltage = ±12V.
Input offset voltage =2mV, input bias current
=80nA, unity gain frequency = 1MHZ,
CMMR = 90db, input impedance = 2MΩ,
Output impedance =75 Ω, slew rate = 0.5V/µs.
Resistor Rf 10KΩ, ±5%,1/4 W carbon composition
Ri 5KΩ,3.3 KΩ,2.5 KΩ each1/4 W.CC
R 10 KΩ potentiometer, lin

Circuit Diagram:-

Offset nulling:-Under no signal condition, if output voltage is not equal to

zero, vary potentiometer of 10KΩ connected between pin1 and pin5 for
offset nulling .Adjust output voltage to Zero. Resistors of 100 Ω each may
be required to be connected to pins 2 and 3 for offset nulling.
Pin Connections of IC 741:-

Design:-
Gain = 3
Gain=1+ (Rf/Ri)
Ri = R / (Gain-1) =10K / 2 = 5KΩ ≈ 5.1 KΩ
Theory: - In non-inverting amp is used. The input signal is applied to the
non-inverting input of an amplifier and fraction of output voltage is then
sampled and feedback the inverting input.
The operational amplifier is a high gain dc amplifier which basically
consist of differential amplifier. Its performance can be changed as desired
by changing external components. Closed-loop gain of non-inverting
op.amp. Acl =1+ (Rf/Ri)
Output voltage = Vo = [1+ (Rf/Ri)]*Vi
This equation shows that output voltage is in phase with input signal.
Observation Table:-
Sr.No Input Vi Output Vo Gain = -Vo / Vi
1 1V 3V 3
2 1.5V 4.5V 3
3 2.4V 7.2V 3
4 3V 9V 3
Result: - Op.amp can be used as inverting amplifier. Output signal is in
phase with input.
EXPERIMENT NO: - 5
Aim: - To study the operation of adder using operational amplifier
Component list:-
Type of component Specifications
Ic741 Operational amplifier .supply voltage = ±12V.
Input offset voltage =2mV, input bias current
=80nA, unity gain frequency = 1MHZ,
CMMR = 90db, input impedance = 2MΩ,
Output impedance =75 Ω, slew rate = 0.5V/µs.
Resistor R1,R2,R3 and 10KΩ, ±5%,1/4 W carbon composition
Rf
Potentiometer 10 KΩ, lin

Circuit Diagram:-

Offset nulling:-Under no signal condition, if output voltage is not equal to

zero, vary potentiometer of 10KΩ connected between pin1 and pin5 for
offset nulling .Adjust output voltage to Zero. Resistors of 100 Ω each may
be required to be connected to pins 2 and 3 for offset nulling.
Theory: - Op.amp adder is an inverting summing amplifier. Let the
voltages V1, V2, V3 be applied at the input terminals through R1,R2 and
R3 respectively. The non-inverting input terminal is grounded. The
inverting input terminal is at virtual ground potential. Then the output
voltage is given by
Vo = -Rf*(V1 / R1 + V2 / R2 + V3 / R3)
If R1= R2 = R3 = Rf,
Vo = - (V1 + V2 + V3)
Now op.amp is said to be operating as ‘inverting summing amplifier’. The
output is sum of input voltage but with a negative sign. The negative sign
indicates that output is 180º out of phase with input.
Observation Table:-
Input voltage (Volt)
Sr.No V1 V2 V3 V0 (obs) Vo (cal)

1 0.5 1.2 0.3 2 2

2 1.2 2 0.5 3.7 3.7
3 1.8 0.4 0.6 2.8 2.8
4 2 1.2 0.9 4.1 4.1

Result: - Op.amp can be used as to perform analog addition

EXPERIMENT NO: - 6
Aim: - To study the operation of subtractor using operational amplifier
Component list:-
Type of component Specifications
Ic741 Operational amplifier .supply voltage = ±12V.
Input offset voltage =2mV, input bias current
=80nA, unity gain frequency = 1MHZ,
CMMR = 90db, input impedance = 2MΩ,
Output impedance =75 Ω, slew rate = 0.5V/µs.
Resistor R1,R2,R3 and 10KΩ, ±5%,1/4 W carbon composition
Rf
Potentiometer 10 KΩ, lin

Circuit Diagram:-

Offset nulling:-Under no signal condition, if output voltage is not equal to

zero, vary potentiometer of 10KΩ connected between pin1 and pin5 for
offset nulling .Adjust output voltage to Zero. Resistors of 100 Ω each may
be required to be connected to pins 2 and 3 for offset nulling.
Theory: - Op.amp subtractor is also called differential amplifier. The
input voltage are V1 and V2.As input impedance of op.amp is very high,
current absorbed by the amplifier is zero. Therefore i1 = i2 and i3 = i4.The
voltage V1 is applied to inverting input terminal through R1 and V2 is
applied to non-inverting input terminal through R1.The output voltage is
given by
Vo = R2 / R1 (V2 - V1)
If R1= R2
Vo = V2 – V1
Thus the output is difference between two input signals.
Observation Table:-
Sr.No Input voltage (in volts) Vo (obs) Vo (cal)
V1 V2
1 0.4 1.2 0.8 0.8
2 1 1.8 0.8 0.8
3 2.4 3 0.6 0.6
4 4.1 5 0.9 0.9

Result: - Op.amp can be used as to perform analog subtraction.

EXPERIMENT NO: - 7
Aim: - To study the operation of buffer using operational amplifier
Component list:-
Type of component Specifications
Ic741 Operational amplifier .supply voltage = ±12V.
Input offset voltage =2mV, input bias current
=80nA, unity gain frequency = 1MHZ,
CMMR = 90db, input impedance = 2MΩ,
Output impedance =75 Ω, slew rate = 0.5V/µs.

Resistor R1,R2 100KΩ, ±5%,1/4 W carbon composition

Potentiometer 10 KΩ, lin

Circuit Diagram:-

Offset nulling:-Under no signal condition, if output voltage is not equal to

zero, vary potentiometer of 10KΩ connected between pin1 and pin5 for
offset nulling .Adjust output voltage to Zero. Resistors of 100 Ω each may
be required to be connected to pins 2 and 3 for offset nulling.
 Potential divider circuit
Observation table no1
Voltage across R2 ( in volt)
By observation By calculation
3 3

Calculation:-
Voltage across R2 = R2 / (R1 + R2)
= [100K / (100K +100K)] * V
= (½)*6
= 3 Volt
For op.amp as buffer use DMM for measurements

Sr.No Vi (in volt) Vo (in volt)

1 1.3 1.3
2 2.5 2.5
3 2.6 2.9
 Buffer with potential divider
Voltage across R2 Vo using Vo using DMM (in Calculated voltage
using Voltmeter (in Voltmeter (in volt) Across R2 (in
volt) volt) Volt)
2.8 2.8 3 3

Theory: - A buffer amplifier is a stage that isolate the preceding stage

from the following stage. As the gain of this amplifier is one, it is also
called unity gain voltage follower. It is a non-inverting amplifier. Input
signal is applied to the non-inverting input terminal. Output is feedback
directly to the inverting input terminal. Rf = 0.The gain of non-inverting
op.amp .Vo / Vi =1 + Rf / Ri
Here as Rf = 0 and Ri = ∞
Gain = 1
Vo = Vi
Output signal is in phase with input signal.
Thus the output is difference between two input signals.
Result: - Op.amp can be used as buffer. In buffer output voltage is equal
to the input voltage. Output voltage measured by using voltmeter may be
slightly different due to the loading effect.
EXPERIMENT NO: - 8
Aim: - To study the operation of comparator using operational amplifier
Component list:-
Type of component Specifications
Ic741 Operational amplifier .supply voltage = ±12V.
Input offset voltage =2mV,
input bias current =80nA,
unity gain frequency = 1MHZ,
CMMR = 90db, input impedance = 2MΩ,
Output impedance =75 Ω, slew rate = 0.5V/µs.

Circuit Diagram:-

Op.amp as comparator with trip point = 0 volt

Offset nulling:-Under no signal condition, if output voltage is not equal to
zero, vary potentiometer of 10KΩ connected between pin1 and pin5 for
offset nulling .Adjust output voltage to Zero. Resistors of 100 Ω each may
be required to be connected to pins 2 and 3 for offset nulling.
Observation (1):-
Designed trip value = 0 volt.
Observed trip value = 0 volt.

Op.amp as comparator with trip point = 6 volt

Observation (2):-
Designed trip value = [R2 / (R1 + R2)]*V = Vref
Vref = (10kΩ /10kΩ +10kΩ)*12 volt = 6 volt
Observed trip value = 6 volt
Theory:-A comparator is a circuit with two input voltages and output
voltage. When the non-inverting input is less than the inverting input, the
comparator produces a low output voltage. When the non-inverting
voltage is greater than the inverting voltage .the output is high. Maximum
output voltage swing is normally 2 volt less than applied supply voltage
(Vs).this is called saturated voltage (Vsat). ±Vsat = ±Vs ± 2V
For dual power supply of ±15 V, Vsat = ±13V
Vin = Vsat / Open-loop voltage gain
For IC741, Vin = 13 /100,000 = 0.13mV
In zero-reference comparator, the op.amp is used without feedback
resistors. When the inverting input terminal is ground and input voltage is
above ground level, the op.amp is saturated. Practically input voltage
should be larger than 0.13mV. when Vi>0,Vo = +Vsat, When Vi <0,Vo =
- Vsat and when Vi = 0,Vo = 0.The value of input voltage at which the
output switches state is called trip point or reference voltage of a
comparator. In Non-zero reference comparator, the trip point is equal to
Vref, When Vin is slightly more than Vref the output goes into positive
saturation. When VI > Vref, Vo = +Vsat When Vi < Vref, Vo = -Vsat and
when Vi = Vref, Vo = 0
Observation (1) for zero-reference comparator:-
Designed trip value = 0 volt.
Sr.no Vi (In volt) Vo (In volt)
1 -1.5 -10.59
2 -0.9 -10.59
3 -0.3 -10.59
4 0 0
5 0.5 11.98
6 1.2 11.98
7 2 11.98
Observation (2) for Non- zero reference comparator:-
Designed trip value = [R2 / (R1 + R2)]*V = Vref = 6 V
Sr.no Vi (In volt) Vo (In volt)
1 -4.4 -10.59
2 -2.9 -10.59
3 -1.8 -10.59
4 6 6
5 6.8 11.98
6 7.3 11.98
7 8.6 11.98

Result: - Op.amp can be used as zero-reference comparator or non-zero

reference comparator.
EXPERIMENT NO: - 9
Aim: - To construct the circuit of monostable multivibrator using
IC 555 and to measure the time T

Component list:-

Type of component Specifications

IC 555 8 pin timer IC,supply V=4.5 to 16 V
Resistors R1 22KΩ,±5%,1/4 W carbon composition
R2 470KΩ,potentiometer( lin)
R3 22KΩ,±5%, 1/4 W carbon composition.
R4 330Ω, ±5%, 1/4 W carbon composition.
Capacitor C1 100 µF,25V Electrolytic
C2 0.001 µCeramic disc, non-electrolytic.
LED RED colour

Equipment’s:-
5V dc power supply, press to on switch, stop watch, IC socket.
Pin Diagram:-
Circuit diagram:-

Design:-
T=1.1RC
Where R = R1 + R2 and C = C1
To design the value of R and C for period = 11 seconds.
Therefore T=1.1RC
For C = 100 µF, R = T/ 1.1C
R = 11 / ( 1.1*100* 10-6 ) = 100KΩ
R=R1 +R2
As R1 = 22 KΩ, R2 = (100-22) KΩ
R2 = 78 KΩ
Select the resistance of potentiometer equal to 78 KΩ.
Theory:-
When a negative ( 0V ) pulse is applied to the trigger input (pin 2) of the
Monostable configured 555 Timer oscillator, the internal comparator,
(comparator No1) detects this input and “sets” the state of the flip-flop,
changing the output from a “LOW” state to a “HIGH” state. This action in
turn turns “OFF” the discharge transistor connected to pin 7, thereby
removing the short circuit across the external timing capacitor, C1.
This action allows the timing capacitor to start to charge up through
resistor, R1 until the voltage across the capacitor reaches the threshold
(pin 6) voltage of 2/3Vcc set up by the internal voltage divider network.
At this point the comparators output goes “HIGH” and “resets” the flip-
flop back to its original state which in turn turns “ON” the transistor and
discharges the capacitor to ground through pin 7. This causes the output to
change its state back to the original stable “LOW” value awaiting another
trigger pulse to start the timing process over again. Then as before, the
Monostable Multivibrator has only “ONE” stable state.
The Monostable 555 Timer circuit triggers on a negative-going pulse
applied to pin 2 and this trigger pulse must be much shorter than the
output pulse width allowing time for the timing capacitor to charge and
then discharge fully. Once triggered, the 555 Monostable will remain in
this “HIGH” unstable output state until the time period set up by the R1 x
C1 network has elapsed. The amount of time that the output voltage
remains “HIGH” or at a logic “1” level, is given by the following time
constant equation.
T= 1.1 R1C1
Where, t is in seconds, R is in Ω and C in Farads.
Observations:-
Sr.no Resistance Time measured Obs. mean Calculated T
R= R1+R2 I II III T seconds seconds
1 100KΩ 11 sec 11 sec 11 sec 11 sec 11 sec

Result: - Time for which output remains high (T) is approximately equal
to the time calculated by using formula.
EXPERIMENT NO: - 10
Aim: - (1) To construct the circuit of astable multivibrator using
IC 555.
(2) To measure frequency and duty cycle.
Component list:-
Type of component Specifications
IC 555 8 pin timer IC,supply V=4.5 to 16 V
Resistors RA 22KΩ,±5%,1/4 W carbon composition
RB 470KΩ,potentiometer( lin)
R3 22KΩ, ±5%, 1/4 W carbon composition.
R4 330Ω, ±5%, 1/4 W carbon composition.
Capacitor C1 100 µF,25V Electrolytic
C2 0.001 µCeramic disc, non-electrolytic.
LED RED colour

Equipment’s:-
5V dc power supply, IC socket, CRO.
Circuit diagram:-
Design:-
Frequency = f = [1.44 / (RA + 2RB)*C]
Duty cycle = D = (W/T)*100%
Where, W = width of pulse.
Also D = [RA + RB / (RA + 2RB)]*100
Given f=3.2 KHz, D = 51%
f = [1.44 / (RA + 2RB)*C]
RA + 2RB = [1.44 / (f*C)]
= 1.44 /3.2*103*0.001*10-6
= 450 KΩ
RA + 2RB = 450 KΩ -------------- (1)
D = [RA + RB / (RA + 2RB)]*100
RA +RB = D*(RA + 2RB) / 100
= 51*450*103 / 100
= 229.5 KΩ
RA +RB = 229.5 KΩ -------------- (2)
Subtracting equation (2) from equation (1), we get,
RB = 220.5KΩ
Substituting this value in equation (2), we get,
RA = 9 KΩ.
Pin Diagram:-

Theory:-
When the power is turned ON consider the flip flop is cleared initially, then
the o/p of the inverter will be high. The charging of the capacitor will be
done using two resistors R1& R2. When the voltage of the capacitor goes
above 2/3 Vcc, then the output of the higher comparator will be High, it
changes the control flip flop. So the control flip-flop’s Q o/p will be a LOW
& Q’ will be High. So the final o/p of the Inverter is LOW. At the same time
the Q1 transistor switches ON and the C1capacitor starts discharging
through resistor R2. When the voltage of the capacitor is < 1/3Vcc, then the
o/p of the lower comparator will be high and control flip flop gets is set to
1. When the discharge transistor Q1 gets off, then the capacitor gets charged
and continues this process. According to the status of the o/p, the LED at
the output will blink. When the low voltage is applied at the 4th pin (reset
pin) of the IC then it resets the IC. When the low signal is applied to the
base of the Q2 transistor then it switches ON by the capacitor.
Observation:-
1) For frequency measurement:-
T = TIME/DIV. Scale * No of division on x axis for one
Complete cycle of waveform
T = 1µs *2.8
= 2.8 µs
Frequency f = 1/ T
= 1 / 2.8 µs
= 3.5 KHz
2) For duty cycle measurement:-
Ton = TIME/DIV. Scale * No of division on x axis for half
Cycle of waveform
Ton = 1.5*1µs = 1.5µs

Duty cycle = D = (Ton / T)*100%

= (1.5 / 2.8)*100
= 53.57%
Conclusion: - Output frequency and duty cycle can be changed
by varying RA, RB and C. observed frequency = 3.5 KHz, calculated
frequency = 3.2 KHz, observed duty cycle = 53.57% and calculated
Duty cycle = 51%