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7th sem syllabus

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0% found this document useful (0 votes)
28 views

7th sem syllabus

Uploaded by

kishorkumar07225
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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03.80.

2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI


B.E. in Electronics and Communication Engineering (ECE)
Scheme of Teaching and Examinations 2021
Outcome Based Education(OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 - 22)
Swappable VII and VIII SEMESTER
VII SEMESTER
Teaching Hours /Week Examination

Department (TD)
and Question
Paper Setting
Board (PSB)

Self -Study
Practical/
Drawing
Tutorial
Teaching

Total Marks
Lecture

Duration in
Theory

CIE Marks

SEE Marks

Credits
Sl. Course and

hours
Course Title
No Course Code

L T P S

PCC TD: ECE


1 Advanced VLSI 3 0 0 3 50 50 100 3
21EC71 PSB: ECE
PCC Optical & Wireless TD: ECE
2 2 0 0 3 50 50 100 2
21EC72 Communication PSB: ECE
PEC TD: ECE
3 Professional elective Course-II PSB: ECE 3 50 50 100 3
21EC72X
PEC TD: ECE
4 Professional elective Course-III PSB: ECE 3 50 50 100 3
21EC73X
OEC Concerned
5 Open elective Course-II 3 50 50 100 3
21EC74X Department
Project Two contact hours /week for
6 21ECP75 Project work interaction between the 3 100 100 200 10
faculty and students.
Total 350 350 700 24

VIII SEMESTER
Teaching Hours /Week Examination
Department

Self -Study
Practical/
Drawing
Tutorial
Teaching

Total Marks
Lecture

Duration in
Theory

CIE Marks

SEE Marks

Credits
Sl. Course and hours
Course Title
No Course Code

L T P S
One contact hour /week for
Seminar
1 Technical Seminar interaction between the -- 100 -- 100 01
21EC81
faculty and students.
INT Research Internship/ Industry Two contact hours /week for 03
2 21INT82 Internship interaction between the (Batch 100 100 200 15
faculty and students. wise )
3 21NS83 National Service Scheme (NSS) NSS
Completed during the
NCMC

21PE83 Physical Education (PE) (Sports


PE intervening period of III -- 50 50 100 0
and Athletics)
semester to VIII semester.
21YO83 Yoga Yoga
Total 250 150 400 16

Professional Elective - II
21EC721 Advanced Design Tools for VLSI (L:T:P :: 2:0:2) 21EC724 Biomedical Signal Processing (L:T:P :: 3:0:0)
21EC722 Digital Image Processing (L:T:P :: 2:0:2) 21EC725 Speech Signal Processing (L:T:P :: 3:0:0)
21EC723 DSP Algorithms & Architecture (L:T:P :: 3:0:0)

Professional Elective - III


21EC731 IoT & Wireless Sensor Networks (L:T:P :: 3:0:0) 21EC734 Machine Learning with Python (L:T:P :: 2:0:2)
21EC732 Network Security (L:T:P :: 3:0:0) 21EC735 Multimedia Communication (L:T:P :: 2:0:2)
21EC733 Fabrication technology (L:T:P :: 3:0:0)

JBOS28022022/EC09032022/KM
03.90.2022

Open Electives - II offered by the Department to other Department students


21EC741 Optical & Satellite Communication (L:T:P :: 3:0:0) 21EC744 Basic Digital Signal Processing (L:T:P :: 2:0:2)
21EC742 ARM Embedded Systems (L:T:P :: 3:0:0) 21EC745 E-waste Management (L:T:P :: 3:0:0)
21EC743 Basic Digital Image Processing (L:T:P :: 2:0:2)
Note: PCC: Professional Core Course, PEC: Professional Elective Courses, OEC–Open Elective Course, AEC –Ability Enhancement Courses.
L –Lecture, T – Tutorial, P- Practical / Drawing, S – Self Study Component, CIE: Continuous Internal Evaluation, SEE: Semester End Examination.
Note: VII and VIII semesters of IV year of the programme
(1) Institutions can swap VII and VIII Semester Scheme of Teaching and Examinations to accommodate research internship/ industry internship after
the VI semester.
(2) Credits earned for the courses of VII and VIII Semester Scheme of Teaching and Examinations shall be counted against the corresponding
semesters whether VII or VIII semester is completed during the beginning of IV year or later part of IV year of the programme.
PROJECT WORK (21XXP75): The objective of the Project work is
(i) To encourage independent learning and the innovative attitude of the students.
(ii) To develop interactive attitude, communication skills, organization, time management, and presentation skills.
(iii) To impart flexibility and adaptability.
(iv) To inspire team working.
(v) To expand intellectual capacity, credibility, judgment and intuition.
(vi) To adhere to punctuality, setting and meeting deadlines.
(vii) To install responsibilities to oneself and others.
(viii)To train students to present the topic of project work in a seminar without any fear, face the audience confidently, enhance communication
skills, involve in group discussion to present and exchange ideas.
CIE procedure for Project Work:
(1) Single discipline: The CIE marks shall be awarded by a committee consisting of the Head of the concerned Department and two senior faculty
members of the Department, one of whom shall be the Guide.
The CIE marks awarded for the project work, shall be based on the evaluation of project work Report, project presentation skill, and question and
answer session in the ratio 50:25:25. The marks awarded for the project report shall be the same for all the batch mates.
(2) Interdisciplinary: Continuous Internal Evaluation shall be group-wise at the college level with the participation of all guides of the college.
Participation of external guide/s, if any, is desirable. The CIE marks awarded for the project work, shall be based on the evaluation of project work
Report, project presentation skill, and question and answer session in the ratio 50:25:25. The marks awarded for the project report shall be the same
for all the batch mates.
SEE procedure for Project Work: SEE for project work will be conducted by the two examiners appointed by the University. The SEE marks awarded
for the project work shall be based on the evaluation of project work Report, project presentation skill, and question and answer session in the ratio
50:25:25.
TECHNICAL SEMINAR (21XXS81): The objective of the seminar is to inculcate self-learning, present the seminar topic confidently, enhance
communication skill, involve in group discussion for exchange of ideas. Each student, under the guidance of a Faculty, shall choose, preferably, a
recent topic of his/her interest relevant to the programme of Specialization.
(i) Carry out literature survey, systematically organize the content.
(ii) Prepare the report with own sentences, avoiding a cut and paste act.
(iii)Type the matter to acquaint with the use of Micro-soft equation and drawing tools or any such facilities.
(iv) Present the seminar topic orally and/or through PowerPoint slides.
(v) Answer the queries and involve in debate/discussion.
(vi) Submit a typed report with a list of references.
The participants shall take part in the discussion to foster a friendly and stimulating environment in which the students are motivated to reach high
standards and become self-confident.
Evaluation Procedure:
The CIE marks for the seminar shall be awarded (based on the relevance of the topic, presentation skill, participation in the question and answer
session, and quality of report) by the committee constituted for the purpose by the Head of the Department. The committee shall consist of three
teachers from the department with the senior-most acting as the Chairman.
Marks distribution for CIE of the course:
Seminar Report:50 marks
Presentation skill:25 marks
Question and Answer: 25 marks. ∎No SEE component for Technical Seminar
Non – credit mandatory courses (NCMC):
National Service Scheme/Physical Education (Sport and Athletics)/ Yoga:
(1) Securing 40 % or more in CIE,35 % or more marks in SEE and 40 % or more in the sum total of CIE + SEE leads to successful completion of the
registered course.
(2) In case, students fail to secure 35 % marks in SEE, they has to appear for SEE during the subsequent examinations conducted by the University.
(3)In case, any student fails to register for NSS, PE or Yoga/fails to secure the minimum 40 % of the prescribed CIE marks, he/she shall be deemed to
have not completed the requirements of the course. In such a case, the student has to fulfill the course requirements during subsequently to earn the
qualifying CIE marks subject to the maximum programme period.
(4) Successful completion of the course shall be indicated as satisfactory in the grade card. Non-completion of the course shall be indicated as
Unsatisfactory.
(5) These course shall not be considered for vertical progression as well as for the calculation of SGPA and CGPA, but completion of the courses shall
be mandatory for the award of degree.

JBOS28022022/EC09032022/KM
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI


B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Advanced VLSI
Course Code 21EC71 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Learn overview of VLSI design flow
 Emphasise on Back end VLSI design flow
 Learn basics of verification with reference to System Verilog
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in multiple representations.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Introduction to ASICs: Full custom, Semi-custom and Programmable ASICs, ASIC Design flow, ASIC
cell libraries. CMOS Logic: Data path Logic Cells: Data Path Elements, Adders: Carry skip, Carry bypass,
Carry save, Carry select, Conditional sum, Multiplier (Booth encoding), Data path Operators, I/O cells,
Cell Compilers. Text Book 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
Floor planning and placement: Goals and objectives, Measurement of delay in Floor planning, Floor
planning tools, Channel definition, I/O and Power planning and Clock planning. Placement: Goals and
Objectives, Min-cut Placement algorithm, Iterative Placement Improvement, Time driven placement
methods, Physical Design Flow.
Routing: Global Routing: Goals and objectives, Global Routing Methods, Global routing between blocks,
Back annotation. Text Book 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
03.10.2022

Module-3
Verification Guidelines: The verification process, basic test bench functionality, directed testing,
methodology basics, constrained random stimulus, randomization, functional coverage, test bench
components, layered testbench.
Data Types: Built in Data types, fixed and dynamic arrays, Queues, associative arrays, linked lists,
array methods, choosing a type, creating new types with type def, creating user defined structures,
type conversion, Enumerated types, constants and strings, Expression width.
Text Book 2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Procedural Statements and Routines: Procedural statements, Tasks, Functions and void functions,
Task and function overview, Routine arguments, returning from a routine, Local data storage, time
values.
Connecting the test bench and design: Separating the test bench and design, The interface construct,
Stimulus timing, Interface driving and sampling, System Verilog assertions.
Text Book 2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Randomization: Introduction, What to randomize? , Randomization in System Verilog, Random
number functions, Common randomization problems, Random Number Generators.
Functional Coverage: Coverage types, Coverage strategies, Simple coverage example, Anatomy of
Cover group and Triggering a Cover group, Data sampling, Cross coverage, Generic Cover groups,
Coverage options, Analyzing coverage data, measuring coverage statistics during simulation.
Text Book 2
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Understand VLSI design flow
2. Describe the concepts of ASIC design methodology
3. Create floor plan including partition and routing with the use of CAD algorithms
4. Will have better insights into VLSI back-end design flow
5. Learn verification basics and System Verilog
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
03.10.2022

Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:


Text Books:
1. Michael John Sebastian Smith, Application - Specific Integrated Circuits, Addison-Wesley
Professional, 2005.
2. Chris Spear, System Verilog for Verification – A guide to learning the Test bench language
features, Springer Publications, Second Edition, 2010.

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning


 Use EDA tool to design basic Analog blocks like amplifiers and 4-bit RAM
 Prepare a white paper on ASIC design flow referring to literatures of Cadence and Synopsys EDA
tools
 Mini project using System Verilog
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI


B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Optical & Wireless Communication


Course Code 21EC72 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 2:0:0:1 SEE Marks 50
Total Hours of Pedagogy 30 Total Marks 100
Credits 2 Exam Hours 3
Non-MCQ pattern of CIE and SEE
Course objectives:
This course will enable students to:
 Learn the basic principle of optical fiber communication with different modes of light propagation.
 Understand the transmission characteristics and losses in optical fiber.
 Study of optical components and its applications in optical communication networks.
 Understand the concepts of propagation over wireless channels from a physics standpoint
 Understand the multiple access techniques used in cellular communications standards.
 Application of Communication theory both Physical and networking to understand GSM systems that
handle mobile telephony.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in multiple representations.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Optical Fiber Structures: Optical Fiber Modes and Configurations, Mode theory for circular
waveguides, Single mode fibers, Fiber materials.
Attenuation and Dispersion: Attenuation, Absorption, Scattering Losses, Bending loss, Signal
Dispersion: Modal delay, Group delay, Material dispersion.
[Text1 : 3.1, 3.2, 2.3[2.3.1 to 2.3.4], 2.4[2.4.1, 2.4.2],2.5, 2.7].
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
Optical Sources and detectors: Light Emitting Diode: LED Structures, Light source materials,
Quantum efficiency and LED power, Laser Diodes: Modes and threshold conditions, Rate equations,
External quantum efficiency, Resonant frequencies, Photodetectors: The pin Photodetector, Avalanche
Photodiodes.
03.10.2022

WDM Concepts: Overview of WDM, Isolators and Circulators, Fiber grating filters, Dielectric thin-film
filters, Diffraction Gratings.
[Text1: 4.2 ,4.3, 6.1, 10.1, 10.3, 10.4, 10.5, 10.7]
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-3
Mobile Communication Engineering: Wireless Network generations, Basic propagation Mechanisms,
Mobile radio Channel.
Principles of Cellular Communications: Cellular terminology, Cell structure and Cluster, Frequency
reuse concept, Cluster size and system capacity, Frequency Reuse Distance, Cochannel Interference and
signal quality.
[ Text2: 1.4, 2.4, 2.5, 4.1 to 4.4, 4.6, 4.7]
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Multiple Access Techniques: FDMA, TDMA, CDMA, SDMA, Hybrid Multiple Access Techniques,
Multicarrier Multiple Access Schemes.
A Basic Cellular System: A basic cellular system connected to PSTN, Parts of basic cellular system,
Operation of a cellular system.
[Text2: 8.2, 8.3, 8.4.5, 8.5, 8.6, 8.10, 9.2.2, 9.2.3, 9.3]
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Global System for Mobile (GSM): GSM Network Architecture, GSM signalling protocol architecture,
Identifiers used in GSM system, GSM Channels, Frame structure for GSM, GSM Call procedures, GSM
hand-off Procedures, GSM Services and features.
[Text2: 11.1, 11.2,11.3,11.4, 11.5, 11.8, 11.9. 11.10]
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Classification and characterization of optical fibers with different modes of signal propagation.
2. Describe the constructional features and the characteristics of optical fiber and optical devices
used for signal transmission and reception.
3. Understand the essential concepts and principles of mobile radio channel and cellular
communication.
4. Describe various multiple access techniques used in wireless communication systems.
5. Describe the GSM architecture and procedures to establish call set up, call progress handling and
call tear down in a GSM cellular network.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together
Continuous Internal Evaluation (CIE):
CIE will be the same as other core theory courses.
03.10.2022

CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination (SEE):
For non-MCQ pattern of CIE and SEE
Continuous Internal Evaluation (CIE):
At the beginning of the semester, the instructor/faculty teaching the course has to announce the methods
of CIE for the course.
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books
1. Gerd Keiser, Optical Fiber Communication, 5th Edition, McGraw Hill Education (India) Private
Limited, 2016. ISBN:1-25-900687-5.
2. T L Singal, Wireless Communications, McGraw Hill Education (India) Private Limited, 2016, ISBN:0-
07-068178-3.
Reference Books
1. John M Senior, Optical Fiber Communications, Principles and Practice, 3 rd Edition, Pearson
Education, 2010, ISBN:978-81-317-3266-3
2. Theodore Rappaport, Wireless Communications: Principles and Practice, 2nd Edition, Prentice Hall
Communications Engineering and Emerging Technologies Series, 2002, ISBN 0-13-042232-0.
3. Gary Mullet, Introduction to Wireless Telecommunications Systems and Networks, First Edition,
Cengage Learning India Pvt Ltd., 2006, ISBN - 13: 978-81-315-0559-5.
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI


B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

DSP Algorithms & Architecture


Course Code 21EC723 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
This course will enable the students to
 Understand the concepts of digital signal processing techniques.
 Understand the computational building blocks of DSP processors and its speed issues.
 Understand the various addressing modes, peripherals, interrupts and pipelining structure of the
TMS320C54xx processor.
 Learn how to interface the external devices to the TMS320C54xx processor in various modes.
 Understand DSP algorithms and applications with their implementation using TMS320C54xx
processor.
Teaching-Learning Process (General Instructions)
The sample strategies, which the teacher can use to accelerate the attainment of the various course
outcomes are listed in the following:
1. Lecture method (L) does not mean only the traditional lecture method, but a different type of
teaching method may be adopted to develop the outcomes.
2. Show Video/animation films to explain the functioning of various techniques.
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher-order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in multiple representations.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
Module-1
Introduction to Digital Signal Processing: Introduction, A Digital Signal – Processing system, Major
features of programmable Digital signal processors, The Sampling Process, Discrete Time Sequences,
Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear Time-Invariant Systems,
Digital Filters, Decimation and Interpolation.
Section 1.3, 2.1 to 2.8 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-2
Architectures for Programmable Digital Signal Processing Devices: Introduction, Basic
Architectural Features, DSP Computational Building Blocks, Bus Architecture and Memory, Data
Addressing Capabilities, Address Generation Unit, Programmability and Program Execution, Speed
Issues, Features for External Interfacing.
Section 4.1 to 4.9 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
03.10.2022

Process RBT Level: L1, L2, L3


Module-3
Programmable Digital Signal Processors: Introduction, Commercial Digital Signal-processing
Devices, Data Addressing Modes of TMS32OC54XX, Memory Space of TMS32OC54xx Processors,
Program Control. Detail Study of TMS320C54X & 54xx Instructions and Programming, On – Chip
Peripherals, Interrupts of TMS32OC54XX Processors, Pipeline Operation of TMS32OC54xx Processor.
Section 5.1 to 5.10 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-4
Implementation of Basic DSP Algorithms: Introduction, The Q – notation, FIR Filters, IIR Filters,
Interpolation and Decimation Filters (one example in each case).
Implementation of FFT Algorithms: Introduction, An FFT Algorithm for DFT Computation, Overflow
and Scaling, Bit – Reversed Index. Generation & Implementation on the TMS32OC54xx.
Section 7.1 to 7.6 and 8.1 to 8.6 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Module-5
Interfacing Memory and Parallel I/O Peripherals to Programmable DSP Devices: Introduction,
Memory Space Organization, External Bus Interfacing Signals. Memory Interface, Parallel I/O Interface,
Programmed I/O, Interrupts and I/O Direct Memory Access (DMA).
Interfacing and Applications of DSP Processors: Introduction, Synchronous Serial Interface, A
CODEC Interface Circuit, DSP Based Bio-telemetry Receiver, A Speech Processing System, An Image
Processing System.
Section 9.1 to 9.8, 10.1 to 10.5 and11.1 to 11.5 of Text 1
Teaching-Learning Chalk and talk method, Power point presentation
Process RBT Level: L1, L2, L3
Course outcome (Course Skill Set)
At the end of the course the student will be able to:
1. Comprehend the knowledge & concepts of digital signal processing techniques.
2. Apply knowledge of various types of addressing modes, interrupts, peripherals and pipelining
structure of TMS320C54xx processor.
3. Develop assembly language programs to implement FIR, IIR filters and FFT algorithms.
4. Build the Applications on Programmable DSP devices.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
03.10.2022

Marks (duration 01 hours)


6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
the outcome defined for the course.
Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks

Suggested Learning Resources:


Text Book:
“Digital Signal Processing”, Avatar Singh and S Srinivasan, Thomson Learning, 2004
Reference Books:
1. “Digital Signal Processing: A practical approach”, Ifeachor E C, Jervis B. W Pearson-Education, PHI,
2002.
2. “Digital Signal Processors”, B Venkataramani and M Bhaskar, TMH, 2nd Ed., 2010
3. “Architectures for Digital Signal Processing”, Peter Pirsch, John Wiley.
03.10.2022

VISVESVARAYA TECHNOLOGICAL UNIVERSITY, BELAGAVI


B.E: Electronics & Communication Engineering / B.E: Electronics & Telecommunication Engineering
NEP, Outcome Based Education (OBE) and Choice Based Credit System (CBCS)
(Effective from the academic year 2021 – 22)
VII Semester

Network Security
Course Code 21EC732 CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:1 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 3 Exam Hours 3
Course objectives:
 Preparation: To prepare students with fundamental knowledge/ overview in the field of Network
Security with knowledge of security mechanisms and services.
 Core Competence: To equip students with a basic foundation of Network Security by delivering the
basics of Transport Level Security, Secure Socket Layer, Internet Protocol security, Intruders,
Intrusion detection and Malicious Software, Firewalls, Firewall characteristics, Biasing and
Configuration.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teacher can use to accelerate the attainment of the various course
outcomes.
1. Lecture method (L) does not mean only traditional lecture method, but different type of teaching
methods may be adopted to develop the outcomes.
2. Show Video/animation films to explain the different Network Security Techniques / Algorithms
3. Encourage collaborative (Group) Learning in the class
4. Ask at least three HOTS (Higher order Thinking) questions in the class, which promotes critical
thinking
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop thinking
skills such as the ability to evaluate, generalize, and analyze information rather than simply recall
it.
6. Topics will be introduced in a multiple representation.
7. Show the different ways to solve the same problem and encourage the students to come up with
their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.
9. Adopt Flipped class technique by sharing the materials / Sample Videos prior to the class and have
discussions on the that topic in the succeeding classes
10. Give Programming Assignments
Module-1
Attacks on Computers and Computer Security: Need for Security, Security Approaches, Principles of
Security Types of Attacks. (Text2: Chapter1)
Security Mechanisms, Services and Attacks, A model for Network security (Text1: Chapter1: 3, 4, 5, 6)
Network Access Control, Extensible Authentication Protocol (Text1: Chapter 16: Section 1,2)
Teaching- Chalk and talk method, YouTube videos, Flipped Class Technique
Learning RBT Level: L1, L2, L3
Process
Module-2
Transport Level Security: Web Security Considerations, Secure Sockets Layer, Transport Layer
Security, HTTPS, Secure Shell (SSH) (Text1: Chapter15)
Teaching- Chalk and talk method YouTube videos, Flipped Class Technique and PPTs.
Learning Self-study topics: Block cipher modes, Cryptographic Hash functions and MAC codes
Process RBT Level: L1, L2, L3
03.10.2022

Module-3
IP Security: Overview of IP Security (IPSec), IP Security Architecture, Modes of Operation, Security
Associations (SA), Authentication Header (AH), Encapsulating Security Payload (ESP), Internet Key
Exchange. (Text1: Chapter19)
Teaching- Chalk and talk method, YouTube videos, Flipped Class Technique and PPTs.
Learning Self-study topics: OSI Model
Process
RBT Level: L1, L2, L3
Module-4
Intruders: Intruders, Intrusion Detection, Password Management. (Chapter20-Text1)
MALICIOUS SOFTWARE: Viruses and Related Threats, Virus Countermeasures, (Chapter21-Text1)
Teaching- Chalk and talk method, YouTube videos, Flipped Class Technique and PPTs.
Learning RBT Level: L1, L2, L3
Process
Module-5
Firewalls: The Need for firewalls, Firewall Characteristics, Types of Firewalls, Firewall Biasing,
Firewall location and configuration (Chapter 22-Text 1)
Teaching- Chalk and talk method, YouTube videos, Flipped Class Technique and PPTs.
Learning RBT Level: L1, L2, L3
Process
Course outcomes (Course Skill Set)
At the end of the course the student will be able to:
1. Explain network security services and mechanisms and explain security concepts
2. Understand the concept of Transport Level Security and Secure Socket Layer.
3. Explain Security concerns in Internet Protocol security
4. Explain Intruders, Intrusion detection and Malicious Software
5. Describe Firewalls, Firewall Characteristics, Biasing and Configuration
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures not less than 35% (18 Marks out of 50) in the semester-end
examination (SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous
Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation:
Three Unit Tests each of 20 Marks (duration 01 hour)
1. First test at the end of 5th week of the semester
2. Second test at the end of the 10th week of the semester
3. Third test at the end of the 15th week of the semester
Two assignments each of 10 Marks
4. First assignment at the end of 4th week of the semester
5. Second assignment at the end of 9th week of the semester
Group discussion/Seminar/quiz any one of three suitably planned to attain the COs and POs for 20
Marks (duration 01 hours)
6. At the end of the 13th week of the semester
The sum of three tests, two assignments, and quiz/seminar/group discussion will be out of 100 marks
and will be scaled down to 50 marks
(to have less stressed CIE, the portion of the syllabus should not be common /repeated for any of the
methods of the CIE. Each method of CIE should have a different syllabus portion of the course).
CIE methods /question paper is designed to attain the different levels of Bloom’s taxonomy as per
03.10.2022

the outcome defined for the course.


Semester End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the subject (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
The students have to answer 5 full questions, selecting one full question from each module.. Marks scored
out of 100 shall be reduced proportionally to 50 marks
Suggested Learning Resources:
Text Books:
1. William Stallings, “Cryptography and Network Security Principles and Practice”, Pearson Education
Inc., 5th Edition, 2014, ISBN: 978-81-317- 6166-3
2. Atul Kahate, “Cryptography and Network Security”, TMH, 2003.

Reference Books:
1. Cryptography and Network Security, Behrouz A Forouzan, TMH, 2007.
2. Introduction to Computer Security, Matt Bishop, Sathyanarayana S V, Pearson Education, 2006,
ISBN 81-7758-425/1.
Web links and Video Lectures (e-Resources)
https://nptel.ac.in/courses/106105031
https://nptel.ac.in/courses/128106006
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Programming Assignments / Mini Projects can be given to improve programming skills.

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