MOUNT ZION COLLEGE OF ENGIEERING & TECHNOLOGY

Lena Vilakku, Pilivalam

Pudukkottai - 622507

EC1406 –ELECTRONIC SYSTEM DESIGN

LABORATORY MANUAL

PREPARED BY
CT.VIJAY NAGARAJ

ASST. PROFESSOR

DEPARTMENT OF ECE

1
 SL.
NO LIST OF EXPERIMENTS PAGE NO

1. DESIGN OF FREQUENCY MODULATOR AND 5

DEMODULATOR

2. DESIGN OF BUCK – BOOST CONVERTER 9

3. DESIGN OF FLY BACK CONVERTER 13

4. DESIGN OF AMPLITUDE MODULATOR AND 17

DEMODULATOR

5. DESIGN OF AC/DC VOLTAGE REGULATOR 21

USING SCR

6. DESIGN OF WIRELESS DATA MODEM 24

7. DESIGN OF PROCESS CONTROL TIMER 31

8. DESIGN OF INSTRUMENTATION AMPLIFIER 33

9. MICROCONTROLLER BASED SYSTEM DESIGN 36

10. . DSP BASED SYSTEM DESIGN 38

.
APPEDIX 1.1 41

APPEDIX 1.2 43

2
 EC1406 – ELECTRONIC SYSTEM DESIGN LABORATORY

LIST OF EXPERIMENTS

1. DC power supply design using buck-boost converters

2. DC power supply design using fly back converter (isolated type)
3. Design of a 4–20mA transmitter for a bridge type transducer.
4. Design of AC/DC voltage regulator using SCR
5. Design of process control timer
6. Design of AM / FM modulator / demodulator
7. Design of wireless data modem.
8. Microcontroller based system design
9. DSP based system design

3
SL
DATE NAME OF THE EXPERIMENTS MARK STEFF SIGN
NO

4
 DESIGN OF FREQUENCY MODULATOR AND DEMODULATOR

EXP. NO : 1

DATE :

AIM :

To transmit a modulating signal after frequency modulation using IC –XR2206 and receive the
signal back after demodulator using IC- LM565.

APPARATUS REQUIRED:

5
 S.NO COMPONENTS RANGE QTY

1 FM IC- XR2206 1

PLL IC-LM565 1
2
3 Resistors 10kΩ, 47kΩ, 100 KΩ, 150KΩ,220Ω Each 1
560KΩ,4.7KΩ Each 2
3 Capacitors 0.1µf,10µf, 1µf, 470pf Each 1
0.01µf, 0.001µf Each 2
CRO 1
5
AFO 1
6
RPS 2
7
Breadboard 2
7
Connecting wires As per
8
required
THEORY:

With the frequency modulation the carrier signal frequency is varied at an audio rate. The
amount of frequency shift variation is based on the amplitude of the modulating frequency.

The XR-2206 is widely used as monolithic IC which can be used to build a function generator
with the addition of only a few external components. It produces a triangle, square wave ,sine wave and
variable duty cycle pulse. It allows amplitude modulation, frequency modulation (FM) and frequency
shift keying signals as well.

A constant current is used to charge and discharge an external capacitor connected between pin 5
and 6 of the current controlled oscillator .The current I is determined by the external resistors connected
to pin 7 or 8.Thus the frequency of frequency of the triangular wave form is controlled by the external
capacitor or the external resistor at pin 7 or 8. A comparator within the current controlled oscillator
produces a 50% duty cycle square wave which derives an open collector buffer .The triangular wave
output from the current controlled oscillator is fed to the shine sharper circuit.

When 13 and 14 pin is open the gain of the sine sharper liner. However if we connect a 180E
resistor between the pin 13 and 14. The speakers of the triangular wave have got rounded to produce a
sine wave.

The PLL can be used for FM demodulator. The audio rate of frequency shift of the carrier when
compared with the steady VCO output would result in a changing of the VCO control voltage at the
audio rate. The carrier is filtered off by the LPF. This is a typical internal block diagram of an IC PLL
circuit. The amplifier is used to boost the level of the VCO control voltage. If the received signal
frequency is greater than the carrier frequency then the output will be a positive value.

FREQUENCY MODULATOR:

6
FREQUENCY DEMODULATOR:

TABULATION:

SIGNAL AMPLITUDE TIME ERIOD FREQUENCY(HZ)

(V) (msec)

Modulating Signal

FM Signal 7

Demodulated signal
MODULATING SIGNAL

MODULATED / FM SIGNAL

DEMODULATED SIGNAL

PROCEDURE:

1 The circuit wiring is done as shown in diagram.

2 Verify the circuit connection..
3 A modulating signal input given to the FM modulator can also be given from a external
function generator or an AFO
4 Now increase the Frequency of the modulated signal to the required level.

8
 5 The amplitude and the time duration of the modulating signal are observed using CRO..
6 Frequency modulated signal is given as input to demodulated circuit The final demodulated
signal is viewed using an CRO Also the amplitude and time duration of the demodulated
wave are noted down.

RESULT:

Thus the modulating signal after frequency modulation was transmitted using XR2206 and
receive the signal back after demodulator using LM565 and its output was verified.

DESIGN OF BUCK – BOOST CONVERTER

EXP NO : 2

DATE :

9
AIM:

To design a buck boost converter circuit and to plot its regulated characteristics.

APPARATUS REQUIRED:

S.N COMPONENTS SPECIFICATION QTY

O
1 Diode IN4007 1

2 Inductor 6H 1

3 Capacitors 4µf 1

4 DRB 1

5 CRO 1

6 AFO 1

7 Breadboard 1

8 Connecting wires As per

required

THEORY:

The Buck Boost is a popular non-isolated, inverting power stage topology, sometimes called a
step up/down power stage. The Buck boost power stage is chosen because the output voltage is inverted
from the input voltage and the output voltage can be either higher or lower than the input voltage.
However the output voltage is opposite in polarity from the input voltage. The Buck Boost converter
circuit consists of MOSFET switch Q, inductor L, diode D, filter capacitor C and load resistor R.

BUCK-BOOST CONVERTER

10
TABLE 1:

INPUT WAVEFORM INPUT OUTPUT

AMPLITUDE TIME AMPLITUDE TIME

(V ) (ms) (V ) (ms)

TABLE 2: LOAD CHARACTERISTICS

LOAD(Kῼ) INPUT OUTPUT

AMPLITUD TIME(ms) AMPLITUD TIME(ms)
E E
(V) (V)

TABLE 3: LINE CHARACTERISTICS

LOAD(Kῼ) INPUT OUTPUT

AMPLITUDE TIME(ms) AMPLITUDE TIME(ms)
(V) (V)

MODEL GRAPH

INPUT WAVEFORM
11
OUTPUT WAVEWFORM

LOAD CHARACTERISTICS

LINECHARACTERISTICS

PROCEDURE:

1. The connections are made as per the circuit diagram.

2. Set the input in the function generator. Note down the output reading.
12
 3. By varying the load tabulate the output voltage and time period with input kept constant.
4. By varying the input amplitude tabulate the output amplitude and time period with load kept
constant.
5. Plot the graph as per reading.

RESULT:

Thus the buck boost converter was designed and its regulated characteristics were plotted.

DESIGN OF FLY BACK CONVERTER

EXP NO : 3
13
DATE :

AIM:

To design and a Fly back converter circuit and to plot its regulated characteristics.

APPARATUS REQUIRED:

S.N COMPONENTS SPECIFICATION QTY

O
1 Transistor SL100 1

1 Diode IN4007 1

2 Inductor 6H 1

3 Capacitors 4µf 1

4 DRB 1

5 CRO 1

6 AFO 1

7 Breadboard 1

8 Connecting wires As per

required

THEORY:

Fly-back converter is the most commonly used SMPS circuit for low output power applications
where the output voltage needs to be isolated from the input main supply. The output power of fly-back
type SMPS circuits may vary from few watts to less than 100 watts. The overall circuit topology of this
converter is considerably simpler than other SMPS circuits. Input to the circuit is generally unregulated
dc voltage obtained by rectifying the utility ac voltage followed by a simple capacitor filter. The circuit
can offer single or multiple isolated output voltages and can operate over wide range of input voltage
variation. In respect of energy-efficiency, fly-back power supplies are inferior to many other SMPS
circuits but its simple topology and low cost makes it popular in low output power range.

The commonly used fly-back converter requires a single controllable switch like, MOSFET and
the usual switching frequency is in the range of 100 kHz. A two-switch topology exists that offers better
energy efficiency and less voltage stress across the switches but costs more and the circuit complexity
also increases slightly.

FLY BACK CONVERTER:

14
 10 V

SL100

TABULATION 1:

INPUT WAVEFORM INPUT OUTPUT

AMPLITUDE TIME AMPLITUDE TIME

(V p-p) (ms) (V p-p) (ms)

TABULATION 2: LOAD CHARACTERISTICS

LOAD(Kῼ) INPUT OUTPUT

AMPLITUDE TIME(ms) AMPLITUDE TIME(ms)
(V p-p) (V p-p)

TABLE 3: LINE CHARACTERISTICS

LOAD(Kῼ) INPUT OUTPUT

AMPLITUDE TIME(ms) AMPLITUDE TIME(ms)
(V p-p) (V p-p)

MODEL GRAPH

INPUT WAVEFORM

15
OUTPUT WAVEWFORM

LOAD CHARACTERISTICS

LINECHARACTERISTICS

PROCEDURE:

1. The connections are made as per the circuit diagram.

16
 2. Set the input in the function generator. Note down the output reading.
3. By varying the load tabulate the output voltage and time period with input kept constant.
4. By varying the input amplitude tabulate the output amplitude and time period with load kept
constant.
5. Plot the graph as per reading.

RESULT:

Thus the fly back converter was designed and its regulated characteristics were plotted.

DESIGN OF AMPLITUDE MODULATOR AND DEMODULATOR

EXP NO : 4
17
DATE :

AIM:

To transmit a modulating signal after amplitude modulation using BC 194 and receive the signal
back after demodulator using OA79.

APPARATUS REQUIRED:

S.NO COMPONENTS RANGE QTY

1 Transitor BC194 1

2 Resistors 10kΩ, 22kΩ, 2.2kΩ, Each 1

3.3kΩ,47kΩ.
3 Capacitors 0.1µf 3
0.01µf 1
4 DIB 1

5 CRO 1

6 AFO 2

7 RPS 1

7 Breadboard 2

8 Connecting wires As per

required

THEORY:

Amplitude Modulation is a process by which amplitude of the carrier signal is varied in

accordance with the instantaneous value of the modulating signal, but frequency and phase of carrier
wave remains constant.

The modulating and carrier signal are given by

Vm (t) = Vm sinmt

VC (t) = VC sinCt

The modulation index is given by, ma = Vm/ VC.

Vm = Vmax – Vmin and VC = Vmax + Vmin

The amplitude of the modulated signal is given by,

VAM(t) = VC (1+ma sinmt) sinCt

Where

Vm = maximum amplitude of modulating signal

VC = maximum amplitude of carrier signal

Vmax = maximum variation of AM signal

18
 Vmin = minimum variation of AM signal

AMPLITUDE MODULATOR

CRO
AF BC194
O

Carrier signal
AF
O
Message signal

AMPLITUDE DEMODULATOR:

0A79
CRO
AM INPUT
.1uf

TABULATION:

SIGNAL AMPLITUDE IN V TIME PERIOD

(v p-p ) (ms)

Message signal

Carrier
Signal

Modulated
Signal

Demodulated
signal

MODEL GRAPH:
19
MODULATING SIGNAL

CARRIER SIGNAL

MODULATED SIGNAL

DEMODULATED SIGNAL

PROCEDURE:

20
 1 The circuit wiring is done as shown in diagram.
2 Message and Carrier signal is given to the Emitter transistor amplitude modulator.
3 A modulating signal input given to the Amplitude modulator can also be given from a
external function generator or an AFO
4 Now increase the amplitude of the modulated signal to the required level.
5 The amplitude and the time duration of the modulating signal are observed using CRO.
6 Finally the amplitude modulated output is observed from the output of amplitude modulator
stage and the amplitude and time duration of the AM wave are noted down.
7 Amplitude modulated signal is given as input to demodulated circuit The final demodulated
signal is viewed using an CRO Also the amplitude and time duration of the demodulated
wave are noted down.

RESULT:

Thus the modulating signal after amplitude modulation was transmitted using BC 194 and
receive

the signal back after demodulator using OA79 and its output was verified.

DESIGN OF AC/DC VOLTAGE REGULATOR USING SCR

21
EXP NO : 5
DATE :

AIM:
To design AC/DC voltage regulator using SCR.

APPARATUS REQUIRED:

S.NO COMPONENTS RANGE QTY

1 SCR TY7004 1

2 Timer IC 555 1

3 Op-Amp IC 741 1

4 Diode IN 4001 3

5 Zener diode 5.6 v 1

5 Resistor 1k ohm 3
40k ohm, 2.2k ohm, 2.7k ohm Each 1
6 Capacitor 0.1uf,1uf Each 1

7 DRB 1

8 RPS 2

9 Multimeter/CRO 1

7 Breadboard 1

8 Connecting wires As per

required
THEORY:

This device is generally used in switching applications. In the normal "off" state, the device
restricts current to the leakage current. When the gate-to-cathode voltage exceeds a certain
threshold, the device turns "on" and conducts current. The device will remain in the "on" state
even after gate current is removed so long as current through the device remains above the
holding current. Once current falls below the holding current for an appropriate period of time,
the device will switch "off". If the gate is pulsed and the current through the device is below the
holding current, the device will remain in the "off" state.
If the applied voltage increases rapidly enough, capacitive coupling may induce enough charge
into the gate to trigger the device into the "on" state; this is referred to as "dv/dt triggering." This
is usually prevented by limiting the rate of voltage rise across the device, perhaps by using a
snubber. "dv/dt triggering" may not switch the SCR into full conduction rapidly, and the partially
triggered SCR may dissipate more power than is usual, possibly harming the device.

22
AC/DC VOLTAGE REGULATOR:

TABULATION:
DC INPUT: INPUT VOLTAGE=
LOAD RESISTANCE(RL) IN (K OHM) OUTPUT VOLTAGE(Vout) in (v)

TABULATION:
AC INPUT: INPUT VOLTAGE=

LOAD RESISTANCE(RL) IN (K OHM) OUTPUT VOLTAGE(Vout) in (v)

23
MODEL GRAPH

DC INPUT-LOAD REGULATION

AC INPUT- LOAD REGULATION:

PROCEDURE:
1. Connections are made as per the circuit diagram.
2.Input voltage is (AC/DC) set as a constant value.
3. The load resistance is varied in steps of 1 k ohm using DRB and the output voltage is
measured using multimeter

RESULT:
Thus the AC/DC voltage regulator was designed using SCR.

24
 DESIGN OF WIRELESS DATA MODEM

EXP N0 : 6

DATE :

AIM:

To communicate between two microprocessors using wireless data modems.

APPARATUS REQUIRED:
1.8085 microprocessor kit - 2

2. Wireless data modem – 2

DESIGN:

Baud rate calculation:

Baud rate * Required baud rate input to 8251= Required clock

16*300 = 4800

Therefore, Required clock input to 8251 = 4800 Hz

Count value = Clock input to 8253 / Required clock input to 8251

=1.536*10^6 / 4800

= 320 = 140 H.

ALGORITHM FOR TRANSMITTER:

1. Initialize the serial port for data transmission.

2. Set baud rate as 300.
3. Initialize the memory pointer of the data to be transmitted.
4. Set a counter for verification of EOF.
5. Get the data from the consecutive memory locations and transmit it till EOF is
reached. Reset the system

ALGORITHM FOR RECEIVER:

1. Initialize the serial port for data reception.

2. Set baud rate as 300.
3. Initialize the memory pointer for the data to be EOF.
4. Set a counter for verification of EOF.
5. Receive the data and store it in the consecutive memory locations till EOF is reached.
6. Reset the system.

25
HARDWARE DESCRIPTION OF VCT-10A

Serial Input Sources

Antenna

SQUARE WAVE

Serial
SERIAL DATA FSK RF
Data
INTERFACE MODULATOR
TRANSMITTER
IN

DEBOUNCE LOGIC

HARDWARE DESCRIPTION OF VCT-10B

ANTENNA

Serial Data

OUT

RF Receiver FSK Serial

Demodulator Interface

26
FLOWCHART FOR TRANSMITTER

START

Initialize the serial port and data transmission

Set Baud-rate as 300 MHz

Initialize the memory pointer of the data to be

transmitted

Set the counter to verify EOF

YES
EOF

Received

NO

Get the data

STOP

27
PROGRAM FOR TRANSMITTER

Address Opcode Label Mnemonics Operand Comments

4100 21,00,45 LXI H, 4500H

4103 3E, 36 MVI A, 36H Set the timer

4105 D3, 0B OUT 0BH Channel 0 in mode 3

4107 3E, 40 MVI A, 40H Set baud rate as 300

4109 D3, 08 OUT 08H

410B 3E, 01 MVI A, 01H

410D D3, 08 OUT 08H

410F 0E, 05 RELOAD MVI C, 05H Load count

4111 DB, 05 CHECK IN 05H

4113 E6, 04 ANI 04H Check transmitter empty

4115 CA, 11, 41 JZ CHECK

4118 7E MOV A, M

4119 D3, 04 OUT 04H

411B 23 INX H

411C FE, CPI 3 FH Check EOF

411E C2, 0F, 41 JNZ RELOAD

4121 0D DCR C

4122 C2, 11, 41 JNZ CHECK

4125 CF RSTI

Reset

28
FLOWCHART FOR RECEIVER:

START

Initialize the Data port and Receiver

Set Data rate as 300 MHz

Initialize the memory pointer for data to be stored

Set the counter to verify EOF

IF EOF
YES
Receive
NO

NO

Get the data

STOP

29
 PROGRAM FOR RECEIVER:

Address Opcode Label Mnemonics Operand Comments

4100 21,00,45 LXI H, 4500H

4103 3E, 36 MVI A, 36H Set the timer

4105 D3, 0B OUT 0BH Channel 0 in mode 3

4107 3E, 4 MV A, 40H Set baud rate as 300

4109 D3, 0 OU T 08H

410B 3E, 01 MVI A,01H

410D D3,08 OUT 08H

410F 0E, 0 RELOAD MVI C, 05H Load count

4111 DB, 05 CHECK IN 05H Check receiver is

ready

4113 E6, 02 ANI 02

4115 CA, 11, 41 JZ CHECK

4118 DB, 04 IN 04H

411A 77 MOV M, A

411B 23 INX H

411C FE 3F CPI 3FH Check EOF

411E C2 OF 41 JNZ RELOAD

4121 OD DCR C

4122 C2 11 41 JNZ CHECK

4125 CF RSTI
Reset

30
TABULATION:

TRANSMITTER RECEIVER

ADDRESS INPUT ADDRESS OUTPUT

PROCEDURE:

1. In transmitter system the data to be transmitted are stored starting from the memory location
indicated by the memory pointer.
2. 5 consecutive “3F”s are stored at the end of the data stream to indicate EOF.
3. The receiver program is executed first and the transmitter program.
4. The received data are verified starting from the memory location indicated by the memory
pointer.

RESULT:

Thus the communication between two microprocessors is made using wireless data modem.

31
 DESIGN OF PROCESS CONTROL TIMER
EXP NO : 7
DATE :

AIM:
To design a process control timer usingCD 4017 to switch on three loads sequentially.

APPARATUS REQUIRED:

S.NO COMPONENTS RANGE QTY

1 Timer IC IC 555 1

2 Counter IC CD 4017 1

3 Resistor 10 k 0hm 2
1 k ohm 3
4 Capacitor 100 uf, 0.01 uf each1

5 LED 3

6 Breadboard 1

7 Connecting wires As per

required
THOERY:
In industries to initiate the process one by one in particular timing sequence. We need a
sequential timer. In this experiment we designed such a simple sequential controller using one decade
counter IC (CD 4017) and one timer IC (NE 555) with this circuit. We can control upto 10 number of
load sequentially. In the diagram we are going to switch on three load sequentially.

Electromagnetic relays are normally used to drive heavy current high voltage loads. It provides
isolation between the load and the control circuits. In this circuit IC 555 has been configured as an
astablemultivibrator the output from the pin 3 will be given as clock input to the counter IC.

The timing can be controlled by varying resistor. Total time period = 0.69(Ra+2Rb)C. By
changing the resistor or capacitor values we get the required time control.

32
PROCESS CONTROL TIMER:

TABULATION:

LOAD INSTANT 1 INSTANT 2 INSTANT 3

LED 1

LED 2

LED 3

PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Verify the circuit connection.
3. Switch on the power supply.
4. Observe the switching time of the load using wrist watch or stop watch.
5. Tabulate the status of the three load.

\\

RESULT:

33
 Thus the process control timer to control three loads has been designed and the output status wee
tabulated.

DESIGN OF INSTRUMENTATION AMPLIFIER

EXP NO : 8
DATE :

AIM:
To design a instrumentation amplifier with bridge type transducer and connect the
applied voltage from the instrumentation amplifier to 4 – 20 mA current using OP-AMP Plot the
variation of temperature and output current.

APPARATUS REQUIRED:

S.NO COMPONENTS RANGE QTY

1 Op-Amp IC 741 4

5 Resistor 100k ohm, 1k ohm, 4,2

4.4k ohm, 330 ohm, 150 ohm 2,4,1
7 DRB 1

8 RPS 3

9 Multimeter /CRO 1

7 Breadboard 1

8 Connecting wires As per

required

THOERY:

In a number of industrial and consumer applications one is required to measure and control
physical quantities. Some typical examples are measurement and control of temperature, humidity light
intensity, water flow etc .These physical quantities are usually measured with the help of transducers.
The output of transducer has to be amplified so that it can drive the indicator or display system. This
function is performed by an instrumentation amplifier.

The important features of instrumentation amplifiers are

1. High gain accuracy.
2. High CMRR.
3. High gain stability with low temperature coefficient.
4. Low DC output.
5. High output impedance.
34
INSTRUMENTATION AMPLIFIER:

TABULATION:
RESISTANCE IN K ohm CURRENT IN mA

35
 MODEL GRAPH:

PROCEDURE:
1. Connections are given as per the circuit diagram.
2. Power supply is switched on.
3. The resistance in DRB is varied from 10k to 80k.
4. The variation in 0utput current is noted and values are tabulated.

RESULT:

Thus the instrumentation amplifier with bridge type transducer was designed and output was
verified.

36
 MICROCONTROLLER BASED SYSTEM DESIGN

EXP NO : 9
DATE :

AIM:
To interface a stepper motor with 8051 micro controller and operate it.

APPARATUS REQUIRED:

1.8051microprocessor kit

2. Stepper motor

3. Interface card

THEORY:

A motor in which the rotor is able to assume only discrete stationary angular position is a stepper
motor. They are used in printer, disk drive process control machine tools etc.

Two-phase stepper motor has two pairs of stator poles. Stepper motor windings A1, A2, B1, B2
are cyclically excited with a DC current to run the motor in clockwise direction and reverse phase
sequence A1, B2, A2, B1 in anticlockwise stepping

Two-phase switching scheme:

In this scheme, any two adjacent stator windings are energized.

Anticlockwise Clockwise

Step A1 A2 B1 B2 Data Step A1 A2 B1 B2 Data

1 1 0 0 1 9H 1 1 0 1 0 AH

2 0 1 0 1 5H 2 0 1 1 0 6H

3 0 1 1 0 6H 3 0 1 0 1 5H

4 1 0 1 0 AH 4 1 0 0 1 9H

Address Decoding logic:

The 74138 chip is used for generating the address decoding logic to generate the device select
pulses CS1 and CS2 for selecting the IC 74175 in which latches the data bus to stepper motor driving
circuitry.

37
PROGRAM:

ADDRESS OPCODE LABEL MNEMONICS OPERAND COMMENTS

4100 90 45 00 START MOV DPTR,#4500H

4103 78 04 JO MOV R0,#04

4105 E0 MOV X A,@DPTR

4106 C0 83 PUSH DPH

4108 C0 82 PUSH DPL

410A 90 FF C0 MOV DPTR,#FFC0H

410D 7A 01 MOV R2,#04H

410F 79 22 MOV R1,#FFH

4111 7B FF DLY 1 MOV R3,#FFH

DLY
4113 DB FE DJNZ R3,DLY

4115 D9 FC DJNZ R1,DLY1

4117 DA FA DJNZ R1,DLY1

4119 F0 MOVX R1,DLY1

411A D0 82 POP @DPTR,A

411C D0 83 POP DPL

411E A3 INC DPH

411F D8 E4 DJNZ DPTR

4121 80 DD SJMP R0,J0

4123 END START

RESULT:
38
 Enter the above program starting from location 4100 and execute the same, stepper motor
rotates. Varying the count at R4 and R5 can vary the speed. Entering the data in the look-up TABLE in
the reverse order can vary the direction of rotation.

DSP BASED SYSTEM DESIGN

EXP NO : 10

DATE :

AIM:

To generate square wave and saw tooth wave using TMS320C5416 Processor.

REQUIREMENTS:

1.PC

2.Debugger software

3.CRO

ALGORITHM:

1.Initialize the data pointer by 100h.,which denotes the data memory 8000h.

2.Set the maximum amplitude of the waveform.

3.Set the maximum frequency of the waveform.

4.Set the output address(DAC)

5.Complement the maximum amplitude to get the minimum amplitude of the waveform.

6.Repeat the maximum amplitude and the minimum amplitude to get the square waveform.

7.Halt the program.

PROCEDURE:

1. Turn on the DSP processor kit.

2. Connect the CRO in the DAC output pin,

3. Open the debugger software.

4. In the menu go to view then click workspace

5. Go to project and open a new project and create the project file.

6. Go to file new assembly file

7. Type the assembly level program and save the file.

8. Go to project add file to project which links the assembly file with the project.

9. Click cmd file add file to project which creates the cmd file associated with assembly file
and project file.

10. Go to project then click build which creates the ASCII file.

39
 11. Go to serial in the menu and click port settings which give connection between system and
the kit.

12. Go to serial then click load program which downloads the ASCII file from system to the kit.

13. Execute the program and the output in the CRO.

SQUARE WAVE

PROGRAM:

START:

STM #140H,STO

RSBX CPL

NOP

NOP

NOP

REP:

ST #0H,DATA

CALL DELAY

ST #0FFFH,DATA

CALL DELAY

B REP

DELAY:

STM #0FFFH, AR1

DEL1:

PORTW DATA,04H

BANZ DEL1,*AR1-

RET

40
SAWTOOTH WAVE

PROGRAM:

.MMREGS

.TEXT

START:

STM #140H,STO

RSBX CPL

NOP

NOP

NOP

NOP

REP:

ST #0H,DATA

INC:

LD DATA,A

ADD #1H,A

STL A,DATA

; PORTW DATA, 04H

CMPM DATA, #0FFFH BC INC, NTC

B REP

41
RESULT:

Thus the square wave and saw tooth wave were generated using TMS320C5416 Processor.

APPEDIX 1.1 - VIVA QUESTIONS

1. Define modulation
2. List out the types of modulation
3. Distinguish between amplitude modulation and frequency modulation
4. What is the basic principle of frequency modulation
5. Define amplitude ,frequency & period
6. What is mean by frequency shift keying
7. What is the role of carrier signal in signal transmission
8. List out the selection factors of carrier signal
9. What is the role of PLL IC in signal modulation
10. What is the role of open control buffer in signal modulation
11. What is the uses of signal convertors
12. List out the difference between buck and chuck convertor
13. What are the functions of AFO
14. Define voltage and current law
15. What is mean by power dissipation
16. Define cutting voltage
17. What is mean by voltage regulation
18. List out voltage control methods
19. What is the role of filtering capacitance in buck convertors
20. Define load characterizes
21. List out the uses of SMPS circuit
22. What is the role of Fly back convertors in SMPS circuit
23. Why we use isolation circuit
24. What are the practical uses of Fly back converter
25. Define active and passive devices
26. what are the advantages of fly back converter
27. why fly back converter are mainly used for low output power range
28. what is the switching frequency range of MOSFET
29. define line characterizes
30. distinguish line and load characteristics
31. what is the uses of amplitude modulation
32. define modulated signal
33. what is mean by demodulated signal

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34. what is the current gain of CB transistor configuration
35. what is the uses of message signal
36. define push pull amplifier
37. define transistor biasing
38. what is mean by emitter follower
39. What is mean by amplitude shift keying
40. Define duty cycle
41. What is the use of gate terminal in SCR
42. Define voltage regulator
43. What is known as zenar breakdown
44. Distinguish PN diode and ZENER diode
45. What is the role of 555 IC
46. Define baud rate
47. List out the uses of modem
48. What is the uses of memory pointer
49. Distinguish stack pointer and memory pointer
50. List out memory allocation methods
51. Define serial port
52. Differentiate stack and queue
53. What is mean by mnemonics
54. Define RF transmitter
55. List out the role of FSK modulator in modem
56. What is the use of sequential timers
57. Explain the functionality of counters
58. Define decade counters
59. Short note on relay
60. Explain relay NO/NC concept
61. What is the role of resister in process control timer circuit
62. Short note on light depended resistor
63. List out the role of instrumentation amplifiers In signal transmission
64. State signal conditioning
65. Define CMRR
66. What is mean by input impedance
67. Define stability
68. What is the effect of temperature coefficient of resistance in signal conditioning circuit
69. Define transducer
70. Distinguish active and passive transducer
71. Distinguish microprocessor and micro controller
72. Explain principal and operation of stepper motor
73. Define accumulator
74. What is the role of program counter
75. List out the signal processing methods

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