Lab I - Introduction to ARM

architecture

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 Abstract

來 略
了 了

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 錄

Part 1 – NET-Start! …………………………………………………..4

NET-Start! ………………………………………………….5
NET-Start! 連 ………………………………………….6
Flash memory……………………………………………………………..7
Synchronous DRAM……………………………………………………...7
Serial port…………………………………………………………………7
Switches and user input button…………………………………………...8
LEDs……………………………………………………………………...8
7-Segment LED…………………………………………………………..8
General purpose I/O……………………………………………………...8
Character base LCD interface……………………………………………9
Real-time clock…………………………………………………………..9
Ethernet…………………………………………………………………..9
Part 2 – Microcontroller - S3C4510B………………………………………..10
Instruction set……………………………………………………………10
Register………………………………………………………………….10
………………………………………………………………………….11

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 NET-Start!
32-bit ARM7TDMI network processor – S3C4510
S3C4510 率 路 理
路 ARM7TDMI Advance RISC
Machines(ARM) RISC macro-cell Thumb 16-bit compressed
instruction set 更 32-bit

S3C4510 了unified 8-Kbyte cache/SRAM, an I2C serial interface,

two UARTs, two timers, 18 programmable I/O ports, and a 10/100BaseT Ethernet
controller

NET-Start! 列
z 2MB Flash (1M x 16bit)
z 16MB SDRAM ( 2 x 4M x 16bit )
z 9-pin D-sub RS-232C serial console port
z 9-pin D-sub full RS-232C electricity serial port
z RS-485 A/B terminator
z RJ-45 10/100 Base-T Ethernet interface
z 36 macro cells high performance CPLD
z Real time clock with charger control
z Watchdog with power failure detection
z Two programmable output LEDs
z One 7-Segment LED display
z Six user input DIP switches
z Two general purpose push buttons
z Multi-ICE connector
z 16 x 2 dot matrix LCD module connector

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NET-Start!

5
 連

z Samsung S3C4510 microprocessor

S3C4510 208-pin Quad Flat Pack(QFP) 理 列 on-chip

9 8KB unified cache/SRAM

9 10/100Mbps Ethernet controller
9 Memory controller providing byte/half-word/word external bus support for
ROM/SRAM, Flash, SDRAM, DRAM, and external input/output
9 Two programmable 32-bit timer
9 One Interrupt controller
9 Two DMA controller channels
9 High-level Data Link Control(HDLC)

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 9 Two UARTs
9 18 programmable input/output bit ports
9 Master I2C serial interface

z Flash memory
NET-Start! 2M bytes Flash memory 裡 bootstrap loader,
pre-compiled Linux kernel, Ethernet MAC addresse, and an initial ram disk image
料 Flash memory 16-bit 度
ROM BANK0

z Synchronous DRAM
16M bytes SDRAM 兩 SDRAM 32-bit 料
SDRAM DRAM BANK0 S3C4510 理 8-Kbytes
unified cache/SRAM 率
zero wait stat internal SRAM

z Serial Ports
兩 UARTs(Universal Asynchronous Receiver/Transmitter)
RS-485 COM1 RS-485
S3C4510 GPIO pins COM2
full RS-232C electricity DTE interface to the modem serial ports

RS-485 RS232C COM1 RS-232 COM1

RS-485 GPIO[6]pin HIGH 料 RS-485 GPIO[7]pin
LOW RS-485 A/B 料

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z Switches and user input buttons
六 DIP 兩 SW1 兩
SW2 SW1 S1 S2 連 External I/O Bank 2 SW2 兩
連 S3C4510 GPIO pins ON LOW
External I/O Bank2 GPIO[2:3]

連 略 SW1 S1 S2
CPLD(Complex Programmable Logic Device)連 S3C4510 CPLD
SW1 S1 S2 連 External I/O bank 2
character based LCD module 連 External I/O bank 0

z LEDs
LEDs (D3-D5) Ethernet 狀
兩 (D1, D2) 連 GPIO[16:17]

z 7-Segment LED
了 External I/O Bank 1

z General-purpose I/O
S3C4510 理 了 18 I/O ports port
IOPMOD IOPCON port

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 NET-Start! 了 GPIO pins 來
RS-485 watchdog timer 類 列 GPIO 狀
GPIO Name Description
0 GPIO_0 General purpose I/O 0
1 GPIO_1 General purpose I/O 1
2 GPIO_IN0 User input switch 1 within SW2
3 GPIO_IN1 User input switch 2 within SW2
4 GPIO_RESERVED Not Available
5 GPIO_WATCHDOG_CLK Watchdog timer clock control
6 GPIO_RS485_DRIVER_EN RS485 transceiver driver enable
7 GPIO_RS485_READ_IN RS485 transceiver read enable
8 GPIO_8/GPIO_EXT_IRQ0 General purpose I/O 8 / External IRQ0
9 GPIO_9/GPIO_EXT_IRQ1 General purpose I/O 9 / External IRQ1
10 GPIO_CTS RS232 Clear To Send
11 GPIO_RI RS232 Ringing Indicator
12 GPIO_12/GPIO_EXT_DRQ0 General purpose I/O 12 / External DMA
request 0
13 GPIO_RTS RS232 Request To Send
14 GPIO_14/GPIO_EXT_DACK0 General purpose I/O 14 / External DMA
acknowledge 0
15 GPIO_CD RS232 Carrier Detect
16 GPIO_LED0 User programmable LED D1
17 GPIO_LED1 User programmable LED D2

z Character based LCD interface

NET-Start! character based LCD module External I/O bank 0

z Real-time clock
DS1672 real-time clock
super-capacitor(C12)

z Ethernet
S3c4510 Ethernet controller 10/100M
bps 行 IEEE 802.3 CSMA/CD protocol IEEE 802.3
MAC Control Layer 流量 Pause 令
MAC Media Independent Interface(MII) Buffered DMA
Interface(BDI) MII ISO/IEC802.3 media independent layer
(physical layer entity)DM9161 料 行

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Part 2 – Microcontroller S3C4510B

更 S3C4510B 理 S3C4510B 50MHz 率

8K internal SRAM 2-way,
set-associative addressing 來

z Instruction set
ARM7TDMI ARM(32-bit) THUMB(16-bit) 令
兩 令 performance size
度 RISC ARM instruction code 度
32bit 理 fetch decode 率 ARM
instruction

(* instruction cond 欄
instruction 行 (conditionally executed))

z Register
ARM7TDMI 37 31 general-purpose 6
來 status 不 不 ARM state
R0-R15 status (CPSR) R15 PC
THUMB state R0-R7 general-purpose
PC stack pointer(SP) link regist(LR) CSPR 了 core

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 S3C4510 來 I/O
利 memory map 來

識 來
什 不

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