A Microstrip Strip Line Based High Dynamic range

Optical Front-end for LiDAR Application

2023 3rd International conference on Artificial Intelligence and Signal Processing (AISP) | 979-8-3503-2074-9/23/$31.00 ©2023 IEEE | DOI: 10.1109/AISP57993.2023.10134997

Pradeep Gorre Aswini Kumar Samantaray

Department of ECE Department of ECE
Vignan’s Foundation for Science, Technolog and Research Vignan’s Foundation for Science, Technolog and Research
Guntur, INDIA Guntur, INDIA
[email protected] [email protected]

Sai Kiran K M Bano Rashmi Shaik

Department of ECE Department of ECE
Vignan’s Foundation for Science, Technolog and Research Vignan’s Foundation for Science, Technolog and Research
Guntur, INDIA Guntur, INDIA
[email protected] [email protected]

Abstract—This work presents a 180 nm CMOS based topology in [8] and [9], where a high
transimpedance amplifier (TIA) for time-of-flight (ToF)
LiDAR. The proposed design includes a T-shaped microstrip
line (MSL) network as first phase, Variable Gain Common
Gate (VGCG) Transimpedance as second phase, and a post
amplification as final stage. The MSL section reduce the
impact of the photodiode capacitance achieving higher
bandwidth performance, while the VGCG provides low input
impedance and performs current to voltage conversion with
high dynamic range (DR). A post amplification stage is
integrated at the output of VGCG TIA in order to achieve
high gain. The work demonstrates a wide band of 1250 MHz,
a maximum transimpedance gain, high DR and an ultra-low Fig. 1. Conceptual LiDAR block diagram.
noise of 91.42 dBΩ, 71 dB, and 3.71 pA/sqrt (Hz). The TIA
along with post amplification consumes a power of 33 mW. gain of 76.3 dBΩ and 81.2 dBΩ are achieved by employing
Keywords—; Time-of-flight, LiDAR, Dynamic range,
a regulated cascode structure. A cherry-hopper (CH)
Microstrip line, Transimpedance Amplifier topology with an inverter push-pull technique is discussed
in [10] to achieve a high bandwidth of 450 MHz, costing a
I. INTRODUCTION power dissipation of 65 mW. Maliang Liu et.al in [11]
Recent advancements in autonomous vehicular proposed an inverter TIA (INV-TIA) which shows a better
electronics, includes multiple sensors like optical sensors, noise and power performance of 2.9 pA/√Hz and 12 mW
radars, and LiDAR for target range detection. Among those, with poor bandwidth of 150 MHz. In the works, common
LiDAR demonstrates a high penetrating feature through gate current mirror amplifier TIA [12] and shunt feedback
dense media, while sustaining a high dimensional accuracy TIA [13] a input referred noise density of 4.58 pA/√Hz and
[1]-[3]. Generally, a ToF LiDAR systems are chosen in 2.21 pA/√Hz are achieved. A bandwidth performance of
autonomous vehicles for the target distance estimation as it 170 MHz is reported in [14] to achieve a high DR (1:624)
has eye-safe susceptivity [4]- [7]. In ToF LiDAR system, with better noise performance, while the receiver bandwidth
the target distance is estimated based on the propagation is not sufficient for autonomous LiDAR application in
time delay between the transmitted and received pulse. different weather scenarios.
Fig. 1 presents the conceptual LiDAR block diagram
The work demonstrates a novel T-shaped MSL
that includes an optical transmitter to emit light pulse, an
integrated VGCG TIA along with post-amplification is
optical receiver to collect the echo pulse, and a controller
proposed, which results in high DR of 71 dB, a wide
board. The receiver collects the reflected pulse signal with
bandwidth of 1250 MHz, while a transimpedance gain of
significant distortion. Receiver section comprises of a
91.42 dBΩ. The variable gain mechanism achieves a high
photodetector to receive the echo pulses and converts light
DR. The organization of the paper is as follows. Section II
energy to current signal, a TIA which converts the weak
discuss TIA circuit implementation covering impedance
input current signal to an amplified voltage signal, an
and noise optimization. Section III discusses results and
analog-to-digital converter to convert analog data to
discussion conclusion in section IV.
controller readable form. Finally, a controller board
approximates the range estimation and executes the II. CIRCUIT DESCIPTION
required actions. The TIA performance plays a significant
place in achieving a high-sensitive LiDAR. Various TIA The schematic of the proposed TIA considering all the
topologies are reported for LiDAR works such as cascode desired specifications for LiDAR receiver under foggy

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 Fig. 2. Schematic of the proposed VGCG TIA with post amplification.

weather conditions is illustrated in Fig. 2. The circuit design

consists of a T-shaped Microstrip line section as first stage, ̅̅̅̅̅̅̅
2
2πfCPD ron1 2 2πfCPD + g mn1
In,TIA = 4K B T ∗ [ ] +( ) RF
which establishes an even-mode impedance value widening (1 + g mn1 ron1 ) 1 − g mn2
the operating frequency range on either side. A VGCG with {
passive feedback is chosen as a second phase because of its 2πfCPD ron2 2
low input impedance and high linear DR. To achieve a high +[ ] g mn2
(1 + g mn2 ron2 )
transimpedance gain, a post-amplification stage is 2
integrated. The proposed TIA design demonstrates a 2πfCPD
significant merit like high transimpedance gain with + ( ) g mn2 (6)
1
adequate output swing, wide bandwidth, high DR with (
r
+ g mn1 )
[ on1 ]}
better noise performance. The transimpedance gain of the
VGCG TIA is given as (1). where, K B indicates the Boltzmann constant, and T is
absolute room temperature. According to (6), the R F noise
R F (g mn1 g mn2 ron1 ron2 + 1)(g mn3 ron2 + 1)
ZTIA (S) = (1) is high at low frequencies and the Mn1 noise dominates at
SCPD (g mn3 ron2 + 1) + g mn1 g mn2 ron1 ron2 + 1 higher frequencies. The noise contribution of Mn1 can be
Where R F is feedback resistance, while g mn1 , g mn2 , g mn3 reduced by increasing its transconductance. The R F noise is
are transconductances of Mn1 , Mn2 , Mn3 . CPD is the optimized by choosing low values. Hence, noise
photodiode capacitance. From equation (3), it is observed optimization is achieved.
that the VGCG TIA gain is enhanced by a factor of III. RESULTS AND DISCUSSIONS
(g mn3 ron2 + 1) when compared to traditional common-
The fully integrated TIA simulations are achieved using
gate TIA.
Keysight’s advanced design system (ADS) platform. Fig. 3
By neglecting the parasitic capacitance effect of
transistors Mn1 and Mn2 , the input impedance, Zin (TIA) of shows the return loss and forward gain plot of the proposed
the proposed TIA is approximated as (2). TIA. An electrical bandwidth of 1250 MHz with a
maximum forward gain of 53.7 dB are noticed. The
1
Zin (TIA) = (2) transimpedance gain and dynamic range plot is shown in
g mn1 g mn2 (r01 ||R F ) Fig. 4, where a maximum transimpedance gain of 91.4 dBΩ
From equation (4), it is evident that the impedance of the and a DR of 39 dB are reported at 0.1V of VCONTROL . The
proposed TIA is g mn2 (r01 ||R F ) times lesser than the noise performance of the VGCG TIA is illustrated in Fig. 5,
conventional CG TIA topology, while consuming the same with a minimum IRN of 3.71 pA/√Hz at VCONTROL of 0.1
power. The -3dB bandwidth of the VGCG TIA, BW−3dB V. Fig. 5 also presents the group delay value (GDV) vs
is given as (3). frequency plot of the proposed VGCG TIA with a GDV of
g mn1 R F 7.41 ns over the 3dB frequency. Table I presents the
BW−3dB ≈ (3)
2πCPD performance comparison of the VGCG TIA with other
According to equation (3), the bandwidth enhancement published works and it is clear that the proposed design
of R F times than the conventional CG TIA is achieved. By achieves a large bandwidth, high DR, high transimpedance
applying circuit analysis, the total input-referred noise gain, and considerable noise when compared to other works
current density of the proposed TIA is given as (6). First as are the main targeted specifications of the work.
term in (6) represents the transistor Mn1 noise and the
second term represnts the noise contribution of R F . The
third term and final terms are due to the transistors
Mn2 and Mn3 .

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 TABLE I
Comparison of the Proposed Work with Other Works.
Parameters [6] [9] [10] [11] This
Work
Process CMOS CMO CMO CMO CMO
S S S S

Topology VCF 3- CH+I INV VGC

stage NV G
push- push-
pull pull
inverte
rs
Transimpe 76.3 101.3 86 82 91.42
dance gain
Fig. 3. S-parameter values of fully integrated TIA. (dBΩ)

Bandwidth 720 12.5 450 150 1240

(MHz)

Input 6.3 3.54 2.59 2.5 3.71

referred
noise(pA/√
Hz)

DR (dB)
79 56 -- -- 71
Power
dissipation 29 60 65 12 36
(mW)

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Fig. 4. Transimpedance gain and dynamic range vs frequency.
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