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7 views1 page

sheet_4_EEE_315

Uploaded by

9845m654
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Sohag University 3 rd Year, Elec. Eng. Dept.

Faculty of Engineering Electro. & Comm. Prog.


First Semester: 2023-2024 Sheet # 4 EEE 315: Electronics (3)
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1- (a) Given ID = 14 mA and VGS = 1 V, determine VP if IDSS = 9.5 mA for a D-type MOSFET.
(b) For E-MOSFET, given k = 0.4 x 10-3 A/V2 and ID = 3 mA with VGS = 4 V, determine VT.
(c) Sketch the transfer and drain characteristics of an n -channel D-MOSFET with IDSS = 12 mA and VP
= 8 V for a range of VGS = −VP to VGS = 1 V.
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2- (a) Describe in your own words the operation of the given circuit with Vi
= 0 V.
(b) If the “on” MOSFET (with Vi = 0 V) has a drain current of 4 mA with
VDS = 0.1 V, what is the approximate resistance level of the device? If ID
= 0.5 μA for the “off” transistor, what is the approximate resistance of
the device? Do the resulting resistance levels suggest that the desired
output voltage level will result?

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3- For the given circuits, determine: ID, VGS, and VDS. Obtain the solution graphically and mathematically.

𝐕𝐏 = 𝟐 𝐕

𝐕𝐏 = 𝟒 𝐕

(a) (b) (c) (d)


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4. Design a self-bias network using a JFET transistor with IDSS = 8 mA and VP = 6 V to have a Q -point at
IDQ = 4 mA using a supply of 14 V. Assume that RD = 3RS and use 5% standard values resistors.

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5. Design a voltage-divider bias network using a D-type MOSFET with IDSS = 10 mA and VP = 4 V to
have a Q -point at IDQ = 2.5 mA using a supply of 24 V. In addition, set VG = 4 V and use RD = 2.5 RS
with R1 = 22 M. Use 5% standard values resistors.

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6. Design a feedback bias network using an E-type MOSFET with VGS(Th) = 4 V and k = 0.5 x 10-3 A/V2 to
have a Q -point of IDQ = 6 mA. Use a supply of 16 V and standard values.

___________________________

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