Chapter 1 Introduction

1.1 Introduction to Microprocessors:

A Microprocessor is a multipurpose, Programmable clock-driven, register based electronic device
that read binary instruction from a storage device called memory, accepts binary data as input and
processes data according to those instructions and provides results as outputs. A Microprocessor is a
clock driven semiconductor device consisting of electronic circuits manufactured by using either a
LSI or VLSI technique.

1.2 History of Microprocessor: INTEL Series

4 bit Microprocessors
4004
 Introduced in 1971
 First microprocessor by Intel
 It was a 4-bit microprocessor
 Its clock speed was 740 KHz
 It had 2,300 transistors
 It could execute around 60,000 instructions per seconds
 Used in calculators
4040
 Introduced in 1974
 4-bit microprocessor
 3,000 transistors were used
 Clock speed was 740 KHz
 Interrupt features were available
8 Bit Microprocessors
8008
 Introduced in 1972 it was first 8 bit microprocessor
 Its clock speed was 500 KHz
 Could execute 50,000 instruction per second
 Used in: Computer terminals, Calculator, Bottling Machines, industrial Robots
8080
 Introduced in 1974
 It was also 8-bit microprocessor
 Its clock speed was 2 MHz
 It has 6,000 transistors
 10 times faster than 8008
 Could execute 500,000 instructions per second
 Used In: Calculators, Industrial Robots
8085
 Introduced in 1976
 It was also 8-bit microprocessor
 Its clock speed was 3 MHz
 Its data bus is 8 bit and address bus is 16 bit
 It has 6,500 transistors

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  It could execute 769,230 instructions per second
 It could access 64KB of memory
 It has 246 instructions
 Used In: early PC, On-Board Instrument Data Processors
16 Bit Microprocessors
8086
 Introduced in 1978
 First 16-bit microprocessor
 Clock speed is 5 to 10 MHz
 Data bus is 16-bit and address bus is 20-bit
 It had 29,000 transistors
 It could execute 2.5 million instructions per second
 Could access 1MB of memory
 It had 22,000 instructions
 Used In: CPU of Microcomputers
8088
 Introduced in 1979
 It was also 16-bit microprocessor
 It was creates as cheaper version of Intel’s 8086
 16-bit processor with an 8-bit data bus
 Could execute 2.5 million instructions per second
 The chip become the most popular in the computer industry when IBM used it for its
first PC
80286
 Introduced in 1982
 It was 16-bit microprocessor
 Its clock speed was 8 MHz
 Data bus is 16-bit and address bus is 24-bit
 Could address 16 MB of memory
 It has 134,000 transistors
 Could execute 4-million instructions per second
32 Bit Microprocessors
80386
 Introduced in 1986
 First 32-bit microprocessor
 Data bus is 32 bit and address bus is 32-bit
 It could address 4GB of memory
 It has 275,000 transistors
 Clock speed varied from 16 MHz to 33 MHz depending upon different versions
 Different Versions
80386DX
80386SX
80386SL
80486

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 Introduced in 1989
 32-bit microprocessor
 Had 1.2 million transistors
 Clock speed varied from 16 MHz to 100 MHz depending upon the various versions
 It had five different versions
80486DX
80486SX
80486DX2
80486SL
80486DX4
 8KB of cache memory was introduced
Pentium
 Introduced in 1993
 It was also 32-bit microprocessor
 Clock speed was 66 MHz
 Data bus is 32-bit and address bus is 32-bit
 Could address 4GB of memory
 Could execute 110 million instructions per second
 Cache memory
 8KB for Instruction
 8KB for data
Upgraded Version: Pentium Pro
Pentium II
 Introduced in 1997
 32-bit microprocessor
 Clock speed was 233 to 450 MHz
 MMX technology was supported
 L2 cache and processor were on one circuit
 Upgraded Version: Pentium II Xenon
Pentium III
 Introduced in 1999
 It was 32-bit microprocessor
 Clock speed varied from 500 MHz to 1.4 GHz
 It had 9.5 million transistors
Pentium IV
 Introduced in 2000
 32-bit microprocessor
 Clock speed was from 1.3 GHz to 3.8 GHz
 L1 cache was 32 KB and L2 cache was 256 KB
 It had 42 million transistors
Intel Dual Core
 Introduced in 2006
 It is 32-bit or 64 bit Microprocessor
 It has 2-cores

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  Both cores have their own internal bus and L1 cache but share the external bus and L2 cache
 Support SMT (Simultaneously Multithreading Technology)
64 Bit Microprocessors
Intel Core 2
 Introduced in 2006
 64-bit microprocessor
 Clock speed is from 1.2 GHz to 3GHz
 It has 291 million transistors
 L1 cache- 64 KB per core
 L2 cache- 4 MB
Versions:
 Intel Core 2 Duo
 Intel Core 2 Quad
 Intel Core 2 Extreme
Intel Core i7
 Introduced in 2008
 64-bit microprocessor
 It has 4 physical cores
 Clock speed is from 2.66 GHz to 3.33 GHz
 It has 781 million transistors
 L1 cache- 64 KB per core
 L2 cache- 256 KB
 L3 cache- 4 MB
Intel Core i5
 Introduced in 2009
 It is a 64-bit microprocessor
 It has 4 physical cores
 Its clock speed is from 2.40 GHz to 3.60 GHz
 It has 781 million transistors
 L1 cache- 64 KB per core
 L2 cache- 256 KB
 L3 cache- 8 MB
Intel Core i3
 Introduced in 2010
 64-bit microprocessor
 It has 2 physical cores
 Clock speed is from 2.93 GHz to 3.33 GHz
 It has 781 million transistors
 L1 cache- 64 KB per core
 L2 cache- 512 KB
 L3 cache- 4 MB

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1.3 Basic Block Diagram of a Digital Computer:
A typical programmable machine can be represented with three components: MPU, Memory and
I/O as shown in Figure.

Figure: Microprocessor

These three components work together or interact with each other to perform a given task; thus
they comprise a system. The machine (system) represented in above figure can be programmed to
turn traffic lights on and off, compute mathematical functions, or keep trace of guidance system.
This system may be simple or sophisticated, depending on its applications. The MPU applications
are classified primarily in two categories: reprogrammable systems and embedded systems.

Reprogrammable system:
- In this microprocessor is used for computing and data processing.
- Capable of handing large data, storage devices such as disks and CD Rom and peripherals devices
such as printers. E.g. microcomputer
Embedded system:
- In this case microprocessor is a part of final product and is not available for reprogramming to end
uses.
- E.g. washing machine, traffic light controller, Automatic testing machine.
The microprocessor unit consists of the following parts:
ALU: This area of microprocessor performs various functions on data. The ALU performs arithmetic
operation like addition subtraction and logical operation like And, OR, X-OR.
Register array: This area of microprocessor consists of various register identified by B, C, D,E, H, L.
These register are used to temporary store the data during the execution of a program.
Control Unit: This area provides the timing and control signal to all the operations in the
microcomputer. It contains the flow of data between the microprocessor memory and peripheral.

1.4 Microcontroller and Microcomputer:

MICRO CONTROLLER
 Single-chip Microcomputers are also known as Microcontrollers.
 They are used primarily to perform dedicated functions.
 They are used primarily to perform dedicated functions or as slaves in distributed processing.

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 Generally they include all the essential elements of a computer on a single chip: MPU, R/W
memory, ROM and I/O lines.
 Typical examples of the single-chip microcomputers are the Intel 8051, AT89C51, AT89C52 and
Zilog Z8.
 Most of the micro controllers have an 8-bit word size, at least 64 bytes of R/W memory, and 1K
byte of ROM
 I/O lines varies from 16 to 40

Difference between Microprocessors and Microcontrollers

Although both microprocessor and microcontrollers have been designed for real time applications
and they share many common features, they have significant differences which are as follows:
Microprocessors Microcontrollers
1. Microprocessor is a silicon chip which 1. Microcontroller is a silicon chip which
includes ALU, register circuit and control includes microprocessor, memory and I/O in
circuits. a single package.
2. The general block diagram to show 2. The general block diagram of microcontroller
microprocessor is as shown below: is as shown below:

3. Normally used for general purpose 3. Normally microcontrollers are used

computers as CPU. for specific purposes (embedded
system) e.g. traffic light controller,
printer, etc.
4. The performance speed, i.e. clock speed of 4. The performance speed of microcontroller is
microprocessor is higher ranging frequency relatively slower than that of
from MHz to GHz. microprocessors, with clock speed from 3-
33MHz.
5. Addition of external RAM, ROM and I/O 5. Has fixed memory and all peripherals are
ports makes these systems bulkier and embedded together on a single chip, so are
much more expensive. not bulkier and are cheaper than
microprocessors.
6. Microprocessors are more versatile than 6. As microcontrollers have already fixed
microcontrollers as the designers can amount of RAM, ROM and I/O ports, so are
decide on the amount of RAM, ROM and not versatile as the user cannot change the
I/O ports needed to fit the task at hand. E.g. amount of memory and I/O ports. E.gs.
Intel 8085, 8086, Motorola 68000, Intel AT89C51, ATmega32, AT89S52, etc.
Core i7, etc.

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MICROCOMPUTER
As the name implies, Microcomputers are small computers. They range from small controllers that
work directly with 4-bit words to larger units that work directly with 32-bit words. Some of the more
powerful Microcomputers have all or most of the features of earlier minicomputers. Examples of
Microcomputers are Intel 8051 controller-a single board computer, IBM PC and Apple Macintosh
computer.

Memory: This consists of a mixture of ram and Rom. It may also have magnetic floppy disk, magnetic
hard disk or optical disk. Its functions are:
1. Store the binary codes for the sequences of instruction and then write a program from that
sequence of instruction for the computer.
2. Store the binary coded data with which the computer is going to work.
I/P port:The i/p section allows the computer to take in data from the outside world or send data to
the outside world. Eg keyboard, video display terminals, printers, modems, etc.
The physical devices used to interface the computer buses to external systems are called ports. Two
ports are available i/p port example keyboard, mouse. O/p port example monitor, printer.
Central processing unit: The cpu control the operation of computer. Cpu fetches binary coded
instruction from memory. Decode the instruction into a series of actions and carries out these
actions in a sequence of steps. It also contains the instruction pointer register which hold the
address of the next instruction or data item to be fetched from memory.
Address bus: The address bus consists of 16, 20, 24 or 32 parallel signal lines. On these lines the CPU
sends out the address of the memory location that is to be written to or form.
Data bus: The data bus consist of 8, 16 or 32 parallel signal lines and are bidirectional that CPU can
read data in from memory and send data out to memory on these lines. ……device in a system will
have ……out connected to the data bus but only one device at a time has its out enable.
Control bus: The control bus consists of 4-10 parallel signal lines. The CPU sends out signal on the
control bus to enable the o/p of the address memory device. Control bus signal are memory read,
write, i/p read, o/p write.

Application of Microprocessor
a) Microcomputers
b) Industrial Control
c) Robotics
d) Traffic Lights
e) Washing Machines
f) Microwave Oven
g) Security Systems

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1.5 Bus organization
Bus is a common channel through which bits from any sources can be transferred to the destination.
A typical digital computer has many registers and paths must be provided to transfer instructions
from one register to another. The number of wires will be excessive if separate lines are used
between each register and all other registers in the system. A more efficient scheme for transferring
information between registers in a multiple register configuration is a common bus system. A bus
structure consists of a set of common lines, one for each bit of a register, through which binary
information is transferred one at a time. Control signals determine which register is selected by the
bus during each particular register transfer.

ig: Bus Organization

A very easy way of constructing a common bus system is with multiplexers. The multiplexers select
the source register whose binary information is then pleased on the bus. A system bus consists of
about 50 to 100 of separate lines each assigned a particular meaning or function. Although there are
many different bus designers, on any bus, the lines can be classified into three functional groups;
data, address and control lines. In addition, there may be power distribution lines as well.
1. The data lines provide a path for moving data between system modules. These lines are
collectively called data bus.
2. The address lines are used to designate the source/destination of data on data bus.
3. The control lines are used to control the access to and the use of the data and address lines.
Because data and address lines are shared by all components, there must be a means of
controlling their use. Control signals transmit both command and timing signals indicate the
validity of data and address information. Command signals specify operations to be
performed. Control lines include memory read/write, i/o read/write, bus request/grant,
clock, reset, interrupt request/acknowledge etc.

1.6 Stored Program Concept and Von-Neumann Machine

The simplest way to organize a computer is to have one processor, register and instruction code
format with two parts op-code and address/operand. The memory address tells the control where to
find an operand in memory. This operand is read from memory and used as data to be operated on
together with the data stored in the processor register. Instructions are stored in one section of
same memory. It is called stored program concept.
The task of entering and altering the programs for ENIAC was tedious. It could be facilitated if the
program could be represented in a form suitable for storing in memory alongside the data. So the

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computer could get its instructions by reading from the memory and program could be set or altered
by setting the values of a portion of memory. This approach is known as 'stored- program concept'
was first adopted by John Von Neumann and such architecture is named as von-Neumann
architecture and shown in figure below.

Fig: Von Neumann Architecture

The main memory is used to stare both data and instructions. The arithmetic and logic unit is
capable of performing arithmetic and logical operation on binary data. The program control unit
interprets the instruction in memory and causes them to be executed. The I/O unit gets operated
from the control unit.
The Von–Neumann architecture is the fundamental basis for the architecture of modern digital
computers. It consisted of 1000 storage locations which can hold words of 40 binary digits and both
instructions as well as data are stored in it. The storage location of control unit and ALU are called
registers and the various models of registers are:
MAR – memory address register – contains the address in memory of the word to be written into or
read from MBR.
MBR – memory buffer register – consists of a word to be stored in or received from memory.
IR – instruction register – contains the 8-bit op-code instruction to be executed.
IBR – instruction buffer register – used to temporarily hold the instruction from a word in memory.
PC - program counter - contains the address of the next instruction to be fetched from memory.
AC & MQ (Accumulator and Multiplier Quotient) - holds the operands and results of ALU after
processing.

1.7 Processing cycle of a stored program computer

 Fetch
 Identify
 Fetch Data
 Process
 Write Back

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Chapter 2: Intel 8085 Microprocessor
2.1 Internal Architecture and Description of 8085

Intel 8085 is a 8 bit general purpose microprocessor capable of addressing up to 64kB of memory. It
is a 40 pin ic package fabricated on a single LSI using an NMOS technology. Its clock speed is about 3
MHZ and uses a single 5v DC supply. The internal structure of 8085 is shown in figure. It consists of
three main sections.
1. Register array.
2. Arithmetic and logic unit.
3. Timing and control unit.
Register array: The 8085 has both 8 bit and 16 bit registers. It has 8 addressable 8 bit registers and
three 16 bit registers. These registers can be classified as:
a) General purpose register b) Special purpose register

a. General purpose register: The 8085 has 6 general purpose registers to store 8 bit data during
program execution. B,C, D ,E, H, L are 8 bit registers and can be used singly or 16 bit register pairs BC,
DE, HL. When used in register pairs, the high order byte resides in the 1st register that is B when BC
is as register pair and low order byte in second (i.e, c when BC is used). The register pair HL besides
it’s possible use as to independent registers functions as a data pointer. It can hold memory
addresses that are referred to in a number of instructions which use register indirect addressing.
b. Special purpose register:
Accumulator: It is a 8 bit register used in arithmetic logic load and store operations as well in input
output instructions.
Flag Register: It is 8 bit register in which the bits carry significant information in the form of flags.
S- Sing Flag

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Z- zero flag
AC- Auxiliary carry flag
D- Parity flag
CY- Carry flag

Temporary register: It is 8 bit register not accessible to the programmer while executing the
instruction. The 8085 places the date into temporary register for a brief period.
Program counter: The program counter acts as a pointer to the next instruction to be executed and
always contains 16 bit address of the memory location of the next instruction.
The program counter is updated by the processor and points to the next instruction after the
processor has fetched the instruction.

Stack pointer: The stack is an area of read write memory in which temporary information is stored in
first in last out basis. The stack pointer holds the address of last byte written on to the stack.
Instruction register and decoder: These are not accessible to the programmer after fetching an
instruction from memory the processor load it in the instruction register. This instruction is decoded
by the decoder and the sequence of events is established for the execution of instruction.

Arithmetic and logic unit: The ALU performs the computing function. It includes the accumulator,
the temporary register, arithmetic and logic circuits and the flag register. The temporary register is
used to store hold data during an arithmetic/ logic operation. The result is stored in the accumulator
and the flags are set or cleared according to the result of operation.

Timing and control unit: This unit synchronizes all the microprocessor operations with the clock. The
clock is symmetrical square wave signal that drives the cpu. The control circuitry and all the
operation are driven by the clock signals.

Interrupt: The 8085 has 5 interrupt signals that can be used to interrupt a program execution. The
various interrupt signals are, INTR, RST 5.5, RST 6.5, RST 7.5, TRAP.
Serial I/p port: The 8085 has two signals to implement the serial transmission SID and SOD. These
two signals are used to transmitting the data serially.

Data and address bus: The 8085 has 8 bit data bus and hence 8 bit of data can be transmitted
parallel from and to a microprocessor. The 8085 has 16 bit address bus as memory addresses are of
16 bit.
- The 8 bit significant bits of the address are transmitted by AD bus. The AD bus transmits the data
and address at different moments. At a particular moment it transfers either data or address.
- The 8 most significant bit of the address are transmitted by address bus A bus.
- First of all the 16 bit data is transmitted by the microprocessor MSB on the A bus and 8 LSB on the
AD bus. Thus the effective 16 bit bus is used for 16 bit address. Then data is transfer via AD bus.

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8085 Microprocessor unit pin details:

Intel 8085 contains 40 pins as shown in figure which has

- 8 unidirectional address pins (A8 to A15)
- 8 bidirectional multiplexed address/data pins (AD0 to AD7)
- 11 control output pins
- 11 control input pins.
- Two power supply pins +5v and ground.
- A8 – A15 (pin 21 – 28) output
- The work of carrying the 8 MSB of the address data.
AD0 – AD7:
- [pins 12 – 19 ] I/O
- It carries both data and address.
- It carries lower address bits as well as it can be used as data bus as it can be used as data bus.
- Carries data of 8 bit.

ALE (Address latch enable):

- Pin 30, output pin
- It goes high during first clock cycle of a machine cycle.
- When high, AD0 – AD7 is used as address bus.

IO/M :
- pin 34, o/p pin
- Distinguishes whether the address is for memory or I/O
- When high the operation is performed between I/O and µP
- When low the operation is performed between memory and µp.
S0 , S1 :
- Pin 29, 33, o/p pin
- These are status signals which indicates the type of operation performed.
S0 S1 Operation
0 0 HALT
0 1 READ

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 1 0 WRITE
1 1 FETCH (bring information From the Memory to µP)

RD:
- Pin 32, o/p pin
- Controls READ operation.
- When it goes low, the selected memory or I/O device is read.
WR :
- Pin 31, o/p pin
- A low indicates a write operation being performed into the selected memory or I/P device.

READY:
- Pin 35, i/p pin
- It is used to sense whether a peripheral is ready to transfer data or not.
- If READY is high, the peripheral is ready.
- It is low, the µp waits till it goes high.

HOLD ( when high):

- pin 39, i/p pin
- It indicates another device is requesting the use of buses. Having received a HOLD request the µP
stops the use of the buses as soon as the current instruction is completed. The processor regains the
bus after the removal of the HOLD signal.

HLDA:
- Pin 38, 0/p pin.
- A signal for HOLD ack.
- It indicates that the HOLD request has been received.
- After the removal of a HOLD request the HLDA goes low.

INTR:
- pin 10 , input pin
- It is an interrupt request signal.
- When it goes high the program counter does not increment its content. The µP suspects its normal
sequence of instruction at hand it goes to the CALL instruction.

INTA:
- pin 11, o/p
- The µP sends as interrupt ack after INTR is received.

RST 5.5, RST 6.5, RST 7.5 & TRAP:

- Pin 9,8 , 7 & 6, input pin
- These are interrupt signals.
- When interrupt is recognized, the next instruction is executed from a fixed location.
- RST 7.5, 6.5, 5.5 are ……..interrupt.

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 RESET IN:
- pin 36, input pin.
- When signal on this pin is low, the µP is reset.

RESET OUT:
- pin 3, output pin.
- This signal indicates that µP is being reset.
- This signal can be used to reset other devices.

X1, X2 :
- Pin 1, 2 , i/p pin.
- These are terminals to connect to an external crystal oscillator which drives on internal circuitry of
the µP to produce a suitable clock for the operation of µP.

LK:
- pin 37, output pin.
- It is a clock output for user which can be used for other digital ICs
- Its frequency is same at which processor operates.

SID:
- pin 5, input pin.
- It is a data line for serial i/p.
- The SID signal can be used to i/p the SID pin to the most significant bit of the accumulator.

SOD:
- Pin 4, o/p pin.
- It is a data line for serial o/p.
- It can be used to o/p the most significant bit of the accumulator.

VCC:
- pin 40, input pin.
- +5v dc supply.

vss:
- Pin 20, input pin.
- Ground.

Microprocessor instruction:
Register transfer language (RTL): The internal network organization of a digital computer is defined
by specifying.
- The set of register it contains and their functions.
- The sequence of micro operation performed on the binary information stored in the registers.
- The control that initiates the sequence of micro operation.
The symbolic notation used to describe the micro operation transfer among register is called register
transfer language.

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2.2 Instruction Set
a) Data Transfer Instructions
b) Arithmetic Instructions
c) Logical Instructions
d) Rotate Instructions
e) Branching Instructions
f) Control Instructions

a) Data Transfer Instructions

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b) Arithmetic Instructions

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17
c) Logical Instructions

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d) Rotate Instructions

e) Branching Instructions

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f) Control Instructions

2.3 Addressing Modes

The 8085 microprocessor has several addressing modes that are used to access memory locations.
Some of the most commonly used addressing modes in the 8085 microprocessor are:
a) Immediate Addressing Mode: In immediate addressing mode the source operand is always
data. If the data is 8-bit, then the instruction will be of 2 bytes, if the data is of 16-bit then
the instruction will be of 3 bytes.
Examples:
MVI B 45 (move the data 45H immediately to register B)
LXI H 3050 (load the H-L pair with the operand 3050H immediately)
JMP address (jump to the operand address immediately)
b) Register Addressing Mode: In register addressing mode, the data to be operated is available
inside the register(s) and register(s) is(are) operands. Therefore the operation is performed
within various registers of the microprocessor.
Examples:
MOV A, B (move the contents of register B to register A)
ADD B (add contents of registers A and B and store the result in register A)
INR A (increment the contents of register A by one)
c) Direct Addressing Mode: In direct addressing mode, the data to be operated is available
inside a memory location and that memory location is directly specified as an operand. The
operand is directly available in the instruction itself.
Examples:
LDA 2050 (load the contents of memory location into accumulator A)
LHLD address (load contents of 16-bit memory location into H-L register pair)
IN 35 (read the data from port whose address is 35)
d) Register Indirect Addressing Mode: In register indirect addressing mode, the data to be
operated is available inside a memory location and that memory location is indirectly
specified by a register pair.
Examples:
MOV A, M (move the contents of the memory location pointed by the H-L pair to the
accumulator)
LDAX B(move contents of B-C register to the accumulator)
STAX B (store accumulator contents in memory pointed by register pair B-C)
e) Implied/Implicit Addressing Mode: In implied/implicit addressing mode the operand is
hidden and the data to be operated is available in the instruction itself.
Examples:
CMA (finds and stores the 1’s complement of the contents of accumulator A in A)
RRC (rotate accumulator A right by one bit)

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 RLC (rotate accumulator A left by one bit)
f) Relative Addressing Mode:
In this mode, the operand is a memory location specified by the contents of the program
counter plus a constant value.
example:
MOVR0,#05H
AGAIN:
MVIA,#55H
ADDA,R0
JMP AGAIN

Features of the addressing modes in the 8085 microprocessor:

1. Immediate addressing: In immediate addressing mode, the operand is a constant value that is
part of the instruction. The immediate addressing mode is used for instructions that require a
fixed value, such as loading a constant value into a register.
2. Direct addressing: In direct addressing mode, the operand is a memory address specified
directly in the instruction. The direct addressing mode is used for instructions that access data
stored in memory.
3. Indirect addressing: In indirect addressing mode, the operand is a memory address specified
indirectly by a register or memory location. The indirect addressing mode is used for
instructions that access data stored in memory, where the memory address is not known in
advance.
4. Register addressing: In register addressing mode, the operand is stored in one of the
processor registers. The register addressing mode is used for instructions that manipulate the
contents of the registers.
5. Indexed addressing: In indexed addressing mode, the operand is obtained by adding an offset
value to a base address stored in a register. The indexed addressing mode is used for
instructions that access data stored in memory using a computed address.
6. Relative addressing: In relative addressing mode, the operand is specified as an offset relative
to the current program counter value. The relative addressing mode is used for instructions
that perform conditional branching or looping.
7. Memory-mapped I/O addressing: In memory-mapped I/O addressing mode, the processor
accesses input/output devices using memory addresses instead of specialized I/O instructions.
Memory-mapped I/O addressing mode is used for interfacing with peripherals such as displays,
keyboards, and printers.

Advantages of Addressing Modes in 8085 Microprocessor:

1. Versatility: The 8085 microprocessor supports several addressing modes, which allows for a
wide range of memory access and manipulation options.
2. Efficient memory usage: Different addressing modes allow for efficient use of memory,
reducing the memory footprint of programs and making the best use of available memory.
3. Easy to use: The addressing modes are easy to use, making it simple for programmers to write
and execute complex programs.
4. Improved performance: The use of different addressing modes can improve the performance
of programs, as the correct addressing mode can be chosen to match the specific requirements
of the program.

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2.4 Instruction Cycle, Machine Cycle, t-states
1. Machine Cycle:
A machine cycle is the basic operational cycle of a microprocessor. It consists of a sequence
of operations that the CPU performs to execute an instruction. In the case of the 8085
microprocessor, the machine cycle is composed of three to six T-states (timing states).
2. Instruction Cycle:
The instruction cycle is the sequence of events that takes place when the processor executes
a single instruction. It comprises fetching the instruction, decoding it, executing it, and then
storing the result if necessary. The instruction cycle involves multiple machine cycles
depending on the complexity of the instruction being executed.
3. Timing States (t-states):
T-states refer to the timing states or clock cycles within a machine cycle. Each machine cycle
is broken down into a specific number of t-states. In the case of the 8085 microprocessor, it
typically requires a minimum of three t-states to execute an instruction. The 8085
microprocessor operates at a basic clock frequency, and each instruction execution involves
a certain number of clock cycles or t-states.
The 8085 microprocessor commonly operates at a clock frequency of 3 MHz (3,000,000 cycles per
second). Therefore, the duration of each clock cycle or t-state at this frequency is 13 MHz3 MHz1 or
approximately 0.33 microseconds.
The different machine cycles in the 8085 microprocessor include:
 Opcode Fetch Cycle: Involves fetching the opcode (operation code) of the instruction from
memory.
 Memory Read Cycle: When data is read from memory.
 Memory Write Cycle: When data is written to memory.
 I/O Read Cycle: Reading data from an input port.
 I/O Write Cycle: Writing data to an output port.
The actual number of t-states required for each of these cycles can vary depending on the specific
instruction being executed and the memory or I/O operations performed.

2.5 Timing Diagram

Creating a complete timing diagram for the 8085 microprocessor involves illustrating the various
signal lines and their timing relationships during the execution of machine cycles and instructions.
Since it's not possible to draw a timing diagram here, I can describe the components and signals
involved in a typical timing diagram for the 8085 microprocessor:
1. Clock Signal (CLK):
The clock signal determines the timing and synchronization of all operations within the
microprocessor. It generates the basic timing for the execution of instructions and machine
cycles.
2. Address Bus (AD0-AD15):
The address bus carries the memory address from the microprocessor to the memory or I/O
devices. It is a collection of lines (AD0 to AD15) that specify the address being accessed.
3. Data Bus (D0-D7):
The data bus carries data between the microprocessor and memory or I/O devices. It
consists of lines (D0 to D7) used for bidirectional data transfer.
4. Control Signals:

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  RD (Read) and WR (Write) signals: Indicate whether the microprocessor is
performing a read or write operation.
 ALE (Address Latch Enable): It is used to latch the address onto the address bus.
 IO/M (Input/Output and Memory): Differentiates between memory and I/O
operations.
 MREQ (Memory Request) and IORQ (Input/Output Request): Indicate the type of
request the microprocessor is making (either memory or I/O).
 SYNC: It synchronizes internal operations with the clock signal.
5. Status Signals:
 S0, S1, S2: Status signals indicating the current machine cycle state.
 HLT (Halt): When this signal is activated, the processor halts its operations.
 INTA (Interrupt Acknowledge): Acknowledgment signal for interrupt requests.
6. Memory Read and Write Cycles:
 Timing diagrams show the sequence of signals during memory read and write cycles,
indicating when the address and data are placed on the bus, when the read or write
operation occurs, and when the bus becomes inactive.
A timing diagram visually represents these signals over time, showing their transitions, active and
inactive states, and their relationships with the clock signal.
Opcode fetch machine cycle
The opcode fetch machine cycle (OFMC) involves the fetching of the opcode of the instruction to be
executed and the decoding process of that opcode. Usually, it consists of four T states. The timing
diagram of a typical OFMC is explained below.

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Memory read machine cycle
Contents from a memory location are read during the memory read machine cycle (MRMC). This
cycle is also known as the operand fetch machine cycle. But there are cases when MRMC is not used
for operand fetch but for reading data at given memory location. This machine cycle spans over
three T states. Each of these T states is explained here along with a timing diagram. The first three T
states are almost the same as the first three T states of Opcode Fetch Machine Cycle.

Memory write machine cycle

Contents are written to a memory location/stack during a memory write machine cycle (MWMC).
This machine cycle spans over three T states. Each of these T states are explained here along with
the timing diagram. PC is not incremented in this machine cycle. This is very similar to MRMC, except
a few differences.

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IO read machine cycle
Contents from an IO device are read during IO read machine cycle (IORMC). This machine cycle
spans three T states and is similar to MRMC except for the IO/M signal. The destination of this read
operation is the accumulator. The Program Counter is not incremented here. IO/M goes high instead
of going low, indicating that the microprocessor is talking to an IO device. Each of these T states are
explained here along with a timing diagram.

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IO write machine cycle
Contents are written to an IO device during IO write machine cycle (IOWMC). This machine cycle
spans three T states and is similar to MWMC except for the IO/M signal. IO/M goes high instead of
going low, indicating that the microprocessor is talking to an IO device. The contents of the
accumulator are transferred to the data bus and written to an output device in this cycle. The T
states are explained here along with a timing diagram for your reference.

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8086 MICROPROCESSOR
INTERNAL ARCHITECTURE OF 8086

- The 8086 CPU is divided into two independent functional parts : BIU (Bus Interface
Unit) and EU (Execution Unit)
- Dividing the work between these units speed up the processing.

A. THE EXECUTION UNIT (EU)

 The EU of the 8086 tells the BIU where to fetch the instructions and data from, decodes
instructions and executes instructions.
 The EU has a 16 bit ALU which can add subtract, ND, OR, increment, decrement,
complement or shift binary numbers.

1. GENERAL PURPOSE REGISTERS

The EU has eight general purpose registers, labeled AH, AL, BH, BL, CH, CL, DH and DL.
 These registers can be used individually for temporary storage of 8 bit data.
 The AL register is also called accumulator

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  It has some features that the other general purpose registers do not have.
 Certain pairs of these general purpose registers can be used together to store 16 bit words.
 The acceptable register pairs are AH and AL,BH and BL,CH and CL,DH and DL
 The AH-AL pair is referred to as the AX register, the BH-BL pair is referred to as the BX
register, the CH-CL pair is referred to as the CX register, and the DH-DL pair is referred to as
the DX register.
AX = Accumulator Register
BX = Base Register
CX = Count Register
DX = Data Register

2. FLAG REGISTER
 A Flag is a flip-flop which indicates some condition produced by the execution of an
instruction or controls certain operations of the EU.
 A 16 bit flag register in the EU contains 9 active flags.
 Figure below show shows the location of the nine flags in the flag register.

Figure: 8086 Flag Register Format

U = UNDEFINED
CONDITIONAL FLAGS
CF = CARRY FLAG [Set by Carry out of MSB]
PF = PARITY FLAG [Set if Result has even parity]
AF= AUXILIARY CARRY FLAG FOR BCD
ZF = ZERO FLAG [Set if Result is 0]
SF = SIGN FLAG [MSB of Result]
OF = OVERFLOW FLAG

CONTROL FLAG
TF = SINGLE STEP TRAP FLAG
IF = INTERRUPT ENABLE FLAG
DF = STRING DIRECTION FLAG

 The six conditional flags in this group are the CF,PF,AF,ZF,SF and OF
 The three remaining flags in the Flag Register are used to control certain operations of the
processor.
 The six conditional flags are set or reset by the EU on the basis of the result of some
arithmetic or logic operation.
 The Control Flags are deliberately set or reset with specific instructions you put in your
program.
 The three control flags are the TF, IF and DF.
 Trap Flag is used for single stepping through a program.
 The Interrupt Flag is used to allow or prohibit the interruption of a program.

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  The Direction Flag is used with string instructions.

3. POINTER REGISTERS
 The 16 bit Pointer Registers are IP,SP and BP respectively
 SP and BP are located in EU whereas IP is located in BIU
a) STACK POINTER (SP): The 16 bit SP Register provides an offset value, which when associated
with the SS register (SS:SP)
b) BASE POINTER (BP): The 16 bit BP facilitates referencing parameters, which are data and
addresses that a program passes via the stack. The processor combines the addresses in SS
with the offset in BP. BP can also be combined with DI and SI as a base register for special
addressing.
4. INDEX REGISTERS
 The 16 bit Index Registers are SI and DI
a) SOURCE INDEX (SI) REGISTER
- The 16 bit Source Index Register is required for some string handling operations
- SI is associated with the DS Register.

b) DESTINATION INDEX (DI) REGISTER

- The 16 bit Destination Index Register is also required for some string operations.
- In this context, DI is associated with the ES register.
B. THE BUS INTERFACE UNIT
 The BIU send out address, fetches instructions from memory, reads data from ports and
memory, and writes data to ports and memory.
 In other words BIU handles all transfers of data and addresses on the buses for the
execution unit.
1. SEGMENT REGISTERS
a) CODE SEGMENT REGISTER (CS)
- It contains the starting address of a program's code segment.
- This segment address plus an offset value in the IP register indicates the address of
an instruction to be fetched for execution
- For normal programming purpose, you need not directly reference this register.
b) DATA SEGMENT REGISTER (DS)
- It contains the starting address of a program's data segment
- Instruction uses this address to locate data.
- This address plus an offset value in an instruction causes a reference to a specific
byte location in the data segment.
c) STACK SEGMENT REGISTER (SS)
- Permits the implementation of a stack in memory
- It stores the starting address of a program's stack segment the SS register.
- This segment address plus an offset value in the Stack Pointer (SP) register indicates
the current word in the stack being addressed.
d) EXTRA SEGMENT REGISTER (ES)
- It is used by some string operations to handle memory addressing.
- ES Register is associated with the DI Register.

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