ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

JNTUA College Code: 2U

GEETHANJALI INSTITUTE OF SCIENCE & TECHNOLOGY

Unit of USHODAYA EDUCATIONAL SOCIETY
(Approved by AICTE, New Delhi & Permanently Affiliated to JNTUA, Anantapur)
(Accredited by NAAC with “A” Grade)
An ISO 9001:2015 certified Institution: Recognized under Sec. 2(f) of UGC Act, 1956
3rd Mile, Bombay Highway, Gangavaram (V), Kovur(M), SPSR Nellore (Dt), Andhra Pradesh, India- 524137

Ph. No. 08622-212769, E-Mail: [email protected], Website: www.gist.edu.in

DEPARTMENT OF
Electronics & Communication Engineering
ELECTRONIC CIRCUIT ANALYSIS LABORATORY
OBSERVATION

Name of the student : ____________________________________________________

Roll no : ____________________________________________________
Year/ Sem : ____________________________________________________
Branch : ____________________________________________________

No. of Experiments Conducted: No. of Experiments Performed:

Lab In charge

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

ABOUT THE DEPARTMENT:

Department of Electronics and Communication Engineering

The Department of Electronics and Communication Engineering (ECE) was established in the
year 2008 and offers an under graduate program in Electronics and Communication Engineering, with
an initial intake of 60, and progressively increased to 180 by the year 2012. To accomplish the
mission and vision of the Department, it has adequate infrastructural support with well-equipped
laboratories and Licensed software’s comprises Xilinx, Code Composer Studio, SCILAB, LABTEK,
MASM etc., .
The Department aims at imparting the students with the latest technologies through NPTEL
online resources, Webinars by Texas Instruments, Spoken tutorials, SWAYAM and FOSSEE by IIT
Bombay, Lab VIEW in association with National Instruments (NI), Workshops and internships in
association with Andhra Pradesh State Skill Development Corporation (APSSDC) etc.,
The Department also employs training programmes such as ‘College to Corporate' (C2C)
Program by IIT Bombay and supports to build skills of entrepreneurship through International
Institute of Entrepreneurship (i2E) .The Department of ECE has membership in professional societies
like IEEE and IETE.
Adequate encouragement and technical scaffolding are extended to the students to participate
and excel in the national Level challenges organized by National Instruments, Texas Instruments,
TerrasicInc, DST, Intel, AICTE, IIT Bombay and the like. The department organizes industrial visits
to the apparent organizations as NARL (National Atmospheric Research Laboratory), Shatish Dawn
Space Centre (SDSC SHAR), to make students aware with Industry Practices and acquaint with
Newer Technologies.
The department of ECE bagged gold medal from JNTU Anantapur, Anantapuramu for
securing highest percentage of marks in the University examinations for the batch 2013-17.
Endowed with a cluster of well qualified, proficient and highly stimulating faculty adopting
some of the best academic practices like Smart Classrooms and ICT methods. The regular Faculty
Development programmes (FDP) through NMEICT, Workshops and Conferences help them to update
their skill set and to publish their work in conferences and reputed national and international journals.

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

VISION OF THE DEPARTMENT:

Achieving academic excellence in Electronics and Communication Engineering by shaping next-

generation technocrats keeping pace with socio-economic needs.

MISSION OF THE DEPARTMENT:

M1: Adopting outcome oriented teaching -learning processes to provide comprehensive knowledge
in the application of Electronics and Communication Engineering principles.

M2: Striving for implementation of advanced technology to cater to industrial demands and
societal concerns.

M3: Producing highly skilled and responsible professionals with robust ethical values.

M4: Integrating technical capabilities, life skills and entrepreneurship abilities to produce
dynamic contributors to social advancement.

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

GEETHANJALI INSTITUTE OF SCIENCE & TECHNOLOGY :: NELLORE

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

ELECTRONIC CIRCUITS ANALYSIS LAB

Course Code L:T:P Credits Exam. Exam Duration Course Type
Marks
23A0410P 0:0:3 1.5 CIE:30 3 Hours PCC
SEE:70
Syllabus
List of Experiments:
1. Design and Analysis of Darlington pair.
2. Frequency response of CE – CC multistage Amplifier
3. Design and Analysis of Cascode Amplifier.
4. Frequency Response of Differential Amplifier
5. Design and Analysis of Series – Series feedback amplifier and find the frequency response
of it.
6. Design and Analysis of Series – Shunt feedback amplifier and find the frequency response
of it.
7. Design and Analysis of Shunt – Series feedback amplifier and find the frequency response
of it.
8. Design and Analysis of Shunt – Shunt feedback amplifier and find the frequency response of it.
9. Design and Analysis of Class A power amplifier
10. Design and Analysis of Class AB amplifier
11. Design and Analysis of RC phase shift oscillator
12. Design and Analysis of LC Oscillator
13. Frequency Response of Single Tuned amplifier

Note: At least 10 experiments shall be performed. Both BJT and MOSFET based circuits shall be
implemented.
Faculty members who are handling the laboratory shall see that students are given design
specifications for a given circuit appropriately and monitor the design and analysis aspects of the
circuit.
Course Outcomes:
After the completion of the course students will be able to:
CO1: Know about the usage of equipment/components/software tools used to conduct experiments in
analog circuits. (L2)
CO2: Conduct the experiment based on the knowledge acquired in the theory about various analog
circuits using BJT/MOSFETs to find the important parameters of the circuit experimentally. (L3)
CO3: Analyze the given analog circuit to find required important metrics of it theoretically. (L4)
CO4: Compare the experimental results with that of theoretical ones and infer the conclusions. (L4)
CO5: Design the circuit for the given specifications. (L6)

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

PART A: List of Experiments :( Minimum of Ten Experiments to be performed)

1. Design and Analysis of Darlington pair.

2. Frequency response of CE – CC multistage Amplifier

3. Design and Analysis of Cascode Amplifier.

4. Frequency Response of Differential Amplifier

5. Design and Analysis of Series – Series feedback amplifier and find the frequency response of it.

6. Design and Analysis of Series – Shunt feedback amplifier and find the frequency response of it.

7. Design and Analysis of Shunt – Series feedback amplifier and find the frequency response of it.

8. Design and Analysis of Shunt – Shunt feedback amplifier and find the frequency response of it.

9. Design and Analysis of Class A power amplifier

10. Design and Analysis of Class AB amplifier

11. Design and Analysis of RC phase shift oscillator

12. Design and Analysis of LC Oscillator

13. Frequency Response of Single Tuned amplifier

Experiments beyond curriculum: (minimum Two)

1. Series Voltage Regulator

2. Crystal Oscillator

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

INDEX

Signature
S.No Name of the experiment Date Page No. Marks

2
3

10

11

12

13

14

15

Lab In charge

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Fig 1.1: Circuit Diagram of Darlington Amplifier

Fig 1.2: Frequency response of Darlington Amplifier

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Expt. No: 1
DARLINGTON AMPLIFIER
Date:

AIM: To design the frequency response of Darlington amplifier.

APPARATUS:
1. Power supply (0-30V) – 1No
2. C. R. O – 1No
3. Function Generator – 1 No
4. Transistor BC107BP – 2 No
5. Resistor 680Ω – 1 No
10kΩ – 1 No
15kΩ – 1 No
6kΩ – 1 No
6. Capacitors 10 μF – 1 No
7. Bread Board – 1 No
8. Connecting Wires
9. C.R.O Probes

THEORY:

In electronics, a multi-transistor configuration called the Darlington configuration

(commonly called a Darlington pair) is a compound structure of a particular design made by
two bipolar transistors connected in such a way that the current amplified by the first
transistor is amplified further by the second one. This configuration gives a much higher
current gain than each transistor taken separately.

Two transistors are paired to form a Darlington transistor pair. The main principle behind this
pair is to connect 2 or 3 transistors with the emitter of one transistor connected to the base of
the other, and all these transistors will share the same collector. The same circuit can be
modified using a single chip where the two transistors will be connected in Darlington style.
A Many such pairs can also be integrated in one chip and can be used for high end
applications in audio circuits, power supply circuits, TV & display drivers, and so on.
TheDarlingtonpairisalsoadvantageousinthecaseofit’sbaseemittervoltage, which is high when
compared to the value of a single transistor. The circuit may show a higher voltage between
the input base and output emitter voltage when compared to a single transistor. As two or
more than two emitter junctions are available, the turn ON voltage for the whole pair is twice
compared to just one transistor.
Thefrequencyresponseofthepairisverylowbecausethebasecurrentfortheoutput transistor can’t
be shut off at once. Thus the pair can be used only in low frequency applications.

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

OBSERVATIONS:

Input Voltage given Vin:

S.No Frequency Output Voltage Voltage Gain Gain(db)

(Hz) Vo2 (mv) Av = Vo2/ Vi 20log10|Av|

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

PROCEDURE:

1. Make the connection as per the circuit diagram.

2. A sinusoidal signal of 1 KHz frequency and 20mV peak-to-peak is applied at the
input of amplifier.
3. Output is taken at collector and gain is calculated by using the expression,
Av=V0/Vi
4. Voltage gain in dB is calculated by using the expression,
Av=20log 10(V0/Vi)
5. Repeat the above steps for different frequencies.
6. For plotting the frequency response, the input voltage is kept Constant at 20mV peak-
to peak and the frequency is varied from 10Hz to 1MHz using AC Voltage Source.
7. The Bandwidth of the amplifier is calculated from the graph using the
expression,
Bandwidth BW=f2-f1 =
Where f1 is lower 3 dB frequency =
f2 is upper 3 dB frequency =

PRECAUTIONS:

1. All the connections are to be connected properly.

2. Transistor terminals must be identified properly

RESULT:

VIVA QUESTIONS:

1. What is a Darlington pair?

2. What is the advantage of Darlington configuration?
3. Give few applications of Darlington amplifier
4. Why does amplifier gain reduce at high frequencies?
5. State the types of distortions in amplifier

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Fig 2.1: Circuit Diagram of CE-CC Multi stage amplifier

Fig 2.2: Frequency response of CE-CC Multi stage amplifier

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Expt. No: 2
CE-CC MULTISTAGE AMPLIFIER
Date:

AIM: To design the frequency response of CE-CC Multi stage amplifier.

APPARATUS:
1. Power supply (0-30V) – 1No
2. C. R. O – 1No
3. Function Generator – 1 No
4. Transistor BC107BP – 2 No
5. Resistor 250Ω – 1 No
2.2kΩ – 1 No
10kΩ – 1 No
1.5kΩ – 1 No
47kΩ – 2 No
3.3kΩ – 2 No
6. Capacitors 10 μF – 3 No
1 μF – 1 No
7. Bread Board – 1 No
8. Connecting Wires
9. C.R.O Probes

THEORY:

In practical applications, the output of a single state amplifier is usually insufficient, though

it is a voltage or power amplifier. Hence they are replaced by Multi-stage transistor amplifiers. In

Multi-stage amplifiers, the output of first stage is coupled to the input of next stage using a

coupling device. These coupling devices can usually be a capacitor or a transformer. This process

of joining two amplifier stages using a coupling device can be called as Cascading.

But in this CE-CC multistage amplifier is used to match the impedance matching

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

OBSERVATIONS:

Input Voltage given Vin:

S.No Frequency Output Voltage Voltage Gain Gain(db)

(Hz) Vo2 (mv) Av = Vo2/ Vi 20log10|Av|

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

PROCEDURE:

1. Make the connection as per the circuit diagram.

2. A sinusoidal signal of 1 KHz frequency and 20mV peak-to-peak is applied at the
input of amplifier.
3. Output is taken at collector and gain is calculated by using the expression,
Av=V0/Vi
4. Voltage gain in dB is calculated by using the expression,
Av=20log 10(V0/Vi)
5. Repeat the above steps for different frequencies.
6. For plotting the frequency response, the input voltage is kept Constant at 20mV peak-
to peak and the frequency is varied from 10Hz to 1MHz using AC Voltage Source.
7. The Bandwidth of the amplifier is calculated from the graph using the
expression,
Bandwidth BW=f2-f1 =
Where f1 is lower 3 dB frequency =
f2 is upper 3 dB frequency =

PRECAUTIONS:

1. All the connections are to be connected properly.

2. Transistor terminals must be identified properly

RESULT:

VIVA QUESTIONS:

1. What is the need of Need for multistage amplifiers?

2. What are the different coupling schemes?
3. Give few Applications of CE-CC Amplifiers?
4. Mention the Characteristics of CE-CC Amplifiers.
5. What is Band Width?

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Circuit Diagram:

Fig 3.1: Circuit of CE-CB Cascade Amplifier

Frequency Response:

Fig 3.2: Frequency response CE-CB Cascade Amplifier

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Expt. No: 3
CE-CB CASCODE AMPLIFIER
Date:

AIM: To design the frequency response of CE-CB Cascode amplifier.

APPARATUS:
1. Power supply (0-30V) – 1No
2. C. R. O – 1No
3. Function Generator – 1 No
4. Transistor BC107BP – 2 No
5. Resistor 1kΩ – 1 No
10kΩ – 2 No
100kΩ – 1 No
200kΩ – 1 No
100Ω – 1 No
25kΩ – 1 No
6. Capacitors 10 μF – 1 No
100 μF – 1 No
7. Bread Board – 1 No
8. Connecting Wires
9. C.R.O Probes

THEORY:

A Cascode amplifier consists of a common-emitter stage loaded by the emitter of a

common base stage. While the C-B (common-base) amplifier is known for wider bandwidth
than the C-E (common-emitter) configuration, the low input impedance (10s of Ω) of C-B is
a limitation for many applications. The solution is to precede the C-B stage by a low gain C-E
stage which has moderately high input impedance (kΩs). The stages are in a cascode
configuration, stacked in series, as opposed to cascaded for a standard amplifier chain. The
cascode amplifier configuration has both wide bandwidth and moderately high input
impedance. Before the invention of the RF dual gate MOSFET, the BJT Cascode amplifier
could have been found in UHF (ultra high frequency) TV tuners. A Cascode amplifier has a
high gain, moderately high input impedance, high output impedance, and a high bandwidth.

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

OBSERVATIONS:

Input Voltage given Vin:

S.No Frequency Output Voltage Voltage Gain Gain(db)

(Hz) Vo2 (mv) Av = Vo2/ Vi 20log10|Av|

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

PROCEDURE:

1. Make the connection as per the circuit diagram.

2. A sinusoidal signal of 1 KHz frequency and 40mV peak-to-peak is applied at the input
of amplifier.
3. Output is taken at collector and gain is calculated by using the expression,
Av=V0/Vi
4. Voltage gain in dB is calculated by using the expression,
Av=20log 10(V0/Vi)
5. Repeat the above steps for different frequencies.
6. For plotting the frequency response, the input voltage is kept Constant at 40mV peak-to
peak and the frequency is varied from 10Hz to 1MHz using AC Voltage Source.
7. The Bandwidth of the amplifier is calculated from the graph using the expression,

Bandwidth BW=f2-f1 =
Where f1 is lower 3 dB frequency =
f2 is upper 3 dB frequency =

PRECAUTIONS:

1. All the connections are to be connected properly.

2. Transistor terminals must be identified properly

RESULT:

VIVA QUESTIONS:
1. Explain the basic principle involved in Bootstrap sweep generator
2. Mention the type of feedback employed in Bootstrap sweep generator
3. Mention the characteristics of the amplifier used in Bootstrap sweep generator

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

CIRCUIT DIAGRAM:

Fig 4.1: Circuit diagram of Differential Amplifier

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Expt. No: 4
DIFFRENTIAL AMPLIFIER
Date:

AIM:
To construct a differential amplifier circuit for single input balanced output in the common mode and
differential mode configuration and study the output waveform and to find Common Mode Rejection
Ratio (CMRR)

EQUIPMENTS REQUIRED:

S.NO EQUIPMENT RANGE QUANTITY

1 Transistor BC 107 2
2 Dual trace Regulated power supply (0-30)V 1
3 Resistor 10 K 2
4 Resistor 4.7 k 1
5 Function Generator (0-3)MHz 1
6 Bread Board - 1
7 Single strand Wires - -
8 CRO (0-30)MHz 1
9 CRO Probes - 4

THEORY:

The Differential amplifier amplifies the difference between two input signals. The
transistorized differential amplifier consists of two ideal emitter biased circuits. The differential
amplifier circuit is obtained by connecting the two emitter terminals E 1 and E2. Hence RE is the
parallel combination of RE1 and RE2. The output is taken between the two collector terminals C 1 and
C2.Hence we say this connection as balanced output or double ended output. It works in two modes
of operation.
Differential mode operation
In the differential mode operation two input signals (V 1 and V2) are different in magnitudes
and opposite in phase and it produces the difference between the two input signals (V 1~V2).The
differential mode gain (AD) can be calculated by AD =Rc * β / 2* hie.
Common mode operation
In the common mode operation two input signals are same in magnitude and phase. At emitter
resistance RE both the input signal appears across R E and adds together since it just acts like an
emitter follower .Therefore RE carries a signal current and provides a negative feedback. This
feedback reduces the common mode gain of the differential amplifier. The Common mode gain Ac
can be calculated by
|Ac| = Rc * β / hie + (2Re [1+
β] ) CMRR
 CMRR (Common Mode Rejection Ratio) is defined as the ratio of differential gain to

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

common mode gain.

 Ideally the CMRR should be infinity.
 CMRR = 20 log (AD / Ac)

PROCEDURE

Differential mode configuration:

1. Connections are given as per circuit diagram

2. Set Vs =50 mV, using signal generator
3. Keeping the input voltage constant vary the frequency from 50Hz to1MHz in regular steps
4. Observe both input and output on the CRO (sine wave)
5. The differential gain is calculated at mid frequency range where the magnitude of the sine
wave is maximum.
6. The differential gain is calculated by Ad = Vo / Vi

Common mode configuration:

1. Connections are given as per circuit diagram

2. Set Vs =50 mV, using signal generator
3. Keeping the input voltage constant vary the frequency from 50Hz to1MHz in regular steps
4. Observe both input and output on the CRO (sine wave)
5. The common mode gain is calculated at mid frequency range where the magnitude of the sine
wave is maximum
6. The Common mode gain is calculated by Ac = Vo / Vi

TABULATION

DIFFERENTIAL MODE:

Practical
S.NO Input Output Theoretical Differential gain
Amplitude (Vi) Amplitude (Vo) Differential (Vo / Vi)
(Volts) (Volts) gain (Ad) (Ad)

COMMON MODE:

Practical
S.NO Input Output Theoretical Differential gain
Amplitude (Vi) Amplitude (Vo) Differential (Vo / Vi)
(Volts) (Volts) gain (Ad) (Ad)

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

CMRR:

S.NO Theoretical CMRR Practical CMRR = 20 log (AD / Ac)

TO FIND Rc:

Apply KVL to collector loop

Vcc-IcRc-Vce-IeRe – Vee =0
Rc = {Vcc- Vce - VRE - Vee }/ Ic
= {12-6 -1.2 –(-12)} /2x10-3
Rc = 8.7kΩ use approx 10 kΩ
TO FIND Re:
Apply KVL to collector loop
Vcc-IcRc-Vce-IeRe – Vee =0
Re = {Vcc- VRC – Vce - Vee}/ Ie
= {12 - 4.8 – 6 – (-12)} /4x10-3
Re = 3.3 kΩ use approx 4.7kΩ

NOTE:
Vcc =12V
VRE =10% of Vcc =0.1 * 12 = 1.2 V
VRC =40% of Vcc =0.4 * 12 = 4.8 V
VCE =50% of Vcc =0.5 * 12 = 6 V Ic1 = Ic1 = 2mA

Differential gain:

AD =Rc * β / 2* hie
AD =8.7x103 * 300 / 2* 4.7
x103 AD = 265

Common mode gain:

|Ac| = Rc * β / hie + (2Re [1+ β] )

Ac = 8.7kΩ * 300 / 4.7 kΩ + (2 * 3.3 kΩ [1+ 300] )
Ac = 1.2

CMRR:
Theoretical CMRR = 20 log (AD / Ac)
= 20 log (265 / 1.2)
= 46

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

RESULT:

Differential mode :

Common mode :

CMRR :

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Fig 5.1: Voltage Series Feedback Amplifier

Fig 5.2: Frequency Response of Voltage Series Feedback Amplifier

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Expt. No: 5
VOLTAGE SERIES FEEDBACK AMPLIFIER
Date:

AIM: To design the frequency response of Voltage Series feedback amplifier.

APPARATUS:
1. Power supply (0-30V) – 1No
2. C. R. O – 1No
3. Function Generator – 1 No
4. Transistor BC107BP – 1 No
5. Resistor 1kΩ – 2 No
10kΩ – 2 No
100kΩ – 1 No
6. Capacitors 10 μF – 2 No
7. Bread Board – 1 No
8. Connecting Wires
9. C.R.O Probes

THEORY:

When any increase in the output signal results into the input in such a way as to cause
the decrease in the output signal, the amplifier is said to have negative
feedback.Theadvantagesofprovidingnegativefeedbackarethatthetransfergainof the amplifier
with feedback can be stabilized against variations in the hybrid parameters of the transistor or
the parameters of the other active devices used in the circuit. The most advantage of the
negative feedback is that by proper use of this, there is significant improvement in the
frequency response and in the linearity of the operation of the amplifier. This disadvantage of
the negative feedback is that the voltage gain is decreased. In Voltage-Series feedback, the
input impedance of the amplifier is increased and the output impedance is decreased. Noise
and distortions are reduced considerably.

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

OBSERVATIONS:

Input Voltage given Vin:

S.No Frequency Output Voltage Voltage Gain Gain(db)

(Hz) Vo2 (mv) Av = Vo2/ Vi 20log10|Av|

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

PROCEDURE:

1. Make the connection as per the circuit diagram.

2. A sinusoidal signal of 1 KHz frequency and 40mV peak-to-peak is applied at the input
of amplifier.
3. Output is taken at collector and gain is calculated by using the expression,
Av=V0/Vi
4. Voltage gain in dB is calculated by using the expression,
Av=20log 10(V0/Vi)
5. Repeat the above steps for different frequencies.
6. For plotting the frequency response, the input voltage is kept Constant at 40mV peak-to
peak and the frequency is varied from 10Hz to 1MHz using AC Voltage Source.
7. The Bandwidth of the amplifier is calculated from the graph using the expression,

Bandwidth BW=f2-f1 =
Where f1 is lower 3 dB frequency =
f2 is upper 3 dB frequency =

PRECAUTIONS:

1. All the connections are to be connected properly.

2. Transistor terminals must be identified properly

RESULT:

VIVA QUESTIONS:

1. Why CE Configuration is preferred over other configurations in amplifiers?

2. What is meant by Self Bias?
3. Define Stability
4. What is the relation between the BW and rise time?

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Circuit Diagram:

Fig 6.1: Current shunt with feedback Amplifier

Fig 6.2: Current shunt without feedback

Amplifier Frequency Response:

Fig 6.3: Frequency Response of Current shunt Feedback Amplifier

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Expt. No: 6
CURRENT SHUNT FEEDBACK AMPLIFIER
Date:

AIM: To design the frequency response of Current Shunt feedback amplifier.

APPARATUS:

1. Power supply (0-30V) – 1No

2. C. R. O – 1No
3. Function Generator – 1 No
4. Transistor BC548BP – 2 No
5. Resistor 1kΩ – 3 No
4.7kΩ – 2 No
10kΩ – 1 No
6. Capacitors 10 μF – 2 No
7. Bread Board – 1 No
8. Connecting Wires
9. C.R.O Probes

THEORY:

Current shunt feedback circuit shows two transistors in cascade with feedback from
the second emitter to the first base through the resistor RF. we verify that this connection
produces negative feedback. The voltage Vi2 is much larger than Vi1 because of the voltage
gain of Q1. Also Vi2 is 180 0 out of phase with Vi1. Because of emitter follower action Ve2 is
only slightly smaller than Vi2, and these voltages are in phase. Hence Ve2 is larger in
magnitude than Vi1 and is 1800 out of phase with Vi1. If the input signal increases so that IS
increases, If also increases, and Ii= IS - If is smaller than it would be there were no feedback.
This action is characteristics of negative feedback.

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

OBSERVATIONS:

with feedback without feedback

Input Voltagegiven Vin: Input Voltage given Vin:

Fig 5.4 : Frequency Response of Current shunt Amplifier With & Without Feedback

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

PROCEDURE:

1. Connect the circuit as shown in the figure

2. The operating points VCEQ , IEQ and VBE are measured.
3. Connect the signal generator with a sine wave of 1KHz frequency to the input and
increase the input to such a level that the output waveform of the signal as observed on CRO
is not distorted.
4. Measure the input and output voltages and calculate the gain of the amplifier. Av =
(VO / VI).
5. Tomeasuretheinputimpedance,findthevoltagedropacrosstheknownresistance
RS.TheinputcurrentthereforeismeasuredasthevoltageacrossRs/Rsvalue.Input impedance Zi =
Vi /Ii
6. To measure the input impedance, measure the output signal voltage VO/P without
anyload.Connectaresistiveloadandthenadjusttheloaduntilthenewoutputsignal VO equal to the
one half of the original signal. Remove the ROUT from the circuit and measure its value. The
measured value is the output impedance of the circuit.
7. To measure the current gain AI, note down the output signal voltage when Ro is connected
and divide it by Ro to get the output current. Now current gain = output
current/inputcurrent.Thepowergainistheproductofvoltagegainandcurrentgain.
8. Vary the frequency of the input signal from 50Hz to 1MHz in suitable steps and calculate
gain at each step. Plot the graph between voltage gain Vs frequency. Note down the half
power points and find the bandwidth of the amplifier.

CALUCULATIONS:

Without feedback
Input voltage (Vi) =
Input frequency =
Output voltage (V0) =
Voltage gain =
Gain in dB = (20log10 (V0/Vi) =
With feedback
Input voltage (Vi) =
Output voltage (V0) =
Voltage Gain =
Gain in dB = (20log10 (V0/Vi) =

RESULT:

VIVA QUESTIONS:

1. What is a feedback Amplifier?

2. What is the necessity of feedback?
3. What are the advantages and disadvantages of current shunt feedback?

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

CIRCUIT DIAGRAM

Fig 7.1: Circuit Diagram of CLASS A Series Fed Power Amplifier

MODEL WAVE FORMS

Fig 7.2: Frequency response of CLASS A Power Amplifier

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Expt. No: 7
CLASS A SERIES FED POWER AMPLIFIER
Date:

AIM: To design the frequency response of Class A Series fed power amplifier.
APPARATUS:
1. Power supply (0-30V) – 1No
2. C. R. O – 1No
3. Function Generator – 1 No
4. Transistor BC107BP – 1 No
5. Resistor 560Ω – 1 No
698Ω – 1 No
470kΩ – 1 No
6. Capacitors 2.2μF – 1 No
100μF – 1 No
7. Inductor 1mH – 1 No
8. Ammeter 0-100mA – 1 No
9. Bread Board – 1 No
10. Connecting Wires
11. C.R.O Probes

THEORY:

The function of power amplifier is to raise the power level of input signal. Class A
power amplifier is one in which the output current flows during the entire cycle of input
signal. Thus the operating point is selected in such a way that the transistor operates only over
the linear region of its load line. So this amplifier can amplify input
signalofsmallamplitude.Asthetransistoroperatesoverthelinearportionofloadline the output
wave form is exactly similar to the input wave form. Hence this amplifier is used where
freedom from distortion is the prime aim.

PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Set vi= 250mV to 300mV at 1 kHz using signal generator.
3. Connect the ammeter to the ammeter terminals.
4. Keeping input voltage constant vary the frequency from 1kHz to 1MHzin regular
steps note down the output voltage.
5. DC input power is calculated using the formula Pdc= Vcc x Ic.
6. AC output power is calculated using the formula Pac= Vo2/8RL
7. Efficiency is calculated by Pac/Pdc.
8. A graph is plotted between gain in dB and frequency.
9. Bandwidth is calculated from graph.

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

OBSERVATIONS:

Input Voltage given Vin:

S.No Frequency Output Voltage Voltage Gain Gain(db)

(Hz) Vo2 (mv) Av = Vo2/ Vi 20log10|Av|

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

OBSERVATION:
THEORITICAL CALCULATIONS:

PRACTICAL CALCULATIONS:
IC=
Pin(d.c) = VCC*ICQ=

Po(a.c)= =

% of efficiency= *100 =

RESULT:

VIVAQUESTIONS:
1. Define conversion efficiency of a power amplifier.
2. What is its value for efficiency for Class A, B and C power amplifier?
3. What is the criterion for the classification of power amplifiers?
4. What is the advantage of using the output transformer for a class A amplifier?
5. What is the disadvantage of transformer coupled class A amplifier?

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Circuit Diagram:

Fig 8.1: Circuit Diagram of RC Phase Shift Oscillator

Model Waveform:

Fig 8.2: Oscillations of RC Phase Shift Oscillator

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Expt. No: 8
RC PHASE SHIFT OSCILLATOR
Date:

AIM: To design the frequency response of RC Phase Shift Oscillator.

APPARATUS:

1. Power supply (0-30V) – 1No

2. C. R. O – 1No
3. Transistor BC107BP – 2 No
4. Resistor 47kΩ – 1 No
4.7kΩ – 1 No
1.2kΩ – 1 No
10kΩ – 4 No
5. Capacitors 10 μF – 1 No
100 μF – 1 No
0.001 μF – 3 No
6. Bread Board – 1 No
7. Connecting Wires
8. C.R.O Probes

THEORY:

RC-Phase shift Oscillator has a CE amplifier followed by three sections of RC phase

shift feedback Networks. The output of the last stage is returned to the input of the amplifier.
The values of R and C are chosen such that the phase shift of each RC section is 60º.Thus
The RC ladder network produces a total phase shift of 180º between its input and output
voltage for the given frequencies. Since CE Amplifier produces180ºphaseshift,the total phase
shift from the base of the transistor around the circuit and back to the base will be exactly
360ºor 0º.This satisfies the Barkhausen condition for sustaining oscillations. Total loop gain
of this circuit is greater than or equal to 1, this condition used to generate the sinusoidal
oscillations.

The frequency of oscillations of RC-Phase Shift Oscillator is,

PROCEDURE:

1. Make the connection as per the circuit diagram as shown above.

2. Observe the output signal and note down the output amplitude and time period (Td).
3. Calculate the frequency of oscillations theoretically and verify it practically
(f=1/Td).
4. Calculate the phase shift at each RC section by measuring the time shifts (Tp)
between the final waveform and the waveform at that section by using the below
formula.

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Fig 8.3: Phase Oscillations of RC Phase Shift Oscillator

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

PRECAUTIONS:

1. All the connections are to be connected properly.

2. Transistor terminals must be identified properly

RESULT:

VIVAQUESTIONS:

1. What is an Oscillator? Classify the various types of Oscillators?

2. What are the constituent parts of an Oscillator?
3. What phase angle introduced by ideal and practical RC section for oscillation?
4. What is the main difference between an Oscillator and an Amplifier?
5. Why three RC networks are necessary for a phase-shift oscillator

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Circuit Diagram:

Fig 9.1: Circuit Diagram of HARTLEY Oscillator

Model Graph:

Fig 9.2: Oscillations of HARTLEY Oscillator

Tabular column:

S.NO L1 L2 C4 AMPLITUDE(V) FREQUENCY(fT) FREQUENCY(fP)

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Expt. No: 9
HARTLEY OSCILLATOR
Date:

AIM: To design the frequency response of Hartley Oscillator.

APPARATUS:
1. Power supply (0-30V) – 1No
2. C. R. O – 1No
3. Transistor BC107BP – 2 No
4. Resistor 1kΩ – 1 No
100kΩ – 1 No
6.8kΩ – 1 No
4.7kΩ – 1 No
5. Capacitors 10μF – 2 No
0.01μF – 1 No
6. Inductors 1mH – 2 No
7. Bread Board – 1 No
8. Connecting Wires
9. C.R.O Probes

THEORY:

Hartley oscillator is very popular and is commonly used as a local oscillator in radio
receivers. It has two main advantages viz... Adapt ability to wide range of frequencies and
easy to tune. The tank circuit is made up of L1, L2, and C1. The coil L1is inductively coupled
to coil 2, the combination functions as auto transformer. The resistances R2 and R3 provide
the necessary biasing. The capacitance C2 blocks the d.c component. The frequency of
oscillations is determined by the values of L1, L2 and C1 and is given by,

The energy supplied to the tank circuit is of correct phase. The auto transformer
provides 180˚ out of phase. Also another 180˚ is produced by the transistor. In this way,
energy feedback to the tank circuit is in phase with the generated oscillations.

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

PROCEDURE:

1. Connections are made as per the circuit diagram.

2. Connect CRO at output terminals and observe waveform.
3. Calculate practically the frequency of oscillations by using the Expression.
F=1/T, Where T= Time period of the waveform
4. Repeat the above steps 2, 3 for different values of L1, L2 and C1 note Down
practical values of oscillations of Hartley oscillator.
5. Compare the values of frequency of oscillations both theoretically and practically.

RESULT:

VIVAQUESTIONS:

1. What are the advantages and disadvantages of negative feedback?

2. What are the conditions for sustained oscillator or what is Backhouse criterion?
3. What are the types of feedback oscillators?
4. What is LC oscillator?
5. How does an oscillator differ from an amplifier?

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Circuit Diagram:

Fig 10.1: Circuit Diagram of Single Tuned Amplifier

MODEL WAVEFORM:

Fig 10.2: Frequency response of Single Tuned Amplifier

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Expt. No: 10
SINGLE TUNED AMPLIFIER
Date:

AIM: To design the frequency response of Single Tuned amplifier.

APPARATUS:
1. Power supply (0-30V) – 1No
2. C. R. O – 1No
3. Function Generator – 1 No
4. Transistor BC107BP – 1 No
5. Resistor 10kΩ – 2 No
1KΩ – 3 No
6. Capacitors 10μF – 2 No
0.1μF – 1 No
4.7μF – 1 No
7.Inductor 1mH – 1 No
8. Bread Board – 1 No
9. Connecting Wires
10. C.R.O Probes

THEORY:
It is usually required to use a number of tuned amplifier stages in cascade in
ordertoobtainlargeoverallgain.Thesecascadetunedamplifiersmaybeputintothe following three
categories:
i. Single tuned amplifiers.
ii. Double tuned amplifiers.
iii. Stagger-tuned amplifiers

Single tuned amplifiers use one parallel tuned circuit as the load impedance in each
stage and all these tuned circuits in different stages are tuned to the same frequency. Double
tuned amplifier uses two inductively coupled tuned circuits per stage, both the tuned circuits
being tuned to the same frequency. Staggered tuned amplifier uses a number of single tuned
stages in cascade, the successive tuned circuits being tuned to slightly different frequencies.
Single tuned amplifiers may again be put into following two categories:
1. Capacitance coupled single tuned amplifiers and
2. Transformer coupled or inductively coupled single tuned amplifiers
RESONANT FREQUENCY:
Depending upon the frequency of the source voltage Vs, the circuits may behave either as
inductive or capacitive. However, at a particular frequency when the inductive reactance XL
equals the capacitive reactance Xc, then the circuit behaves as a purely resistive circuit. This
phenomenon is called resonance: and the corresponding frequency is called resonant
frequency. The resonant frequency (fr) can be found by equating the two reactance values.

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

OBSERVATIONS:

Input Voltage given Vin:

S.No Frequency Output Voltage Voltage Gain Av Gain(db)

(Hz) Vo (mv) = Vo/ Vi 20log10|Av|

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

PROCEDURE:
1) Connect the circuit as per the circuit diagram.
2) Set Vi= 20mV using signal generator.
3) Keeping input voltage constant vary the frequency from 10 kHz to1MHz in regular steps
note down the output voltage.
4) Plot the graph between gain and frequency.
5) Calculate resonant frequency and bandwidth.

RESULT:

VIVA QUESTIONS:

1. Explain the different regions in frequency response.

2. What is meant by tuned amplifier?
3. Define the term bandwidth of an amplifier?
4. Why we need to use tuned amplifiers?
5. Mention applications of Tuned amplifiers?

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

CIRCUIT DIAGRAM:

Fig 1.1: Series Voltage regulator

MODEL WAVE FORMS:

LINE REGULATIONLOAD REGULATION

Fig 1.2: V-I Characteristics of Series Voltage regulator

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

ADDITIONAL EXPERIMENTS

Expt. No: ADD-1 SHUNT VOLTAGE REGULATOR

Date:

AIM: To design a transistorized series voltage regulator and study the regulation action for various
input voltages and load resistors

APPARATUS:

THEORY:
An ideal power supply maintains a constant voltage at its output terminals, no matter
what current is drawn from it. The output voltage of a practical power supply changes with load
current, generally dropping as load current increases. The power supply specifications include a
full load current rating, which is the maximum current that can be drawn from the supply. The
terminal voltage when full load current is drawn is called the full load voltage (VFL). The no
load voltage (VNL) is the terminal voltage when zero current is drawn from the supply, that is,
the open circuit terminal voltage.
One measure of power supply performance, in terms of how well the power supply is
able to maintain a constant voltage between no load and full load conditions, is called its
percentage voltage regulation.

PROCEDURE:
 Connect the circuit as shown in the circuit diagram.
 Apply the input voltage from power supply.
 Measure base, emitter and collector D.C voltages and compare against estimated values.
 For a specific value of load resistor, vary the input voltage from 10 to a maximum of 20 volts
and not the values of output voltage.
 Change the load resistor and repeat steps 2 and 3.
 Remove the load resistor and note down the voltage at no load.
 Find percentage regulation.
VNLVFL
 Percentage regulation = x100

V
FL
 Plot the graph for load regulation and line regulation.

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Table 1.1: O/P VOLTAGE FOR VARIOUS I/P VOLTAGES &RL

Output voltage
S.No Vin RL= RL= RL=

For RL = ----------------, Regulating range is____________

For RL = ---------------- , Regulating range is____________

For RL = ---------------- , Regulating range is____________

RESULT:

VIVA QUESTIONS:

1. Define percentage line and load regulation, what are the typical values?
2. What are the demerits of a series voltage regulator? How can they be avoided?
3. What is an SMPS? Where is it used?

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Circuit Diagram:

Fig 2.1: Circuit diagram of Crystal Oscillator

Design: Let VCC = 12V;

ICQ = 4mA;
VE = (1/10) VCC to (1/5) VCC;
VCE= = 6V; hFE = 100.
To find RE: Let us choose VE = 2 V
RE = VE / IE VE / IC =2 V/ 4 mA =500 ; let RE =470Ω
VCC = ICRC + VCEQ + VEQ
RC = (VCC – VCEQ– VEQ) / ICQ = 4.0 V/ 4mA =1.0K; RC= 1K
Assume R2=10kΩ.
VB = VE + VBE = 2 + 0.6 = 2.6V
I2 = Current through R2= VB /R2 = 0.26mA or 260µA
The base current IB = IC / hFE= 4mA / 100= 0.04mA= 40µA
(hFE = βDC = 100, a working value; It varies from 50 to 280 for SL 100)
I1 = Current through R1 = IB+I2 = 300 µA
VR1=VCC– VB=12 – 2.6 =9.4V
R1 =VR1/ I1= 9.4V/300 µA =9400/300 KΩ =31.33KΩ R1 = 33K
CE = CC =0.1µF (Arbitrary, any value which gives a reactance < 10 Ω at Crystal frequency may be used.
reactance of a Capacitor XC = (1/2πfC); For C = 0.1 µF, XC = 0.8Ω at 2 MHz)

Observation:

Table 2.1H: Measurement of Practical transistor parameters

Parameter VRC VCE VE ICQ = VRC / RC VBE VB

Assumed 4.8V 6V 1.2V 4.5 mA 0.6 V 1.8 V

Practical

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ELECTRONIC CIRCUIT ANALYSIS LABORATORY (23A0410P) DEPARTMENT OF ECE

Expt. No: ADD-2

CRYSTAL OSCILLATOR
Date:

Aim: Design and set-up the crystal oscillator and determine the frequency of oscillation.

Components and equipment required:

Transistor SL 100, Crystal – 2MHz,

Resistors 470Ω, 1KΩ 10KΩ and 33 KΩ;
Capacitors 0.1µf - 2nos,
Power supply, CRO,
Connecting wires etc.

Theory: Crystal oscillators are used in order to get stable sinusoidal signals despite of variations in
temperature, humidity, transistor and circuit parameters. A piezo electric crystal is used in this oscillator
as resonant tank circuit. Crystal works under the principal of piezo-electric effect. i.e., when an AC
signal applied across the crystal, it vibrates at the frequency of the applied voltage. Conversely if the
crystal is forced to vibrate it will generate an AC signal. Commonly used crystals are Quartz, Rochelle
salt etc.

Procedure:

1. Switch on the Power Supply and before inserting the crystal check the D.C conditions by
removing the coupling capacitor CC1 or CC2.
2. Insert the crystal and the coupling capacitors and obtain the output waveform on the CRO.
If the o/p is distorted vary 1- KΩ Potentiometer (R3)to get perfect SINE wave.
3. Measure the period of oscillation and calculate the frequency of oscillation.
4. Compare with frequency marked on the crystal.

Result:

Viva Questions:
1. What are the conditions for sustained oscillator or what is Backhouse criterion?
2. What are the types of feedback oscillators?
3. What is piezoelectric effect?
4. How does an oscillator differ from an amplifier?

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ELECTRONIC CIRCUIT ANALYSIS & DESIGN LABORATORY (19A04402P) DEPARTMENT OF ECE

PROGRAMME EDUCATIONAL OBJECTIVES (PEOs):

PEO-1: Demonstrating a deep passion for continuous learning through technical expertise for a
promising career.
PEO-2: Exhibiting a strong commitment to serving the society with adherence to professional ethics.

PEO-3: Managing resources efficiently as competent engineers through effective social interaction.

PEO-4: Engaging in advanced learning and contributing to technological innovations.

PROGRAM SPECIFIC OUTCOMES (PSOS):

Design and develop electronic circuits and communication systems, applying the principles of
PSO1 signal, image processing, VLSI, Embedded and wireless applications relevant to industry and
society.
Adopting software tools like Matlab, Xilinx, Microwind, NS-2 to develop intelligent systems to
PSO2
offer customized solutions.

PROGRAM OUTCOMES:
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and an engineering specialization to the solution of complex engineering problems in Electronics and
Communication Engineering.
2. Problem analysis: Identify, formulate, review research literature, and analyse complex engineering
problems reaching substantiated conclusions using first principles of mathematics, natural sciences, and
engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering problems and design
system components or processes that meet the specified needs with appropriate consideration for the
public health and safety, and the cultural, societal, and environmental considerations.
4. Conduct investigations of complex problems: Use research-based knowledge and research methods
including design of experiments, analysis and interpretation of data, and synthesis of the information to
provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and modern
engineering and IT tools including prediction and modeling to complex engineering activities with an
understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to assess societal,
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7. Environment and sustainability: Understand the impact of the professional engineering solutions in
societal and environmental contexts, and demonstrate the knowledge of, and need for sustainable
development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities and norms of
the engineering practice.
9. Individual and team work: Function effectively as an individual, and as a member or leader in diverse
teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the engineering
community and with society at large, such as, being able to comprehend and write effective reports and
design documentation, make effective presentations, and give and receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the engineering
and management principles and apply these to one’s own work, as a member and leader in a team, to
manage projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and ability to engage in
independent and life-long learning in the broadest context of technological change.

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ELECTRONIC CIRCUIT ANALYSIS & DESIGN LABORATORY (19A04402P) DEPARTMENT OF ECE

ABOUT THE INSTITUTION:

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with A and affiliated to JNT University, Anantapur, presently having student strength of over 2000,
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Various professional student associations and chapters were formed in association with Institute of
Electrical and Electronics Engineers (IEEE), Institution of Electronics and Telecommunication Engineers
(IETE), Computer Society of India (CSI), Andhra Pradesh State.

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ELECTRONIC CIRCUIT ANALYSIS & DESIGN LABORATORY (19A04402P) DEPARTMENT OF ECE

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 Recognized by APSSDC as active Centre.
 Exclusive R&D Department, creating research avenues.
 Collaboration withIUCEE (Indo-US collaboration of Engieering Education).
 Empanelled Spot Evaluation Centre JNTUA, Ananthapuram for the past 5 years.
 TCS-Ion certified Zero-error Centre for several Online Examinations (IBPS, LIC, RBI,RRB, GATE).
 Accorded ‘Gold Status Institute’ in AICTE-CII Survey.
 Permanently affiliated to JNTUA, Anantapuramu and Possesses 2f&12B status of UGC.
 Two girl students accomplishng Prathibha puraskars.
 A girl student from ECE baggubg JNTUA Gold Medal for the Batch 2013-17.

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