SIR MVIT

Department of Electronics & Communication Engg

LAB MANUAL

Electronic Principles and Circuits Lab

(BEC303)

Prepared by
Seema Sreekumar/ ECE

Department of Electronics

and Communication Engineering

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Department of Electronics & Communication Engg

INDEX

Subject Name : Electronic Principles and Circuits Lab Subject Code: BEC303

Experiment Name of the Experment Page No

Number

Part - A
1 FULL-WAVE BRIDGE RECTIFIER CIRCUIT
05
WITHOUT AND WITH FILTER
2 ZENER DIODE CHARACTERISTICS & REGULATOR
USING ZENER DIODE 14

3 CLIPPING AND CLAMPING CIRCUITS

26
4 JFET CHARACTERISTICS 32
5 CHARACTERISTICS OF MOSFET
38
6 EMITTER FOLLOWER 41
7 MOSFET AMPLIFIER IN COMMON SOURCE
CONFIGURATION 47

8 SCHMITT TRIGGER
51
Part – B
9 RC TRIGGERING CIRCUIT – HWR & FWR 58
10 PRECISION RECTIFIER USING OP-AMP 64
11 RC PHASE SHIFT OSCILLATOR 70
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FULL-WAVE BRIDGE RECTIFIER CIRCUIT WITHOUT AND

WITH FILTER

EXP.No.01
AIM :

1. To construct a full-wave bridge rectifier circuit and analyze its output.

2. To analyze the rectifier output using a capacitor in shunt as a filter.

Overview:

As you have seen already a half-wave rectifier circuit is unsuitable to

applications which need a "steady and smooth" dc supply voltage. One method to
improve on this is to use every half-cycle of the input voltage instead of every other
half-cycle. The circuit which allows us to do this is called a Full-wave Rectifier. Here,
unidirectional current flows in the output for both the cycles of input signal and
rectifies it. The rectification can be done either by a center tap full wave rectifier (using
two diodes) or a full wave bridge rectifier (using four diodes). In this experiment we
will study a full wave bridge rectifier.

The Full-wave Bridge Rectifier

Another type of circuit that produces
the same output as a full-wave rectifier
is that of the Bridge Rectifier (Fig. 1).
This type of single phase rectifier uses
4 individual rectifying diodes
connected in a "bridged" configuration
to produce the desired output but does Fig. 1: Full-wave Bridge Rectifier
not require
a special centre tapped transformer,
thereby reducing
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its size and cost. The single secondary winding is connected to one side of the diode
bridge network and the load to the other side as shown in figure. The 4 diodes labeled
D1 to D4 are arranged in "series pairs" with only two diodes conducting current during
each half cycle. During the positive half cycle of the supply, diodes D1 and D2 conduct
in series while diodes D3 and D4 are reverse biased and the current flows through the
load as shown below (Fig. 2). During the negative half cycle of the supply, diodes D3
and D4 conduct in series, but diodes D1 and D2 switch of as they are now reverse
biased. The current flowing through the load is the same direction as before.

Fig. 2: Working of Full-wave bridge rectifier

As the current flowing through the load is unidirectional, so the voltage developed
across the load is also unidirectional during both the half cycles. Thus, the average dc
output voltage across the load resistor is double that of a half-wave rectifier circuit,
assuming no losses.

Vdc = 2Vmax = 0.637V

π max

Ripple factor:
As mentioned in the previous lab the ripple factor is a measure of purity of the
d.c. output of a rectifier and is defined as

Vrms – Vdc
2 2
V (output ) Vrms ( 0.707  2
r== ac 2 –1   –1
V = 2
 0.637  = = 0.48
dc
Vdc
Vdc (output )

In case of a full-wave rectifier Vrms = Vmax/√2 = 0.707Vmax. The ripple frequency is now
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wice the supply frequency (e.g. 100Hz for a 50Hz supply).

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Rectification Efficiency:
Rectification efficiency, η, is given
by
η = d .c. power delivered to a.c. power at input
load
= Vdc Idc Vac Iac
V2R (0.637V )2 0.811
= dc L = max =
V 2 (r + R ) ( r  ( r 
s d L
(0.707V )2 1 + d
 1+ d

m  RL   RL 
where rd is the forward resistance of diode. Under the assumption of no diode
loss (rd<<), the rectification efficiency in case of a full-wave rectifier is approximately
81.1%, which is twice the value for a half-wave rectifier.

Filter:

Smoothing
Capacitor

C Charges C Disharges

(Output waveform
without capacitor)

(With capacitor)

Fig.3: Full-wave rectifier circuit with capacitor filter

The full-wave rectifier circuit with capacitor filter is shown in Fig. 3. The
smoothing capacitor converts the full-wave rippled output of the rectifier into a smooth
dc output voltage. The detailed description of its filtering action is already explained in
half-wave rectifier handout. Two important parameters to consider when choosing a
suitable a capacitor are its working voltage, which must be higher than the no-load
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output
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value of the rectifier and its capacitance value, which determines the amount of ripple
that will appear superimposed on top of the dc voltage.

Apart from rectification efficiency, the main advantages of a full-wave bridge

rectifier is that it has a smaller ac ripple value for a given load and a smaller smoothing
capacitor than an equivalent half-wave rectifier. The amount of ripple voltage that is
superimposed on top of the dc supply voltage by the diodes can be virtually eliminated
by adding other improved filters such as a pi-filter.

Circuit components/Equipments:

(i) A step-down transformer, (ii) 4 junction diodes, (iii) 3 Load resistors, (iv)
Capacitor, (v) Oscilloscope, (vi) Multimeters, (vii) Connecting wires, (viii)
Breadboard.

Circuit Diagram: (As shown in Fig. 1 and 3)

Procedure:

i) Configure the full-wave rectifier circuit as shown in the circuit diagram. Note down
all the values of the components being used.
ii) Connect the primary side of the transformer to the a.c. Mains and secondary to the
input of the circuit.
iii) Measure the input a.c. voltage (Vac) and current (Iac) and the output a.c. (Vac) and
d.c. (Vdc) voltages using multimeter for at least 3 values of load resistor (Be
careful to choose proper settings of multimeter for ac and dc measurement).
iv) Feed the input and output to the oscilloscope (we will use oscilloscope here only to
trace the output waveform) and save the data for each measurement. MEASURE
THE INPUT AND OUTPUT VOLTAGES SEPARATELY.
v) Multiply the Vac at the input by √2 to get the peak value and calculate V dc Using the
formula Vdc = 2Vmax/ π. Compare this value with the measured Vdc at the output.
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vi) Calculate the ripple factor and efficiency.

vii) Connect the capacitor across the output for each load resistor. Measure the output
a.c. and d.c. voltages once again and calculate the ripple factor. Trace the input
and output waveforms in oscilloscope and notice the change. (If time permits
you could also use different values of capacitors and study the output)

Observations:

Table(I): Full-wave rectifier w/o filter

Sl. No Load Input Output Voltage Ripple Efficiency η

RL (kΩ) Curren Vac Vdc 2Vmax/ π Factor (Vdc2/RL)/VacIac
t (%)
(Volt) (Volt) (Volt) r
Iac (mA)
1
2
3

Table(II): Full-wave rectifier with filter (C = μF)

Sl. No Load Output Voltage Ripple Factor

RL (kΩ) Vac (Volt) Vdc (Volt) r
1
2
3
Result :

Thus the characteristics of Zener Diode has been plotted

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ZENER DIODE CHARACTERISTICS

Diode schematic Symbol

CIRCUIT DIAGRAM
A) FORWARD BIAS CHARACTERISTICS:

A) REVERSE BIAS CHARACTERISTICS:

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EXP.No.02 ZENER DIODE CHARACTERISTICS & REGULATOR USING

ZENER DIODE
AIM:

❖ To plot the volt ampere characteristics of a

zener diode.
❖ To determine its knee voltage,
breakdown voltage also its
static and dynamic resistances
in forward and reverse bias.
❖ To determine the line and load regulation
characteristics of a zener diode.
APPARATUS REQUIRED:

S.N Name of the apparatus Range Quantity

o.
1 Zener diode IZ 1No
6
2 Regulated Power supply (0-30V) 1No

3 Resistor 1K 1No
Ω
4 Ammeter (0-1000µA) 1No

5 Ammeter (0-100 mA) 1No

6 Ammeter (0-200 mA) 2Nos

7 Voltmeter (0-1V) 1No

8 Voltmeter (0-20V) 1No

9 Decade Resistance Box (DRB) 1 No

10 Bread board - 1No

11 Connecting wires Single As

strand required

THEORY:
A zener diode is heavily doped p-n junction diode, specially made to operate in the
break down region. A p-n junction diode normally does not conduct when reverse biased. But if
the reverse bias is increased, at a particular voltage it starts conducting heavily.
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MODEL GRAPH:

OBSERVATIONS:
A) FORWARD BIAS:

S.N Applied Voltage(V) Forward Voltage(Vf) Forward Current(If(mA))

O

B) REVERSE BIAS:

S.N Applied Voltage(V) Forward Voltage(Vr) Reverse Current((IR(μA))

O

CALCULATIONS:
Forward bias
Static forward resistance Rdc = Vf / If Ω
Dynamic forward resistance rac =
ΔVf/ΔIf Ω Reverse bias
Static reverse resistance Rdc = Vr/ Ir Ω
Dynamic reverse resistance rac =
ΔVf/ΔIf Ω
For Load Regulation, % Voltage Regulation = (𝑉𝑁𝐿−𝑉𝐹𝐿) X 100
𝑉𝐹𝐿
This voltage is called Break down Voltage. High current through the diode can
permanently damage the device. Applying a positive potential to the anode and a negative potential
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to the cathode of the zener diode establishes a forward bias condition. The forward
characteristic of the zener diode is same as that of a pn junction diode i.e. as the applied
potential increases the current increases exponentially. Applying a negative potential to the
anode and positive potential to the cathode reverse biases the zener diode.
As the reverse bias increases the current increases rapidly in a direction opposite to that of
the positive voltage region. Thus under reverse bias condition breakdown occurs. It occurs
because there is a strong electric filed in the region of the junction that can disrupt the bonding
forces within the atom and generate carriers. The breakdown voltage depends upon the amount
of doping. For a heavily doped diode depletion layer will be thin and breakdown occurs at low
reverse voltage and the breakdown voltage is sharp. Whereas a lightly doped diode has a higher
breakdown voltage. This explains the zener diode characteristics in the reverse bias region.
Basically there are two types of regulations such as:

❖ Line Regulation: In this type of regulation, series resistance and load resistance are
fixed, only input voltage is changing. Output voltage remains the same as long as the
input voltage is maintained above a minimum value.
❖ Load Regulation: In this type of regulation, input voltage is fixed and the load
resistance is varying. Output volt remains same, as long as the load resistance is
maintained above a minimum value.
PROCEDURE:
1) V- I CHARACTERISTICS:
a) Forward Bias Condition:
1. Connect the circuit as shown in figure .
2. Initially vary Vs in steps of 0.1V. Once the current starts increasing vary Vs in steps of
1V up to 12V. Note down the corresponding readings of Vzf and Izf.
b) Reverse Bias Condition:
1. Connect the circuit as shown in figure (2).
2. Vary Vs gradually in steps of 1V up to 12V and note down the corresponding readings
of Vzr and Izr.
3. Tabulate different reverse currents obtained for different reverse voltages.

ZENER DIODE REGULATION CHARACTERISTICS

LINE REGULATION:
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MODEL GRAPH:

TABULATION:
Load resistance RL = KΩ

Input Zener current Load current Regulated

Sl.No.
Supply Iz (mA) IL (mA) output
Voltage voltage Vo
Vs (V)

Regulation characteristics:
c) Line Regulation

1. Connect the circuit for line regulation as shown in the figure.

2. Vary supply voltage (Vs) in steps of 1V from 0-15 Volts and note the
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corresponding zener current (Iz), load current (IL) and output voltage (Vo).
3. Plot the graph between Vs and Vo taking Vs on X axis and Vo on Yaxis.
d) Load Regulation:
1. Connect the circuit for Load regulation as shown in figure .
2. Now fix the power supply voltage, Vs at 10V.
3. Without connecting the load RL, note down the No-Load Voltage (VNL).
4. Now connect the load (RL) using Decade Resistance Box (DRB) and vary the resistance
in steps 1K from 1K to10K / in steps of 10 K from10K to 100K and note the
corresponding Zener Current (IZ), Load Current (IL) and Output Voltage (VO) for 10
readings and calculate the percentage regulation.
5. Plot the graph between RL and VO taking RL on X-axis and VO on Y-axis.
PRECAUTIONS:
1. The terminals of the zener diode should be properly identified
2. While determined the load regulation, load should not be immediately shorted.
3. Should be ensured that the applied voltages & currents do not exceed the ratings of the diode.

RESULT:
Thus plotted the VI characteristics of Zener diode and determined its parameters:
a) Forward Bias Zener Diode:
1. The Knee voltage or Cut-in Voltage (Vy) is Volts.
2. The Dynamic Forward resistance is Ω.
3. The Static Forward resistance is Ω..
b) Reverse Bias of Zener Diode:
1. Zener Breakdown Voltage (VZ) is Volts.
2. The Dynamic Reverse resistance is Ω
3. The Static Reverse resistance is
Zener Diode is

A) LOAD REGULATION:
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MODEL GRAPH:

TABULATION:

Input supply voltage Vs =

Volts
No load DC voltage, VNL =
Volts

Load Zener Load Output %

Sl.N
resistance current current voltage Vo Voltage
o
RL (KΩ) Iz (mA) IL (mA) (Volts) regulati
on
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Experiment No. 3

CLIPPING
AND
CLAMPING
Experiment No. 3
CIRCUITS
AIM
To realise different clipping and clamping circuits and observe the waveforms.
THEORY
Clipping Circuits

Clipping circuits are nonlinear wave shaping circuits. A clipping circuit is

useful to cut off the positive or negative portions of an input waveform. Clipping
circuits are also known as voltage limiters or slicers.
Positive clipper
The positive half cycle is clipped by diode and only the drop across diode
will appear across the load. During negative half cycle, the diode does not conduct
and the voltage across RL is given by
V=V RL
L S +R
L
R

Since RL >> R, the output voltage will be close to input voltage during negative
half
cycle.
Negative clipper
The negative half cycle is clipped by diode and only the drop across diode
will appear across the load. During positive half cycle, the diode does not conduct
and the voltage across RL is given by
V=V RL
L S +R
L
R
Since RL >> R, the output voltage will be close to input voltage during the
positive half
cycle.
Biased positive clipper
Here a reference voltage is given to the clipper circuit by a zener diode. Up to
Vz, the output voltage is

/(RL+R)
V0 = Vin RL

At Vo = Vz, the zener breakdown occurs and the voltage Vo is constant. Here the
reference voltage is used to clip only a part of the positive half cycle.
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Biased negative clipper

The principle is similar to that of a biased positive clipper. Here a reference
voltage is provided by a zener diode to clip a portion of the negative half cycle.
During the positive half cycle

RL/(RL+R)
V0 = Vin

Slicer
This is the combination of both biased positive clipper and biased negative clipper.
The peak portion of the signal determined by the zener voltage reference is clipped.
Clamping Circuit
Clamping is a function which must be frequently performed with a periodic
waveform in the establishment of the recurrent positive or negative extremity at
some constant reference level. Clamping circuits are also referred to as dc restorer or
dc inserter.
A positive clamper adds positive dc level and a negative clamper adds a
negative dc level. A positive clamper clamps a negative extremity of the input signal
to the reference voltage level. A negative clamper adds to negative dc level by
clamping the positive extremity of the input to the reference voltage level.
PROCEDURE
The circuits are wired as in the circuit diagram. Connect the input terminals to
230V ac supply and the output terminals to a CRO.

Positive clipper

Negative clipper

VS
t

0.6 V
VL
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Biased Positive clipper

VS
Biased Negative clipper t

VL VZ+VD

Slicer
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Positive clamping Circuit

C 1 uF
+

230 V
Negative clamping Circuit
D
1N400
1 RL
100 k CRO

C 1 uF
+

230/6
D1 RL
230 V 1N400 100 k CRO

230/6

Result :
Thus the clipper and clamper circuit have been designed and executed.
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JFET CHARACTERISTICS

SYMBOL PIN DIAGRAM:

CIRCUIT DIAGRAM:
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EXP.No.04 JFET CHARACTERISTICS

AIM:
To determine the drain & transfer characteristics of given JFET & to find its parameters.
APPARATUS REQUIRED:

S. Name of the apparatus Ran Quantity

No ge
1 FET BFW 10 1No

2 Dual Regulated Power supply (0-30V) 1No

3 Resistor 1KΩ, 100KΩ Each 1No

4 Ammeters (0-200 mA) 1No

5 Voltmeters (0-20V) 2Nos.

6 Bread board - 1 No

7 Connecting wires Single strand As

required

THEORY:

Operation:

The circuit diagram for studying drain and transfer characteristics is shown in the fig.

1. Drain characteristics are obtained between the drain to source voltage

(VDS) and drain current (ID) taking gate to source voltage (VGS) as the
constant parameter.
2. Transfer characteristics are obtained between the gate to source voltage
(VGS) and drain current (ID) taking drain to source voltage (VDS) as the
constant parameter.
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EXPECTED GRAPHS:

A) DRAIN CHARACTERISTICS

B) TRANSFER CHARACTERISTICS:

CALCULATION:

1. Drain resistance (rd) = ΔVDS/ΔID

2. Trans conductance (gm) = ΔID/ΔVGS
3. Amplification factor (μ) =rd*gm.
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PROCEDURE:
DRAIN CHARACTERISTICS:
1. Connections are made as per the circuit diagram.
2. Set gate voltage VGS=-1, vary the drain voltage VDS instep of 1V & note down the
corresponding drain current ID.
3. Repeat the above procedure for VGS=0V,-2V. 4. Plot the graph for a constant VDS Vs ID

5. Find the drain resistance (rd) = ΔVDS/ΔID

TRANSFER CHARACTERISTICS:

1. Connections are made as per the circuit diagram.

2. Set gate voltage VDS=1V, vary the gate voltage VGS in step of 1V and note down the
corresponding drain current ID

3. Repeat the above procedure for VDS=5V, 10V.

4. Plot the graph for VGS Vs ID.

5. Find the Trans conductance (gm) gm = ΔID/ΔVGS

RESULT:

Thus the drain and transfer characteristics of JFET is drawn and the parameters were
determined.

1. Drain resistance (rd) =…………

2. Trans conductance (gm) =…………

3. Amplification factor (μ) =………...

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VIVA QUESTIONS:

1. Why FET is called as VVR?

2. What is unipolar device?
3. What is the advantage of high input resistance in FET?
4. List the applications of FET Device.
5. Mention the merits and demerits of FET compared to BJT.
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CIRCUIT DIAGRAM OF MOSFET CHARACTERISTICS:

Nature of Graph:

Pin configuration of MOSFET:

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Expt.No-5
CHARACTERISTICS OF MOSFET

AIM: To plot the Transfer and Drain characteristics of MOSFET and determine
Trans conductance and output Resistance.

APPARATUS REQUIRED:

S.no Apparatus Range Qty

1 MOSFET IRF 740 1 No
2 Resistor 560Ω 1 No
3 Ammeter (DC) 0-60mA 1 No
4 Voltmeter (DC) 0-60V 1 No
5 Voltmeter (DC) 0-30V 1 No
6 Multimeter - 1 No
7 VRPS 0-30V 3 Nos
8 Connecting wires - Few

THEORY:
A MOSFET (Metal oxide semiconductor field effect transistor) has three terminals called
Drain, Source and Gate. MOSFET is a voltage controlled device. It has very high input
impedance and works at high switching frequency.
MOSFET’s are of two types 1) Enhancement type 2) Depletion type.
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TABULAR COLUMN:
A) Transfer Characteristics:

VDS1= Volts VDS2= Volts

VGS (V) ID (mA) VGS (V) ID (mA)

B) Drain Characteristics:

VGS1= Volts VGS2= Volts

VDS (V) ID (mA) VDS (V) ID (mA)

CALCULATION:

Trans conductance:
gm = ∆ID = mho at constant VDS
∆VGS

Output Resistance:
∆VD
R0 = S = Ω at constant VGS

∆ID
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PROCEDURE:
A) Transfer Characteristics:
1. Make the connections as per the circuit diagram.
2. Initially keep V1 and V2 at 0 V.
3. Switch ON the regulated power supplies. By varying V 1, set VDS to
some constant voltage say 5V.
4. Vary V2 in steps of 0.5V, and at each step note down the corresponding
values of VGS and ID. (Note: note down the value of V GS at which ID
starts increasing as the threshold voltage).
5. Reduce V1 and V2 to zero.
6. By varying V1, set VDS to some other value say 10V.
7. Repeat step 4.
8. Plot a graph of VGS versus ID for different values of VDS.

B) Drain or Output Characteristics:

1. Make the connections as per the circuit diagram.
2. Initially keep V1 and V2 at zero volts.
3. By varying V2, set VGS to some constant voltage (must be more than
Threshold voltage).
4. By gradually increasing V1, note down the corresponding value of VDS
and ID. (Note: Till the MOSFET jumps to conducting state, the voltmeter
which is connected across device as V DS reads approximately zero
voltage. Further increase in voltage by V 1 source cannot be read by V DS,
so connect multimeter to measure the voltage and tabulate the readings in
the tabular column).
5. Set VGS to some other value (more than threshold voltage) and repeat step 4.
6. Plot a graph of VDS versus ID for different values of VGS.

Note: If VDS is lower than VP (pinch-off voltage) the device works in the constant resistance region that is
linear region. If VDS is more than VP, a constant ID flows from the device and this operating region is called
constant current region
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EMITTER FOLLOWER
Experiment No : 6
AIM :
To construct an emitter follower circuit and

(i) Measure the gain

(ii) Plot its input and output waveforms

OBJECTIVES

On completion of the experiment students will be able to

❖ Assemble an emitter follower circuit

❖ Test the dc condition and ascertain the working condition of the amplifier
❖ Understand the characteristics of emitter follower circuit

EQUIPMENTS / COMPONENTS

Sl. no. Name and Specification Quantity

1. Resistors 1 KΩ 1 no.
2.2 KΩ 1 no.

10 KΩ 1 no.

22 KΩ 1 no.
33 KΩ 1 no.

2. Capacitor 1 µF 2Nos
3. Transistor BC 107 1 no.
4. Function 0 to 1 MHz 1 no.
generator
5. Oscilloscope 0 to 20 MHz 1 no.
6. Multimeter 1 no.
7. Breadboard 1 no.
8. Connecting wires

PRINCIPLE

Emitter follower is the popular name for common collector amplifier. Its voltage gain is
approximately unity (without RLvoltage gain is unity). It has high input impudence and lowoutput
impedance. Thus emitter follower has less loading effect and is suitable for impedance matching.
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Since collector is directly connected to dc source, it appears to be grounded for ac

signal. Output is taken from the emitter terminal. The output voltage is in phase and is equal
to the input signal. Since the amplitude and phase of the output (emitter) follows the input
(base), the circuit is called emitter follower. In this circuit voltage divider biasing is used for
base bias. RE acts as the load for signal at the output circuit.RE also provides a negative
feedback in the circuit.

PROCEDURE

1) Test the components

2) Assemble the circuit
3) Measure the dc condition using multimeter and verify whether the transistor is in active
region
4) Apply 1Vpp,1 KHz sinusoidal signal as input
5) Observe the voltages at input point (Vin), at base, at emitter and at the output point(VO)
without RL
6) Measure the amplitudes and dc levels
7) Plot the waveforms
8) Observe and measure VO with RL = 10 KΩ and RL = 1KΩ
9) Calculate the voltage gain for the above three conditions of R L

CIRCUIT DIAGRAM
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OBSERVATIONS

1. DC Condition (multimeter)

VCC
=
VCE
=
VBE
=

Note : At proper biased condition, VBE should be 0.6V to 0.7V, VCE should be approximately
half of VCC
2. Input Output waveforms

Vin = 1V (pp), 1 KHz, without RL

3. Voltage gain
(i) Without load (RL = ∞)

VO = 1V

Gain = =1
Voltage
gain
with
10 K
load
VO =
Gain =

Voltage
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gain

with

1 KΩ

load

VO =
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MOSFET AMPLIFIER IN COMMON SOURCE CONFIGURATION

Experiment No 7(a)
AIM:

To obtain the frequency response of MOSFET amplifier in common

source configuration with given specifications.

THEORY:
The MOSFET structure has become the most important device structure in
the electronics industry. It dominates the integrated circuit technology in Very Large
Scale Integrated (VLSI) digital circuits based on n-channel MOSFETs and
Complementary n- channel and p-channel MOSFETs (CMOS). The technical
importance of the MOSFET results from its low power consumption, simple
geometry, and small size, resulting in very high packing densities and compatibility
with VLSI manufacturing technology. Two of the most popular configurations of
small-signal MOSFET amplifiers are the common source and common drain
configurations. The common source circuit is shown below. The common sources,
like all MOSFET amplifiers, have the characteristic of high input impedance. High
input impedance is desirable to keep the amplifier from loading the signal source.
This high input impedance is controlled by the bias resistors R 1 and R2). Normally
the value of the bias resistors is chosen as high as possible. However, too big a value
can cause a significant voltage drop due to the gate leakage current. A large voltage
drop is undesirable because it can disturb the bias point. For amplifier operation the
MOSFET should be biased in the active region of the characteristics.
CIRCUIT DIAGRAM:

VDD = 12
V
RD
R1
2.7 CC 1
100
μF
CC 1
μF
2N700

8 CRO
R2 2
Vin
33 RS 0
kΩ 470 CS
Ω 10

Circuit diagram of MOSFET Amplifier with Common Source Configuration

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DESIGN:

Assume VDD = 12V, VRD = 5V, VDS = 6V, ID = 2 mA

R = VRD = 2.5 kΩ
5
= use 2.7 kΩ
D
ID 2×10 ×10−3
resistor.
Now, the source side VRD =
=1V
VDD – VDS –
voltage resistance
across VRS = 12 – 6 – 5
through
R = VRS = 1 the gate),
ID 2 ×10 ×10−3 = 500 Ω
S

As, IS = ID, (no use 470 Ω

current resistor.

flows

Voltage – divider bias circuit design:

Assume, R1 = 100 kΩ. By, voltage division rule, R2 can be obtained as,

V = V × R2
G DD R+R
1 2

Selecting the value of VG as 4V

4 = 12 × R2
R ≈ 47 kΩ
100 ×10 ×103 + R 2
2

Design of capacitors:

Assume impedance of coupling capacitor be < 1.5 kΩ. Therefore,

XC1 ≤ 1.5kΩ ≤ 1.5 kΩ

ie 1
2π fC1

Given, the frequency of the input signal is

100Hz. C1 = 1.06μf. use 1

μf capacitor. Let C1 = C2 = 1 μf.

For the bypass capacitor, 2π fCS

XCS ≤ 150Ω ie 1
 SIR MVIT

≤ 150 Ω

CS = 10μf
 SIR MVIT

PROCEDURE:

Set up the circuit as shown in the figure with an input signal of 0.2V (peak-to-peak) at 1000 Hz.
Observe the output on the CRO. Vary the frequency of the input signal over a range of values (from 50Hz
to a few MHz) to obtain the frequency response which is a graph between log f (x-axis) and gain in dB
(y-axis).

OBSERVATION:

Frequen Input Output G Gain

cy voltage voltage a 20 log
i Vo
f Vi Vi
n V
Hz V V V
i

o dB
V
i
-

GRAPH (to be obtained):

Fig 2. Frequency response

RESULT:

The required common source MOSFET amplifier was designed and set up to obtain the required
frequency response.
 SIR MVIT

FREQUENCY RESPONSE OF COMMON SOURCE AMPLIFILER

EXP.No.07 (b)
AIM:

To design a Common Source amplifier with self bias and determine the voltage gain to plot the
frequency response.

a. Gain of the amplifier

b. Bandwidth of the amplifier

c. Gain -Bandwidth Product

APPARATUS REQUIRED :

S.No APPARATUS RANGE QUANTITY

1 Function (0-3)MHz 1
Generator
2 CRO (0-30)MHz 1

3 Resistors 1kΩ, ,10kΩ,2KΩ, Each 1

4 Power supply (0-30)V 1

5 JFET BFW10 1

6 Capacitors 10μF,1 μF Each 1

7 Bread Board - 1

8 Connecting Wires Single strand as required

THEORY:

There are three basic types of FET amplifier or FET transistor namely common source
amplifier, common gate amplifier and source follower amplifier.
The common-source (CS) amplifier may be viewed as a transconductance amplifier
or as a voltage amplifier.
i) As a transconductance amplifier, the input voltage is seen as modulating the
current going to the load.
 SIR MVIT

ii)As a voltage amplifier, input voltage modulates the amount of current flowing
through the FET, changing the voltage across the output resistance according to Ohm's law.
However, the FET device's output resistance typically is not high enough for a
reasonable transconductance amplifier (ideally infinite), nor low enough for a decent
voltage amplifier (ideally zero). Another major drawback is the amplifier's limited high-
frequency response. Therefore, in practice the output often is routed through either a
voltage follower (common-drain or CD stage), or a current follower (common-gate or CG
stage), to obtain more favorable output and frequency characteristics
PROCEDURE:

1. Connect the circuit as per the circuit diagram

2. Determine the Q-point of the CS amplifier using DC analysis.
3. Determine Maximum input voltage that can be applied to CS amplifier using AC analysis.
4. Set the input voltage Vin=V MSH /2 and vary the input signal frequency from 0Hz to
1MHz in incremental steps and note down the corresponding output voltage V o for
atleast 20 different values for the considered range.
5. The voltage gain is calculated as

Av = 20log (V0/Vi)
dB
6. Find the Bandwidth and Gain-Bandwidth Product from Semi-log graph taking frequency
on x-axis and gain in dB on y-axis.,

Bandwidth, BW = f2-f1

where
f1 lower cut-off
frequency f2 upper cut-
 SIR MVIT

COMMON SOURCE CIRCUIT DIAGRAM:

+VDD =12V

R1

10K C1

0.1µF

D
C2
BFW
G
JFET RL
10 µF
S
R2
FG (0-3)MHz R3 C3
2k
1k 1µF

MODEL GRAPH:
 SIR MVIT

TABULATION:

Input voltage constant (V in) =

FREQUENCY (in OUTPUT VO(V) Gain in dB= 20log(Vo/Vin)dB

Hz)

RESULT:

Thus the Common Source amplifier was constructed and the frequency response
curve I has been plotted.
 SIR MVIT

Ex. No:8 SCHMITT TRIGGER Date:

(REGENERATIVE COMPARATOR)
(Opamp comparator with zero and non zero reference to get hysteresis
curve.)
AIM:
To design a Schmitt trigger circuit for generating a square wave output.

APPARATUS REQUIRED:
S.No. Name of the Apparatus Range/Value Qty
1. Bread Board - 1
2. IC Power Supply ±15 V 1
3. Resistor 1 k Ω, 27 k Ω 2, 1
4. IC 741 Op-Amp - 1
5. CRO 20 MHz. 1
6. Function Generator 0-3 MHz. 1
7. Connecting Wires - Few

THEORY:
Schmitt trigger circuit is an inverting comparator with positive feed back. The input
voltage is applied to the (-) terminal and feed back voltage to the (+) terminal. The input
voltage Vi triggers the output every time it exceeds certain voltage levels called upper
threshold and lower threshold voltage. This circuit converts an irregular shaped wave form to
a square wave or pulse. The upper and lower threshold is V UT = Vsat [R2/(R1+R2)], VLT = - Vsat
[R2/(R1+R2)] respectively.

DESIGN:
VUT = + 0.5V; VLT = - 0.5V
For 741, with supply voltages ±15V, the saturation voltage ±V sat = ±15V
0.5 = 15 [R2/ (R1+R2)]. R1=27 R2. Let R2 = 1 kΩ therefore R1 =

CIRCUIT DIAGRAM: TABULATION:

Waveform
Amplitude (Volts)
Time period (ms)
INPUT

PROCEDURE:
▪ Connect the circuit as shown in circuit diagram.
▪ Adjust the signal generator so that Vi =2V p-p sine wave at
1kHz.Observe and plot the input and output wave forms
 SIR MVIT

MODEL GRAPH:

RESULT:
A Schmitt trigger designed and constructed and the square wave output is
obtained.
Upper threshold voltage =
Lower threshold voltage =
Square output:
Amplitude =
Time period =
 SIR MVIT

SCHMITT TRIGGER:-
CIRCUIT DIAGRAM:-

O/P
I/P Voltage I/P Time VUT (UTP) VLT (LTP) O/P Time
Voltage
(Volts) (ms) (Volts) (Volts) (ms)
(ms)

MODEL GRAPH:

THEORY-(SCHMITT TRIGGER):-

A circuit which converts a irregular shaped waveform to a square wave or pulse is called a Schmitt trigger
or squaring circuit. The input voltage Vin triggers the output Vo every time it exceeds certain voltage levels
called upper threshold voltage VUT and lower threshold voltage VLT. The threshold voltages are obtained by
using the voltage divider. A comparator with positive feedback is said to exhibit hysteresis, a dead band
condition. The hysteresis voltage is the difference between

VUT & VLT.

There are two types of Schmitt trigger based on where the irregular wave is given. They are,
Inverting & non-inverting Schmitt trigger. Schmitt trigger finds application in wave shaping circuits. The
 SIR MVIT

other name given to Schmitt trigger is regenerativecomparator.

DESIGN PROCEDURE:-
1. Select the desire value of Vut & Vlt with same magnitude & opposite polarity.
Let Vut = 1V & Vlt = -1V.

2. For Op-amp 741C ± Vsat ≡ ±13V to ± 14V. And assume Vref = 0, Since the another end of R1 is grounded.

3. if Vo = +Vsat the voltage at the positive terminal will be (voltage from potential divider R1 & R2).

Vut = Vref + R1 (Vsat - Vref )

R1 R2
Therefore Vref = 0.

Vut = R1 (+ Vsat).
R1 R2

R1
4. Similarly Vlt will be Vlt = ( ) – Vsat.
R1 R2
5. Sub Vut & assume R1 or R2 & find the other component value.

R1
1V = (13)
R1 R2
R1 + R2 = 13R1
R2 = 12R1 if R1 = 10K then R2 = 120K ≡100K.

6. Calculate ROM by

ROM = R1 // R2 = R1R2 (10K )(100K ) .

R1 R2 110K
K
1000
ROM = ≡ 10KΩ. & select RL = 10KΩ (Assumption)
110K
7. Calculate hystersis voltage Vhy = Vut – Vlt

R1
= [+Vsat – (-Vsat)]
R1 R2
K
10
= [26V] Since Vsat = 13V
 SIR MVIT

110K
= 0.0909 [26V]
Vhy = 2.363V

PROCEDURE:
1. Design the value of circuit components and select VUT & VLT as given in the design procedure.

2. Connect the circuit as shown in the circuit diagram.

3. Apply the input signal to the input terminal of op-amp & set VUT & VLT values.

4. Note down the readings from the output waveform.

5. Plot the graph & show the relationship between Input sine wave & Output square wave.

RESULT:
Thus the Schmitt trigger are designed and tested using op-amp IC 741.
 SIR MVIT

Half Wave Rectifier using RC Triggering Circuit diagram:-

Waveforms:-

Graph: -

Experiment No: 9 DATE: / /

RC Triggering Circuit – HWR & FWR

AIM: -
To study the performance & waveforms of HWR & FWR by using RC triggering Circuit

APPARATUS REQUIRED: -

Transformer, SCR – TY604, BY127, Resistor, Capacitor, Ammeter, Voltmeter

PROCEDURE: -
Half Wave Rectifier
1. Connections are made as shown in the circuit diagram
2. By varying a resistance R gradually in step by step, note down the corresponding
 SIR MVIT

values of Vn & Vm from CRO and Vodc from the DC voltmeter. The readings are
tabulated in the tabular column.
3. If the firing angle ranges from 0 to 90O, then the firing angle α is
-1 ⎛ Vn ⎞
calculated by using a formula α = sin ⎜ V ⎟ in degrees.
⎝ m ⎠
4. The conduction angle β is calculated by using a formula, β = 180 - α.
5. The current and power is calculated by

Iodc = Vodc V2
A & Podc = odc
Watts respectively.
R
R
6. A graph of Vo v/s α, Vo v/s β, Io v/s α, Io v/s β, Podc v/s α, Podc v/s β are to be plotted.
7. Compare practical output voltage with theoretical output voltage,

Voth = Vm (1 + cosα) where Vm = 2Vrms

volts 2π

Full Wave
Rectifier
1. Repeat the above said procedure for full wave rectifier.

Voth = Vm (1 + cosα) volts where Vm = 2Vrms

π
 SIR MVIT

Full Wave Rectifier using RC Triggering

Circuit diagram:-

Waveforms:-
 SIR MVIT

Tabular Columns:- Half Wave Rectifier

Sl. No. V Vm (α<90O) (α>90O) Vodc Voth

n
α = sin-1 ⎛ Vn ⎞ α = 180 − sin-1 ⎛ Vn ⎞
⎜ ⎟ ⎜ ⎟
⎝ Vm ⎠ ⎝ Vm ⎠

Full Wave Rectifier

(α<90O) (α>90O)
Sl. No. V Vm α = sin ⎛ Vn ⎞
-1
α = 180 − sin-1 ⎛ Vn ⎞ Vodc Voth
n ⎜ ⎟ ⎜ ⎟
⎝ Vm ⎠ ⎝ Vm ⎠

Viva Questions: -
1. Explain the working operation of the circuit?
2. What are the limitations of R triggering circuit?
3. What are the limitations of RC triggering circuit?
4. Mention different methods of triggering SCR?
5. Why gate triggering is preferred?
SIR MVIT
SIR MVIT
SIR MVIT
 SIR MVIT

PRECISION RECTIFIER USING OP-AMP

EXP.No.10
AIM

To design and set up precision rectifier using op-amp and check its performance.

EQUIPMENT AND COMPONENTS REQUIRED

Dual power supply, CRO, function generator, bread board, op-amp, diodes, and resistors.

THEORY

In a normal diode rectifier, the cut in voltage across the diode will result in reduction
of output voltage and inaccuracy of rectification. If ideal rectifier is needed in an application,
a precision rectifier as shown Fig. 1 may be used.

In the circuit, when the input is greater than zero, D 1 will conduct and D2 is OFF, so the
output is zero because the other end of R 2 is connected to the virtual ground and there is no
current through R2. When the input is less than zero, D2 is on, and D1 is off, and the output is

Fig 1. Circuit diagram of Precision Rectifier

similar to that of an inverting amplifier with gain − R2 .

R1

The value of R1 and R2 are selected in such a way that the circuit has reasonable level of
input impedance and the gain is unity. Diode D1 and D2 are signal diodes.
 SIR MVIT

PROCEDURE

1. Set up the circuit as shown in figure. Give a sine wave of ±5V peak magnitude and 1 kHz
frequency at the input and observe the input and output simultaneously on CRO.

2. Put the CRO into X-Y mode and connect input signal to X and output signal to Y. Select
suitable volt per division in both channels and observe the characteristics. The display
should look similar to Fig 3.

R
2

R1

Fig. 2. Input and output waveforms Fig. 3. Transfer characteristics

 SIR MVIT

PRECISION RECTIFIER
AIM:

To construct precision half wave rectifier and full wave rectifier using Op Amp.

APPARATUS REQUIRED:
1.Resi

stor

2.IC

741

3.AFO

4.Diode IN

4001

5.Connecting

wires 6.CRO

7.Bread board

THEORY:
The major limitation of ordinary diodes is that it cannot rectify voltage below
0.6v,the cutin voltage of the diode.The precision rectifier, which is also known as a super
diode, is a configuration obtained with an operational amplifier in order to have a circuit
behaving like an ideal diode and rectifier.It can be useful for high-precision signal
processing.

HALF WAVE RECTIFIER:

A half-wave rectifier is an electronic circuit. The rectifier circuit takes alternating
current (AC) from the wall outlet and converts it into a positive direct current (DC) output.
The particular electronic device that accomplishes this task is a semiconductor called a diode.
The diode like all semiconductors is a material which has a resistance in between that of a
conductor or wire and an insulator like that of a plastic.
 SIR MVIT

CIRCUIT DIAGRAM:

2 +12V D1 IN4001

3 6

4
AFO
‐12V R

TABULATION:

INPUT OUTPUT FREQUENCY

Amplitude Time Amplitude Time

ON OF
F

MODEL GRAPH:
Input waveform: Output waveform:
 SIR MVIT

FULL WAVE RECTIFIER:

A Full Wave Rectifier is a circuit, which converts an ac voltage into a pulsating dc

voltage using both half cycles of the applied ac voltage. It uses two diodes of which one
conducts during one half cycle while the other conducts during the other half cycle of the
applied ac voltage.

During the positive half cycle of the input voltage, diode D1 becomes forward biased
and D2 becomes reverse biased. Hence D1 conducts and D2 remains OFF. The load current
flows through D1 and the voltage drop across RL will be equal to the input voltage. During
the negative half cycle of the input voltage, diode D1 becomes reverse biased and D2
becomes forward biased. Hence D1 remains OFF and D2 conducts. The load current flows
through D2 and the voltage drop across RL will be equal to the input voltage.

CIRCUIT DIAGRAM:

TABULATION:

INPUT OUTPUT FREQUENCY

Amplitude Time Amplitude Time

ON OF
F

MODEL GRAPH:
Input waveform: Output waveform:
 SIR MVIT

PROCEDU E:
R
1. Conne ct the circuit as shown in the figures for Half wave and Full wave
rectifier.

2. Set the input signal voltage using AFO.

3. Observe the output waveform in CRO and measure the output parameters.

RESULT:
Thus the half wave rectifier and full wave rectifier are constructed and the
output waveforms are drawn.
 SIR MVIT

RC PHASE SHIFT OSCILLATOR AND WEIN BRIDGE OSCILLATOR

EXP.No.11
AIM:

To design ,construct and test the RC Phase Shift

Oscillator and Wein Bridge Oscillator

APPARATUS REQUIRED:
1. Op AmpIC741

2. Dual power

supply

3.Resistors

4.Capacitors

5.Diode IN 4001

6.CRO

7. Bread board

8.Connecting

wires

THEORY:
An oscillator is a circuit, which generates ac output signal without giving any input ac
signal. This circuit is usually applied for audio frequencies only. The basic requirement for an
oscillator is positive feedback.

An oscillator consists of an amplifier and a feedback network.

1) 'Active device' i.e. Op Amp is used as an amplifier.
2) Passive components such as R-C or L-C combinations are used as feed
back net work.

To start the oscillation with the constant amplitude, positive feedback is not the only
sufficient condition. Oscillator circuit must satisfy the following two conditions
known as Barkhausen conditions:

i. The first condition is that the magnitude of the loop gain (Aβ)
= 1 A = Amplifier gain and β = Feedback gain.
ii. The second condition is that the phase shift around the loop must be 360° or 0°.
 SIR MVIT

RC PHASE SHIFT OSCILLATOR:

Phase-shift oscillator is a simple electronic oscillator. It contains an inverting

amplifier, and a feedback filter which 'shifts' the phase of the amplifier output by 180 degrees
at the oscillation frequency.The filter produces a phase shift that increases with frequency. It
must have a maximum phase shift of considerably greater than 180° at high frequencies, so
that the phase shift at the desired oscillation frequency is 180°.

The most common way of achieving this kind of filter is using three identical cascaded
resistor- capacitor filters, which together produce a phase shift of zero at low frequencies, and
270 degrees at high frequencies. At the oscillation frequency each filter produces a phase
shift of 60 degrees and the whole filter circuit produces a phase shift of 180 degrees.

DESIGN:

f0 = 1
62RC
Rf ≥

29R1

R1 ≥

10R

Choose C

= .1µF f0 =

500 Hz

R= 1 = 1
62f0C 62x500x0.1x106

R = 1.3 KΩ

Choose R = 1.5KΩ

R1≥15KΩ (to prevent

loading) Therefore,

R1 = 10R = 15KΩ

Rf = 29R1=29x15KΩ=435KΩ (Use 1MΩpot)

 SIR MVIT

CIRCUIT DIAGRAM:
Rf

R1 2 7
IC741

3 6 V

Rcomp

C C C

R R R

Values:
R=
1.5KΩ
C=0.1µ
F Rf =
1MΩ
R1 = Rcomp = 15KΩ

TABULATION:

INPUT OUTPUT

Amplitude Time Frequency Amplitude Time Frequency

Period Period
 SIR MVIT

MODEL GRAPH:
Output waveform:

PROCEDURE:
RC PHASE SHIFT OSCILLATOR:

1. Design the circuit for f0=500Hz.calculate R1,R2,and Rf

2. connect the circuit as shown in the figure with the designed

values. 3.Switch on the power supply and observw the

waveform.

4.Note down the amplitude and time

period. 5.Plot the waveforms on a graph

sheet.

WEIN BRIDGE OSCILLATOR

A Wien bridge oscillator is a type of electronic oscillator that generates sine waves. It
can generate a large range of frequencies. The frequency of oscillation is given by:

The Wien Bridge Oscillator uses a feedback circuit consisting of a series RC circuit
connected with a parallel RC of the same component values producing a phase delay or phase
advance circuit depending upon the frequency. At the resonant frequency ƒr the phase shift is
0o.Then for oscillations to occur in a Wien Bridge Oscillator circuit the following conditions
must apply.:

1. With no input signal the Wien Bridge Oscillator produces output oscillations.

2. The Wien Bridge Oscillator can produce a large range of frequencies.

3. The Voltage gain of the amplifier must be at least 3.

 SIR MVIT

4. The network can be used with a Non-inverting amplifier.

5. The input resistance of the amplifier must be high compared to R so that the RC
network is not overloaded and alter the required conditions.

6. The output resistance of the amplifier must be low so that the effect of external
loading is minimised.

7. Some method of stabilizing the amplitude of the oscillations must be provided

because if the voltage gain of the amplifier is too small the desired oscillation will decay and
stop and if it is too large the output amplitude rises to the value of the supply rails, which
saturates the op-amp and causes the output waveform to become distorted.

8. With amplitude stabilisation in the form of feedback diodes, oscillations from the
oscillator can go on indefinitely.

DESIGN:

1
f0 
2πRC

A =1+Rf =3
V
R
i

R f= 2
Ri

Rf =2Ri

Let c = 0.047µF, f0 = 1KHz

R= 1
2πf0 C = 3.2KΩ

Let Ri = 10KΩ

Rf = 2Ri = 20KΩ (use 20K pot)

 SIR MVIT

CIRCUIT DIAGRAM:
Rf

2 7
IC741

3 6 V0

Ri 4

R C

R C

Values:

R =
3.3KΩ
C=0.04
7µF Rf
= 20KΩ
R1 =
10KΩ

TABULATION:

INPUT OUTPUT

Amplitude Time Frequency Amplitude Time Frequency

Period Period
 SIR MVIT

MODEL GRAPH:
Output waveform:

PROCEDURE:
WEIN BRIDGE OSCILLATOR:

1.Design the circuit for f0=1KHz.calculate R C Rf and Ri

2.co ect the circuit shown in figure with designed

nn as the the values.

3.Switch on the power supply and observe the

waveform. 4.Note down the amplitude and time

period.

5.Plot the waveforms on a graph sheet.

RESULT:
Thus the RC Phase Shift oscillator and Wein Bridge oscillator are designed
and constructed.

(i) RC phase shift oscillator F0=

(ii) Wein Bridge oscillator F0=

 SIR MVIT

Post Lab Questions:

1. Explain how the clipping is eliminated in wien bridge oscillator

2. Draw the basic structure of a feedback oscillator.
3. What is the frequency range of LC oscillators
4. For sustained oscillations, what is the gain of the RC phase shift oscillator?
5. Design a phase shift oscillator to oscillate at 100Hz
 SIR MVIT

RC PHASE OSCILLATOR
AIM :
To design an RC Phase Shift oscillator using op-amp for a given frequency of
1kHz.

THEORY

An oscillator is a circuit that produces a periodic waveform on its output with

only the dc supply voltage as a required input. A repetitive input signal is not
required but is sometimes used to synchronize oscillations. The output voltage can
be either sinusoidal or non-sinusoidal, depending on the type of oscillator. Two
major classifications for oscillators are feedback oscillator and relaxation oscillators.

Conditions for oscillation

1. The phase shift around the feedback loop must be effectively

zero degrees.
2. The voltage gain, ACL around the feedback loop (loop gain) must
equal to (or greater than) one.

The voltage gain around the closed feedback loop, ACL, is the
product of the amplifier gain, Av, and the attenuation, B of the feedback
circuit.

ACL=
Av B

RC phase-shift oscillator is a linear electronic oscillator circuit that produces a

sine wave output. It consists of an inverting amplifier element such as a transistor or
op-amp with its output fed back to its input through a phase-shift network consisting
of resistors and capacitors in a ladder network. Each of the three RC networks in the
feedback loop can provide a maximum phase shift approaching 90 degrees.
Oscillation occurs at the frequency where the total phase shift through the three RC
network is 180 degrees. Inversion output at the output of op-amp itself produces the
additional 180 degree to meet the requirement for oscillation of 360 degrees (or zero
degree) phase shift around the feedback loop.

DESIGN
The attenuation B of the three section RC feedback network is B = 1
29

To meet the greater than unity loop gain requirement, the closed loop voltage gain of
op-amp must be greater than 29.

1
Given frequency, f = 1 kHz. We have f =
2 RC 6
 SIR MVIT

Let R1 = R2 = R3=R and C1 = C2 = C3= C

 SIR MVIT

Assume C =
Rf 220 kΩ
0.01μF.

1
R= R1
2 f C 6 +12V
6.8 kΩ
= 1 - 7
2
2π ×103 × 0.01×10−6 × 6 6
= 6.5 kΩ LM 741

3 + 4
Vo
-12V
Select nearest value of 6.8 kΩ for R
Rf = ACL
C1 C2 0.01μF C3 0.01μF
× R1
0.01μF
= 29 × 6.8×103 = 197.2
kΩ R2 R3
6.8 kΩ 6.8 kΩ
 SIR MVIT

Select nearest value of 220 kΩ for Rf

PROCEDURE:

On a bread board, set up the circuit as shown in the figure. Obtain the sine wave at the
output. Check for the frequency obtained.

EXPECTED OUTPUT

RESULT

An RC phase shift oscillator was designed for a frequency of

1kHz. The observed frequency is kHz