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CCE 131-Lecture 4

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5 views

CCE 131-Lecture 4

Uploaded by

Ahmed Gamal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Computer Organization

CCE131
Lecture 4

8051 Microcontroller-1

Dr. Emad Badry


Lecturer at faculty of Engineering, Suez Canal University
[email protected]
Microcontroller vs. General- Purpose Microprocessor

❑ General-purpose microprocessors Must add RAM, ROM, I/O ports, and timers externally to make them functional
Make the system bulkier and much more expensive. Have the advantage of versatility on the amount of RAM, ROM,
and I/O ports.

❑ For Microcontroller, the fixed amount of on-chip ROM,


RAM, and number of I/O ports makes them ideal for many
applications in which cost and space are critical. In many
applications, the space it takes, the power it consumes, and
the price per unit are much more critical considerations than
the computing power.
Criteria for Choosing a Microcontroller
Meeting the computing needs of the task at hand efficiently and cost effectively
• Speed
• Packaging
• Power consumption
• The amount of RAM and ROM on chip
• The number of I/O pins and the timer on chip
• How easy to upgrade to higher-performance or lower power-consumption versions
• Cost per unit
• Availability of software development tools, such as compilers, assemblers, and debuggers.
• Wide availability and reliable sources of the microcontroller
The 8051 family has the largest number of diversified (multiple source) suppliers
➢ Intel (original)
➢ Atmel
➢ Philips/Signetics
➢ AMD
➢ Infineon (formerly Siemens)
➢ Matra
➢ Dallas Semiconductor/Maxim
8051 Families

Intel introduced 8051, referred as MCS-51, in 1981. The 8051 is an 8-bit processor
The 8051 had
➢ 128 bytes of RAM
➢ 4K bytes of on-chip ROM
➢ Two timers
➢ One serial port
➢ Four I/O ports, each 8 bits wide
➢ 6 interrupt sources

The 8051 became widely popular after allowing other manufactures to make and market any flavor of the 8051, but remaining
code-compatible.
Hardware Connection

❑ 8051 family members Have 40 pins dedicated for various functions such as I/O, -RD, -WR, address, data, and interrupts.
Come in different packages such as DIP(dual in-line package), QFP(quad flat package).

DIP QFP

❑ Some companies provide a 20-pin version of the 8051 with a reduced number of I/O
ports for less demanding applications
❑ The 8051 has an on-chip oscillator but requires an external clock to run it. A quartz crystal oscillator is connected to inputs
XTAL1 (pin19) and XTAL2 (pin18). The quartz crystal oscillator also needs two capacitors of 30 pF value.

If you use a frequency source other than a crystal oscillator, such as a TTL oscillator, it will be connected to XTAL1
while XTAL2 is left unconnected.
❑ RESET pin is an input and is active high (normally low). Upon applying a high pulse to this pin, the microcontroller
will reset and terminate all activities. This is often referred to as a power-on reset

❑ In order for the RESET input to be effective, it must have a


minimum duration of 2 machine cycles. In other words, the high
pulse must be high for a minimum of 2 machine cycles before it
is allowed to go low.
EA, “external access’’, is an input pin and must be connected to Vcc or GND. For the 8051 family members all
come with on-chip ROM to store programs, -EA pin is connected to Vcc. For the 8031 and 8032 family members
do no have on-chip ROM, so code is stored on an external ROM and is fetched by 8031/32. In this case, -EA pin
must be connected to GND to indicate that the code is stored externally.
❑ The four 8-bit I/O ports P0, P1, P2 and P3 each uses 8 pins.
All the ports upon RESET are configured as output, ready to be used as input ports
Port 0 is also designated as AD0-AD7, allowing it to be used for both address and data, when connecting an 8051/31 to an
external memory, port 0 provides both address and data. The 8051 multiplexes address and data through port 0 to save
pins.
ALE indicates if P0 has address or data
▪ When ALE=0, it provides data D0-D7
▪ When ALE=1, it has address A0-A7
P0
It can be used for input or output, each pin must be connected externally
to a 10K ohm pull-up resistor, this is due to the fact that P0 is an open
drain, unlike P1, P2, and P3
P2
In 8051-based systems with no external memory connection, both P1 and P2 are used as simple I/O. In 8031/51-based
systems with external memory connections, Port 2 must be used along with P0 to provide the 16-bit address for the external
memory.
➢ P0 provides the lower 8 bits via A0 – A7
➢ P2 is used for the upper 8 bits of the 16-bit address, designated as A8 – A15, and it cannot be used for I/O
P3
Port 3 can be used as input or output and does not need any pull-up resistors. Port 3 has the additional function of providing
some extremely important signals.
Registers

❑ The vast majority of 8051 register are 8-bit registers. The 8 bits of a register are shown from MSB D7 to the LSB D0.
With an 8-bit data type, any data larger than 8 bits must be broken into 8-bit chunks before it is processed.

The most widely used registers:


• A (Accumulator)
➢ For all arithmetic and logic instructions
• B, R0, R1, R2, R3, R4, R5, R6, R7
• DPTR (data pointer), and PC (program counter)
PSW (program status word) register
❑ The PSW register is an 8-bit register. It is also referred to as the flag register. Although the PSW register is 8 bits wide,
only 6 bits of it are used by the 8051. The two unused bits are user-definable flags.
ROM Memory Map in 8051 Family

❑ No member of 8051 family can access more than 64K bytes of opcode because the PC is 16-bit register.
Register banks and stack

There are 128 bytes of RAM in the 8051. Assigned addresses 00 to 7FH
The 128 bytes are divided into three different groups as follows:
1) A total of 32 bytes from locations 00 to 1F hex are set aside for register banks and the stack.
2) A total of 16 bytes from locations 20H to 2FH are set aside for bit-addressable read/write memory.
3) A total of 80 bytes from locations 30H to 7FH are used for read and write storage, called scratch pad
We can switch to other banks by use of the PSW register. Bits D4 and D3 of the PSW are used to select the desired
register bank. Use the bit-addressable instructions SETB and CLR to access PSW.4 and PSW.3
Register banks and stack

Bank 1 uses the same RAM space as the stack.


The register used to access the stack is called the SP (stack pointer) register.

❑ The storing of a CPU register in the stack is called a PUSH. SP is


pointing to the last used location of the stack. As we push data onto the
stack, the SP is incremented by one.

❑ Loading the contents of the stack back into a CPU register is called a POP.
With every pop, the top byte of the stack is copied to the register specified
by the instruction and the stack pointer is decremented once.
Example

Example
Structure of Assembly Language

❑ An Assembly language program consist of a series of lines of Assembly language instructions


❑ It deals directly with the internal structure of the CPU.
❑ a mnemonic : the commands to the CPU, telling it what those to do with those items. optionally followed by one or
two operands the data items being manipulated.

A given Assembly language program is a series of statements, or lines

➢ Assembly language instructions Tell the CPU what to do


➢ Directives (or pseudo-instructions) Give directions to the assembler
Assembler Directives
ORG (origin)
The ORG directive is used to indicate the beginning of the address. The number that comes after ORG can be either in
hex and decimal.

END
This indicates to the assembler the end of the source (asm) file. The END directive is the last line of an 8051 program.

EQU (equate)
This is used to define a constant without occupying a memory location.
DB
The DB directive is the most widely used data directive in the assembler. It is used to define the 8-bit data. When DB is used
to define data, the numbers can be in decimal, binary, hex, ASCII formats.

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