Abstract:

The experiment is about the study of a single-stage bipolar junction transistor (BJT)-based common emitter
amplifier circuit. Different values of the load resistor will be used to observe the input and output voltage. The
voltage gain will then be calculated under different load conditions. The process will be conducted both
experimentally and in simulation.

Theory:
The aim of the AC analysis is to determine the Q point of a common emitter configuration which will ensure an
undistorted amplification of a signal. In this regard, a DC analysis will be performed to adjust Q at a suitable
location on the characteristic curve. After performing the DC analysis, the small signal parameters will be
calculated depending on the model being used. Gain dependency on the load resistors will also be observed.
The most common circuit configuration for an NPN transistor is that of the Common Emitter (CE) amplifier and
a family of curves known commonly as the output characteristics curves, which relate the collector current (IC),
to the output or collector voltage (VCE), for different values of base current (IB). All types of transistor amplifiers
operate using AC signal inputs which alternate between a positive value and a negative value. Presetting the
amplifier circuit to operate between these two maximum or peak values is achieved using a process known as
biasing. Biasing is very important in amplifier design as it establishes the correct operating point of the transistor
amplifier ready to receive signals, thereby reducing any distortion to the output signal.
The single-stage common emitter amplifier circuit shown in Fig. 1 uses a ‘Voltage Divider Biasing’ circuit. The
base voltage (VB) can be easily calculated using the simple voltage divider formula as in equation (1) from Fig. 1.
𝑅2
𝑉𝐵 = 𝑉𝐶𝐶 (1)
𝑅1 + 𝑅2

Thus, the base voltage is fixed by biasing and independent of the base current provided the current in the divider
circuit is large compared to the base current. Assuming IB ≈0, one can do the approximate analysis of the voltage
divider network without using the transistor gain, β in the calculation. Note that the approximate approach can be
applied with a high degree of accuracy when the following condition is satisfied: βRE ≥ 10R2.

Figure 1: Circuit diagram of an npn transistor-based common emitter amplifier.

Coupling and Bypass Capacitors

In CE amplifier circuits, capacitors C1 and C2 are used as coupling capacitors to separate the AC signals from the
DC biasing voltage. The capacitors will only pass AC signals and block any DC component. Thus, they allow the
coupling of the AC signal into an amplifier stage without disturbing its Q point. The output AC signal is then
superimposed on the biasing of the following stages. Also, a bypass capacitor, CE is included in the emitter
terminal. This capacitor is an open circuit component for DC bias, meaning that the biasing currents and voltages
are not affected by the addition of the capacitor maintaining good Q-point stability. However, this bypass
capacitor acts as a short circuit path across the emitter resistor at high frequency signals increasing the voltage
gain to its maximum. Generally, the value of the bypass capacitor, CE is chosen to provide a reactance of at most,
1/10th the value of RE at the lowest operating signal frequency.

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Amplifier Operation
Once the Q-point is fixed through DC bias, an AC signal is applied at the input using coupling capacitor C1.
During the positive half cycle of the signal, VBE increases leading to increased IB. Therefore, IC increases by β
times leading to a decrease in the output voltage, VCE. Thus, the CE amplifier produces an amplified output with
a phase reversal. The voltage gain of the common emitter amplifier is equal to the ratio of the change in the output
voltage to the change in the input voltage. Thus, the voltage gain expression can be written as,
𝑉 ∆𝑉
𝐴 𝑣 = 𝑉𝑜𝑢𝑡 = 𝐶𝐸
𝑖𝑛 ∆𝑉𝐵𝐸

The input (Zi) and output (Zo) impedances of the circuit can be computed for the case when the emitter resistor,
RE is completely bypassed by the capacitor, CE.
𝑍𝑖 = 𝑅1 ∥ 𝑅2 ∥ 𝛽𝑟𝑒 and 𝑍𝑜 = 𝑅𝐶 ∥ 𝑟𝑜
Where, re (26mV/IE) and ro are the emitter diode resistance and output dynamic resistance (can be determined
from output characteristics of the transistor). Usually ro ≥ 10RC, thus, the gain can be approximated as,
𝑉𝑜𝑢𝑡 𝐼𝐶𝑍𝑜 𝛽𝐼𝐵𝑅𝐶 ∥ 𝑟𝑜 𝑅𝐶
𝐴𝑣 = 𝑉 = − =− =−
𝑖𝑛 𝐼𝐵𝑍𝑖 𝐼𝐵𝛽𝑟𝑒 𝑟𝑒

The negative sign accounts for the phase reversal at the output. In the circuit diagram, the emitter resistor is split
into two to reduce the gain to avoid distortion. So, the expression for gain is modified as,
𝑉𝑜𝑢𝑡 𝑅𝐶
𝐴 = =−
If the BJT is in the active mode, the following typical values can be observed-
𝑉𝐵𝐸 = 0.7 V and 𝐼𝐶 = 𝛽𝐼𝐵
The collector resistance, RC is used to adjust the collector voltage, VC. Finally, the emitter resistance, RE is used
to stabilize the DC biasing point (operating point or quiescent point or Q-point). Using the above equations, the
stability of biasing points for different transistors of β can be calculated.

Apparatus:
SL# Apparatus Quantity
1 BJT (2N2222, C828, BD135) 1 each
Resistance (R = 6.8 k RL,POT = 0-100 k RC
2 = 470  RE = 560  R = 33 k RB2 = 3.3 k) 1 each

3 Capacitor (10 F and 100 F) 2+1

4 Project Board 1
5 Signal Generator and DC Power Supply 1+1
6 Oscilloscope and Probes 1+2
7 Multimeter 1
8 Connecting Leads 10

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Precaution:
The following is a list of some of the special safety precautions that should be taken into consideration when
working with transistors:
1. Transistors should never be removed or inserted into a circuit while voltage is applied.
2. A replacement transistor should always be placed in the correct orientation within the circuit.
3. Damage to transistors can occur due to electrical overloads, heat, humidity, or radiation. This damage is
often caused by incorrect polarity voltage being applied to the collector circuit or excessive voltage to the
input circuit.
4. Electrostatic discharge (ESD) from the human body is one of the most frequent causes of transistor
damage during handling.
5. The maximum voltage and current ratings specified for the transistor should not be exceeded.
6. Components or their properties should only be changed after the power has been turned off or the
simulation has been stopped.

Experimental Procedures:
1. The actual values of the base, emitter, and collector resistors should be measured.
2. The terminals of the transistor should be identified, and the value of Beta (β) should be measured.
3. The circuit should be connected, and the microammeter and milliammeter should be connected as shown in Fig. 3.
4. A multimeter in voltmeter mode should be connected to measure the base resistance voltage (VB) and the input
voltage (VBE).
5. The DC power supply should be turned on with the voltage control knob set to 0 V, and the collector supply voltage
(VCC) should then be set to 15 V.
6. The 500 kΩ potentiometer should be adjusted until the collector-to-emitter voltage (VCE) is approximately equal to
half of the collector supply voltage (VCC), that is, VCE = VCC/2.
7. The collector-to-emitter voltage (VCE), base-to-emitter voltage (VBE), base current (IB), emitter current (IE), and
collector current (IC) should be measured. The base current (IB) should be calculated from the collector current (IC)
using the value of β. The measured values should be recorded in Table 1.
8. A sinusoidal AC signal of 1 kHz with a peak value of 10 mV should be fed into the input as shown in Fig. 3.
9. The input and output signals should be observed on the oscilloscope screen in DUAL mode.
10. The input signal should be increased until distortion begins to appear in the output waveform. This input signal
should be measured as the maximum input signal that the amplifier can handle without distortion.
11. An AC signal with an amplitude less than the maximum signal-handling capacity of the amplifier should be fed into
the input. The input signal frequency should be fixed at 1 kHz. The input and output voltage waveforms should be
drawn, and the voltage gain (AV) should be calculated.
12. A potentiometer (0-100 kΩ) should be connected as the load resistor, and the potentiometer knob should be varied.
The output voltages should be measured for each case and recorded in Table 2. The voltage gain (AV) of the
amplifier should also be determined for each case.
13. The voltage gain (AV) of the amplifier circuit for each case should be computed in decibels using the formula
(𝐴𝑉,𝑑𝐵 = 20𝑙𝑜𝑔10 𝐴𝑉).
14. Images of the hardware, simulation circuit diagrams, and various waveforms should be recorded.
15. The DC power supply, function generator, and oscilloscope should be turned off.This ensures a passive tone
throughout.

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 Circuit Diagram:

RB
500kΩ 50 %
Key=A
RC
C2

R 10µF
C1
VCC RL
Q 3.6 %
100kΩ
10µF Key=A

Vs
10mVpk RB2
1kHz CE
0° RE 100µF

Figure 2: Circuit diagram for the study of CE BJT amplifier circuit

Table 1 Measured data of the voltage divider bias circuit, operating point, and transistor parameter :

VCC β VCE VBE IB IC IE VRE VRC

15 270 7.33 0.61 0.097 7.5744 7.672 4.22 3.53

Table 2 Measured data of the voltage gain of the amplifier circuit against the load resistances :

Gain,
Load Resistor, Input voltage, Output Voltage, 𝑉𝑜𝑢𝑡 Gain in dB
RL (k) Vi (mV) Vo (V) 𝐴𝑣 = 𝐴𝑉,𝑑𝐵 = 20𝑙𝑜𝑔𝐴𝑉
𝑉𝑖𝑛 10

1 165 3.6 0.021818 -33.223

165 3.9 0.023636 -32.5285

3.3
165 4.6 0.027878 -31.09476
4.7
165 4.8 0.029090 -30.7251
5.6
165 5.1 0.03090 -30.2008
8.2

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 Simulation:

Fig: DC part of study of CE BJT

Fig: When the resistor is 1 kΩ

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Fig: When resistor is 3.3 kΩ

Fig: When resistor is 4.7 kΩ

Fig: When resistor is 5.6 kΩ

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 Fig: When resistor is 8.2 kΩ

Simulated Data Table:

Table 3 Measured data of the voltage divider bias circuit, operating point, and transistor parameter :

VCC β VCE VBE IB IC IE VRE VRC

15 270 7.83 0.66 0.097 6.95 6.96 3.90 3.26

Table 4 Measured data of the voltage gain of the amplifier circuit against the load resistances :

Gain,
Load Resistor, Input voltage, Output Voltage, 𝑉𝑜𝑢𝑡 Gain in dB
RL (k) Vi (mV) Vo (V) 𝐴𝑣 = 𝐴𝑉,𝑑𝐵 = 20𝑙𝑜𝑔𝐴𝑉
𝑉𝑖𝑛 10

1 10 0.7533 0.07533 -22.460

10 0.8959 0.08959 -20.9548

3.3
10 0.92572 0.09257 -20.670
4.7
10 0.93754 0.093754 -20.560
5.6
10 0.95777 0.09577 -20.375
8.2

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Discussion & Conclusion:
In this experiment, the operation of a single-stage bipolar junction transistor (BJT)-based common emitter
amplifier circuit was analyzed. It was observed that the output voltage increased as different load resistors were
applied. The same behavior was observed in the simulation where the output voltage showed a similar increase.
Furthermore the calculated voltage gain also increased in the experiment which was reflected in the simulation as
well. Additionally, the voltage gain of the amplifier circuits, expressed in decibels, demonstrated an increase in
both cases, indicating the stability of the voltage divider bias configuration.
References:
[1] Robert L. Boylestad, Louis Nashelsky, Electronic Devices and Circuit Theory, 9th Edition, 2007-2008
[2] Adel S. Sedra, Kenneth C. Smith, Microelectronic Circuits, Saunders College Publishing, 3rd ed.,
ISBN: 0-03- 051648-X, 1991.
[3] American International University–Bangladesh (AIUB) Electronic Devices Lab Manual.
[4] David J. Comer, Donald T. Comer, Fundamentals of Electronic Circuit Design, John Wiley & Sons
Canada, Ltd., ISBN: 0471410160, 2002.
[5] J. Keown, ORCAD PSpice and Circuit Analysis, Prentice Hall Press (2001)
[6] Resistor values: https://www.eleccircuit.com/how-to-basic-use-resistor/,

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