Object 1

Department of ELECTRONICS
Class : B. Sc. Second Year
Semester – III
Paper No. and Title : Paper –VI (Amplifiers)

Periods :45 Hours Max. Marks: 50 [ESE:40 & CA:10 ] Credits: 2

Sr. Month Name of the Topic Periods

No.
1. July 2024 Unit I: Transistor Biasing 12
DC load line, Q-point and maximum undistorted output, factors
affecting bias variations, stability factor, stability factor for CB
and CE circuits, base bias with emitter feedback, base bias with
collector feedback, voltage divider bias and related Numerical
Problems.
2. August 2024 Unit II: Signal Amplifiers 11
Introduction h-parameters, an equivalent circuit for BJT
transconductance model, analysis of C-E amplifier, C-B
amplifier and C-C amplifier using h-parameters and related
Numerical Problems.
3. September Unit III: Operational Amplifier 11
2024 Theory of differential amplifier, CMRR, constant current
replacement for R E , block diagram of Op-Amp, characteristics
of an ideal Op-Amp, concept of virtual ground, input offset
voltage, input offset current, input bias current, input and output
impedances of Op-Amp, slew rate, Op-Amp inverting amplifier,
Op-Amp non-inverting amplifier and related Numerical
Problems.
4. October Unit IV: Applications of Op-Amp 11
2025 Op-Amp as an adder, Op-Amp as subtractor, Op-Amp as
differentiator, Op-Amp as an integrator, Op-Amp as comparator,
Op-Amp as Schmitt’s trigger, solving of differential equations
using Op-Amp, voltage to current converter with floating load,
current to voltage converter and related Numerical Problems.
5. Total 45
 Unit I: Transistor Biasing

Transistors are one of the most widely used semiconductor devices which are used
for a wide variety of applications, including amplification and switching. However, to
achieve these functions satisfactorily, a transistor must be supplied with a certain
amount of current and/or voltage.

What is Transistor Biasing?

Transistor Biasing is the process of setting a transistor’s DC operating voltage or
current conditions to the correct level so that any AC input signal can be amplified
correctly by the transistor.

The process of setting these conditions for a transistor circuit is referred to as

transistor biasing. Transistor biasing can be accomplished by various techniques that
give rise to different kinds of biasing circuits.
However, all of these circuits are based on the principle of providing the right amount
of base current, IB, and, in turn, the collector current, IC from the supply voltage, VCC
when no signal is present at an input. Moreover, it is crucial to select the collector
resistor, RC, appropriately. This ensures the collector-emitter voltage, VCE, stays above
0.5V for germanium transistors and 1V for silicon transistors.
Transistor Biasing Definition: Transistor biasing is the process of setting the DC
operating voltage or current of a transistor to ensure proper function and
amplification of AC input signals.

Purpose of Biasing: Ensuring a transistor operates correctly, transistor biasing

adjusts current and voltage levels, vital for its performance in amplification and
switching roles.

Types of Biasing Circuits: Some common types include Fixed Base Bias,
Collector Feedback Bias, and Voltage Divider Bias, each offering different
stability and performance characteristics.

Stability Factors: The stability of a transistor’s operation in biasing circuits is

crucial, with some circuits like the Voltage Divider Bias providing high thermal
stability and reducing performance fluctuations due to temperature changes.

Configuration of Transistor
Any transistor circuit can be designed using three types of configuration. Three
configurations of the transistor are based on the connection of the transistor terminal.
The three types of transistor circuit configurations are:
•Common Emitter Transistor
•Common Base Transistor
•Common Collector Transistor(emitter follower).
Each of these three circuit configurations has its own characteristics curve. Based on
the requirement the type will be chosen for the circuit.

Common Emitter (CE) Configuration of Transistor

The configuration in which the Emitter terminal is taken as common terminal for
both input and output of the transistor. is known as a common emitter configuration.
The common emitter connection for both NPN and PNP transistors is as shown in the
following figure.

Common emitter configuration of NPN transistor

Input voltage VBE is applied between base and emitter terminals and output voltage
VCE is applied across emitter and collector. The output current I C is taken across the
emitter and collector terminals. The input side is forward biased and the output side is
reverse biased.
Emitter base region acts like forward biased diode and so the depletion region is very
small. Emitter collector region acts like reverse biased diode and the depletion region
is large. The input current IB is measured in µA because the base region is very lightly
doped.
 Common emitter configuration of PNP transistor
The input and output impedance are moderate in common emitter configuration and
thus the current and voltage gain is moderate and the power gain is high. So this
configuration is widely used for amplification.

Input Characteristics of Common Emitter Configuration:

Input characteristics are the relationship between the input current and the input
voltage keeping output voltage constant. Here, the input current is the base current I B,
input voltage is base emitter voltage VBEand the output voltage is collector emitter
voltage VCE.
First the output voltage VCEis kept at zero and the input voltage V BE is gradually
increased and the input current IB is noted. Then again the output voltage VCE is
increased like 10V, 20V and kept constant and by increasing the input voltage V BE,
the input current IB is noted.
From the results it is observed that when the input voltage V BE is increased initially
there is no current produced, further when it is increased the input current I B increases
steeply. When the output voltage VCEis further increased the curve shifts right side.
 Output Characteristics of Common Emitter Configuration:

Output characteristics is the relationship between the output current and the output
voltage keeping input current constant. Here the values of output current I C and the
output voltage VCE is noted keeping input current IB constant.
In active region when the output voltage is increased there is very slight change in the
output voltage. The curve looks almost flat in the active region. Cut off region is the
region where the input current is below zero. When both the junctions are forward
biased, it is in saturation region.

Q point or Operating Point

The point on a transistor's DC load line where the transistor is biased to operate for a
specific application is known as the Q point of the transistor (also known as the
operating point or bias point). The DC supply voltage and DC load resistance values
determine the Q point.

(Operating Point) / Q point →Quiescent Point

The term "quiescent point" refers to an electrical circuit's steady state of operation
when it is not being driven by an input signal. It is a crucial idea in circuit design
since it enables engineers to make sure the circuit functions correctly and dependably
under typical circumstances.
The Zero signal of IC and VCE of the transistor is known as the operating point. It is
called the operating point because the variations of IC and VCE take place at this point
when the signal is applied. It is also called quiescent (silent) point or Q-point because
it is the point on IC – VCE characteristic when the transistor is silent i.e., in the absence
of the signal.

Fig: Operating Point

The formula for calculating a device or circuit's Q point depends on the details and
properties of the object being studied. For instance, the following formula can be
used to find the Q-point in a transistor circuit:
Q = (VCC − VCE) / IC

Where IC - collector current at Q point

VCE - Collector-Emitter voltage at Q point
VCC - supply voltage

It's important to maintain a stable Q point in a transistor amplifier circuit to ensure

proper operation and prevent distortion or other problems. Careful design and
selection of components, as well as appropriate thermal management, can help to
minimize fluctuations in the Q point.

Concept of DC Load line

The DC load line of a transistor shows the relationship between the current and
voltage of the circuit under consideration for a given load. The load line method is
quite easy and is frequently used in the analysis of transistor applications.
 Fig: CE Configuration

Consider a common emitter transistor circuit shown in the figure above. Where no
signal is applied to its input. Therefore D.C. conditions prevail in the circuit.

Fig: output characteristics of CE transistor

The output characteristics of this circuit are shown in the figure above.
By Applying Kirchoff's voltage law to the collector circuit, we get

VCE = VCC − IC RC

IC = (−1 / RC) VCE + (VCC / RC)

y=mx+C

The equation (2) is in the form of y=mx+C which represents a straight line on the
output characteristics. This is known as the D.C. load line. It determines the curve
between VCE and IC points for any given RC. The two endpoints of the load line are
located below.
When the collector current IC = 0, collector-emitter voltage VCE is given by,
VCE=VCC

The first point B is (VCC,0)

When collector-emitter voltage VCE = 0, the collector current is given by,

IC=VCC / RC

The second point A is (0, VCCRC)

By joining those points A and B, the D.C load line is constructed as shown in the
above figure.