DG611/612/613

Vishay Siliconix

High-Speed, Low-Glitch D/CMOS Analog Switches

     

Fast Switching— tON: 12 ns
Improved Data Throughput
Fast Sample-and-Holds

Low Charge Injection:
2 pC
Minimal Switching Transients
Synchronous Demodulators

Wide Bandwidth: 500 MHz
Improved System Performance
Pixel-Rate Video Switching

5-V CMOS Logic Compatible
Easily Interfaced
Disk/Tape Drives

Low rDS(on): 18

Low Insertion Loss
DAC Deglitching

Low Quiescent Power : 1.2 nW
Minimal Power Consumption
Switched Capacitor Filters

Single Supply Operation
GaAs FET Drivers

Satellite Receivers

  

DG611 DG611
D1 IN1 NC IN2 D2
Key
IN1 1 16 IN2 3 2 1 20 19

D1 2 15 D2 S1 4 18 S2
S1 3 14 S2 5 17
V– V+
V– 4 Dual-In-Line 13 V+ 6 LCC 16
and SOIC NC NC
5 12 Top View
GND VL 7 15
Top View GND VL
S4 6 11 S3 8 14
S4 S3
D4 7 10 D3
9 10 11 12 13
IN4 8 9 IN3
D4 IN4 NC IN3 D3

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S-00399—Rev. G, 13-Sep-99 4-1
 DG613
D1 IN1 NC IN2 D
IN1 IN2 Key
1 16
D1 2 15 D2 4 S2
S1 3 14 S2
V– V+
V– Dual-In-Line V+
4 and SOIC 13 LCC
NC NC
GND VL Top View
5 Top View 12
GND VL
S4 6 11 S3
S4 S3
D4 7 10 D3

IN4 IN3 9 10 11 12 13
8 9
D4 IN4 NC IN3 D3
 DG611/612/613
Vishay Siliconix



Test Conditions A Suffix D Suffix
Unless Otherwise Specified –55 to 125_C –40 to 85_C
V = 15 V,
V+ V V–
V = –3 3V
P
Parameter S b l
Symbol VL = 5 V, VIN = 4 V, 1 Vf Tempb
T Typc
T Mind Maxd Mind Maxd Unit
U i
Analog Switch
Analog Signal Rangee VANALOG V– = –5 V, V+ = 12 V Full –5 7 –5 7 V
Room 18 45 45
Switch On-Resistance rDS(on)
Full 60 60
= IS = –1 mA, VD = 0 V W
Resistance
DrDS(on) Room 2
Match Bet Ch.
Room
0.001 –0.25 0.25 –0.25 0.25
Source Off Leakage IS(off) VS = 0 V, VD = 10 V
Hot –20 20 –20 20
Drain Off Room
0.001 –0.25 0.25 –0.25 0.25
ID(off) VS = 10 V, VD = 0 V nA
A
Leakage Current Hot –20 20 –20 20
Switch On Room
0.001 –0.4 0.4 –0.4 0.4
ID(on) VS = VD = 0 V
Leakage Current Hot –40 40 –40 40

Digital Control
Input Voltage High VIH Full 4 4
V
Input Voltage Low VIL Full 1 1
Room 0.005 –1 1 –1 1
Input Current IIN mA
Hot –20 20 –20 20
Input Capacitance CIN Room 5 pF

Dynamic Characteristics
Off State Input Capacitance CS(off) VS = 0 V Room 3
Off State Output Capacitance CD(off) VD = 0 V Room 2 pF
F
On State Input Capacitance CS(on) VS = VD = 0 V Room 10
Bandwidth BW RL = 50 W Room 500 MHz
Turn-On Timee tON RL = 300 W , CL = 3 pF,
p , VS =
2 V Room 12 25 25
Turn-Off Timee tOFF S T
See Testt Circuit,
Ci it Figure
Fi 2 Room 8 20 20
Room 19 35 35 ns
Turn-On Time tON RL = 300 W , CL = 75 pF Full 50 50
VS =
2 V
See Test Circuit, Figure 2 Room 16 25 25
Turn-Off Time tOFF
Full 35 35
Charge Injectione Q CL = 1 nF, VS= 0 V Room 4
pC
Ch. Injection Changee, g DQ CL = 1 nF, VS   3 V Room 3 4 4
RIN = 50 W , RL = 50 W
Off Isolatione OIRR Room 74
f = 5 MHz dB
Crosstalke XTALK RIN = 10 W , RL = 50 W , f = 5 MHz Room 87

Power Supplies
Positive Room 0.005 1 1
I+
Supply Curent Full 5 5
Negative Room –0.005 –1 –1
I–
Supply Current Full –5 –5
VIN = 0 V or 5 V mA
A
Room 0.005 1 1
Logic Supply Current IL
Full 5 5
Room –0.005 –1 –1
Ground Current IGND
Full –5 –5

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S-00399—Rev. G, 13-Sep-99 4-3
DG611/612/613
Vishay Siliconix

        

Test Conditions A Suffix D Suffix

Unless Otherwise Specified –55 to 125_C –40 to 85_C
V+ = 15 V, V– = –3 V
P
Parameter S b l
Symbol VL = 5 V, VIN = 4 V, 1 Vf Tempb
T Typc
T Mind Maxd Mind Maxd U i
Unit

Analog Switch
Analog Signal Rangee VANALOG Full 0 7 0 7 V
Switch On-Resistance rDS(on) IS = –1 mA, VD = 1 V Room 25 60 60 W

Dynamic Characteristics
Turn-On Timee tON RL = 300 W , CL = 3 pF,
p , VS = 2 V Room 15 30 30
ns
Turn-Off Timee tOFF S Test
See T t Circuit,
Ci it Figure
Fi 2 Room 10 25 25

Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. DQ =
Q at VS = 3 V – Q at VS = –3 V
.

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4-4 S-00399—Rev. G, 13-Sep-99
 DG611/612/613
Vishay Siliconix

       _    

rDS(on) vs. VD and Power Supply Voltages rDS(on) vs. VD and Temperature
400 400
IS = –1 mA V+ = 15 V
r DS(on)– Drain-Source On-Resistance (
)

r DS(on)– Drain-Source On-Resistance (
)

350 350 V– = –3 V
IS = –1 mA
V+ = 12 V
300 V– = –5 V 300
V+ = 5 V
250 V– = –5 V 250

200 V+ = 15 V 200
V– = –3 V
150 150
25_C
100 100

50 50 125_C
–55_C
0 0
–5 –4 –2 0 2 4 6 8 10 12 –4 –2 0 2 4 6 8 10 12
VD – Drain Voltage (V) VD – Drain Voltage (V)

Leakage Current vs. Analog Voltage Leakage Currents vs. Temperature

3 10 nA
V+ = 15 V
V– = –3 V 1 nA
2
I S, I D – Leakage Current (pA)

I S(off), I D(off)– Leakage (A)

1 100 pA
IS(off), ID(off) ID(on)
0
10 pA
IS(off), ID(off)
–1

1 pA
–2 ID(on)

–3 0.1 pA
–4 –2 0 2 4 6 8 10 –55 –25 0 25 50 75 100 125
VD or VS – Drain or Source Voltage (V) Temperature (_C)

Input Switching Threshold vs. VL Switching Times vs. Temperature

6 24
22
V+ = 15 V
5 V– = –3 V 20
V TH – Logic Input Voltage (V)

18 tON
4 16
Time (ns)

14 tOFF
3 12
10
2 8
6 V+ = 15 V
V– = –3 V
1 4 RL = 300

CL = 10 pF
2
0 0
0 5 10 15 –55 –35 –15 5 25 45 65 85 105 125

VL – Logic Supply Voltage (V) Temperature (_C)

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S-00399—Rev. G, 13-Sep-99 4-5
DG611/612/613
Vishay Siliconix

TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)

Charge Injection vs. Analog Voltage Crosstalk and Off Isolation vs. Frequency
20 –120
V+ = 15 V V+ = 15 V
V– = –3 V V– = –3 V

–100
10
Qd
Crosstalk
Charge (pC)

–80

(dB)
0

Qs –60

Off Isolation
–10
–40

–20 –20
–3 –2 –1 0 1 2 3 4 5 6 7 8 9 10 1 10 100
VANALOG – Analog Voltage (V) f – Frequency (MHz)

–3 dB Bandwidth/Insertion Loss vs. Frequency Supply Currents vs. Switching Frequency

0 6
RL = 50

5 V+ = 15 V
V– = –3 V
–4 4 VL = 5 V
CX = 0, 5 V
3
I+
–8
Supply Current (mA)
Insertion Loss (dB)

2
1
–12 IL
–3 dB Point 0
–1
–16
I–
–2

–20 –3
–4
–24 –5
1 10 100 1000 1k 100 k 100 k 1M 10 M

f – Frequency (MHz) f – Frequency (Hz)

SCHEMATIC DIAGRAM (TYPICAL CHANNEL)

V+

VL

S
Input Level
INX Logic Translator Driver D
DMOS Switch

V–

FIGURE 1.

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4-6 S-00399—Rev. G, 13-Sep-99
 DG611/612/613
Vishay Siliconix

   
+5 V +15 V 5V tr < 10 ns
tf < 10 ns
Logic Input 50%
VL V+
VO 0V
S D

2 V
VS=
2 V
IN 90%
RL CL Switch Output
GND V– 300
20%
0V
tON tOFF
V–

CL (includes fixture and stray capacitance)

RL
VO = VS
RL + rDS(on)
FIGURE 2. Switching Time

+5 V +15 V
C C

VL V+
+5 V +15 V VS S1 D1

Rg = 50
50

IN1
VL V+
Rg VO 1 V, 4 V
S D
S2 D2 VO
NC
Vg IN CL
5V 1 nF RL
IN2
GND V– 1 V, 4 V
GND V– C

–3 V VS
XTALK Isolation = 20 log
VO –3 V
C = RF bypass

FIGURE 3. Charge Injection FIGURE 4. Crosstalk

  
High-Speed Sample-and-Hold GaAs FET Drivers

In a fast sample-and-hold application, the analog switch

characteristics are critical. A fast switch reduces aperture Figure 7 illustrates a high-speed GaAs FET driver. To turn the
uncertainty. A low charge injection eliminates offset (step) GaAs FET on 0 V are applied to its gate via S1, whereas to turn
errors. A low leakage reduces droop errors. The CLC111, a fast it off, –8 V are applied via S2. This high-speed, low-power
input buffer, helps to shorten acquisition and settling times. A driver is especially suited for applications that require a large
low leakage, low dielectric absorption hold capacitor must number of RF switches, such as phased array radars.
be used. Polycarbonate, polystyrene and polypropylene
are good choices. The JFET output buffer reduces droop
due to its low input bias current. (See Figure 5.)

Pixel-Rate Switch

Windows, picture-in-picture, title overlays are economically

generated using a high-speed analog switch such as the
DG613. For this application the two video sources must be
sync locked. The glitch-less analog switch eliminates halos.
(See Figure 6.)

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S-00399—Rev. G, 13-Sep-99 4-7
DG611/612/613
Vishay Siliconix




Input Buffer +5 V +12 V

Output Buffer

Analog S D
Input CLC111 +

5 V Output
LF356 to A/D
75

–
IN
5 V Control
1/ CHOLD
4 DG611 650 pF Polystyrene

–5 V

FIGURE 5. High-Speed Sample-and-Hold

+5 V +12 V
Output Buffer
Background Composite
D Output
+ 75

CLC410
75

–
1/ CLC114
2

Titles 250

250

75

5 V Control
1/ DG613
2

–5 V

FIGURE 6. A Pixel-Rate Switch Creates Title Overlays

+5 V

VL V+ GaAs
S1 D1 RF RF
IN OUT

IN1

1/ DG613
2
S2 D2

5V IN2

GND V–

–8 V

FIGURE 7. A High-Speed GaAs FET Driver that Saves Power

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