IET Power Electronics

Review Article

Survey on topologies based on the three-state ISSN 1755-4535

Received on 15th September 2018
Revised 7th January 2019
and multi-state switching cells Accepted on 13th January 2019
E-First on 11th February 2019
doi: 10.1049/iet-pel.2018.6003
www.ietdl.org

Fernando Lessa Tofoli1 , Douglas de Andrade Tavares1, Júlio Ismael de Assis Saldanha1
1Department of Electrical Engineering, Federal University of São João del-Rei, São João del-Rei, Brazil
E-mail: [email protected]

Abstract: The introduction of the three-state switching cell (3SSC) and the multi-state switching cell (MSSC) has led to the
proposal of several converter topologies, where prominent characteristics regarding reduced dimensions of filter elements, high
efficiency, and increase of maximum power levels are achieved. Even though the active switches associated to the 3SSC and
MSSC are driven by signals obtained from multiple phase-shifted carriers similarly to the interleaving technique, there are
significant differences between the aforementioned approaches. Within this context, this work intends to analyse several
converter topologies employing the 3SSC and MSSC that were previously reported in the literature. An overview of important
concepts regarding interleaved and 3SSC-based converters is initially presented, as potential advantages and drawbacks are
discussed in detail. Besides, it is also shown how the 3SSC and MSSC can be employed in the conception of power converter
topologies for distinct applications, e.g. high-voltage step-up non-isolated dc–dc converters, power factor correction rectifiers,
and multilevel inverters.

1 Introduction to state that most of the soft-switching topologies introduced in the

literature over the past decades are only of academic nature and
The achievement of high-power density associated with the cannot be considered as feasible solutions in practical applications.
increase of power levels and reduction of overall dimensions in Other aspect related to power density lies in the ability to
power electronic converters has motivated the conception of increase the processed power not only in terms of semiconductor
numerous topologies regarding ac–dc, dc–ac, dc–dc, and ac–ac technologies, but also considering the development of novel power
conversion. Typically, this goal can be reached by increasing the converter topologies. This is typically limited by practical issues
switching frequency, which may lead to appreciable switching such as losses, cost, and commercial availability of components,
losses in semiconductors and electromagnetic interference (EMI) e.g. semiconductors, filter elements, and magnetics. For instance,
levels. This aspect is also limited in practise by the need to use let us consider the classical buck, boost, and buck–boost
bulky heat sinks and also fast semiconductors. converters, which have been employed in the conception of several
In this scenario, silicon power metal–oxide–semiconductor derived topologies in distinct power conversion categories. In this
field–effect transistors (MOSFETs) have been the predominant case, the load power is processed by either a single active switch or
semiconductor technology, being able to operate in frequencies a single diode in each operating stage, as it is not possible to extend
rated up to a few hundreds of kilohertz. However, considering that the power levels that can be achieved indefinitely without
silicon devices have approached their theoretical limits in power considering the aforementioned issues.
conversion, silicon carbide (SiC) was introduced as a prominent To increase power levels, it is possible to use SiC
alternative for the conception of semiconductors with the capability semiconductors, though the series and/or parallel association of
to operate at high voltages and high temperatures, while cost is multiple semiconductors or even converters as a modular approach
slightly higher than their silicon counterparts [1]. More recently, can be considered. Modular multilevel converters (MMCs) were
gallium nitride (GaN) devices with the ability to operate in the initially proposed in [6] as a solution for modular designs involving
range of megahertz have been also been presented, though distinct voltage and power levels. Potential applications include
designing the drive circuitry in this case is more complex and high-voltage direct current power transmission and general-
deserves special attention [2]. Being this an incipient technology, purpose medium-voltage solutions, while the conception of solid-
GaN transistors still present higher cost than MOSFETs state transformers has also received significant attention from
considering the same voltage and/or current ratings [3]. academia and industry more recently due to intrinsic advantages,
When using typical silicon MOSFETs, operation at higher e.g. fault tolerance, voltage scalability, among other aspects [7].
frequencies up to hundreds of kilohertz becomes possible if The work presented in [8] introduced the interleaving technique
auxiliary circuits known as snubbers are incorporated to hard- for the conception of high-power, high-current converters, as it is
switched converters. Thus, soft switching can be achieved during possible to extend the power levels by adding as many interleaved
turn on and/or turn off in semiconductors with negligible losses, cells composed of passive components and semiconductors as
resulting in reduced size, weight, and volume and also high desired, which are also defined as the converter phases [9]. It is
efficiency [4]. Active snubbers employing switches, diodes, possible to increase the ripple frequency regarding the input and
inductors, and capacitors can be used for this purpose, though output quantities, with consequent reduced filter elements,
significant complexity and reduced robustness exist due to the minimisation of current stresses through semiconductors, and
utilisation of active semiconductors that are more susceptible to improved distribution of losses [10]. However, current sharing
failure than diodes. Passive snubbers based solely on diodes, issues must be carefully taken into account as unbalance may be
inductors, and capacitors can be adopted instead, though soft caused by small differences in the duty cycles applied to the active
switching cannot be often obtained over the entire load range [5]. switches and/or intrinsic constructive differences regarding the
In both cases, high component count and also the use of specific power stage elements [11]. In this case, complex and costly control
mathematical equations required to tune the resonant tank imply circuits and techniques may be necessary [12], especially
the increase of cost and complexity. In this context, it is reasonable considering that the unbalanced current may cause additional

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thermal stress on one phase, also leading to inadequate triggering possible switching states in CCM are associated to the behaviour of
of protection circuits [13]. the 3SSC in a given operating stage: (a) both switches are on; (b)
Similarly to interleaving, the three-state switching cell (3SSC) one switch and one diode are on; or (c) two diodes are on.
was introduced in [14] as a prominent solution for such Two distinct operation modes exist for any 3SSC-based
applications, where two active switches are driven by gating converter depending on the value assumed by the duty cycle D:
signals phase shifted by 180°. This arrangement is derived from the non-overlapping mode (NOM), when D < 0.5 and the active
isolated dc–dc push–pull converter and can be seen as an extension switches are not on simultaneously in a given stage and OM, when
of the canonical switching cell [15], also referred to as two-SSC D > 0.5 and the current flows through two active switches
(2SSC), whose presence can be easily identified in the classical dc– simultaneously in a given stage. If D = 0.5, the high-frequency
dc buck, boost, buck–boost, Ćuk, single-ended primary inductance ripple associated to the operation of filter elements is null. Even
converter (SEPIC), and Zeta topologies. In this case, good current though the resulting converters are able to operate within the full
sharing results if the autotransformer with unity turns ratio range of the duty cycle 0 ≤ D≤1, it has been effectively
employed in the 3SSC is properly implemented in practise. demonstrated that they do not present the same behaviour for each
Besides, the ripple frequency associated to the operation of filter one of the aforementioned modes unlike the classical dc–dc
elements is twice the switching frequency, with consequent topologies, thus leading to distinct qualitative and quantitative
reduction of overall dimensions. analyses [14].
Since then, many derived topologies for distinct power A detailed analysis of Fig. 1b effectively shows that in fact the
conversion categories have been proposed in the literature basically 3SSC is composed of two 2SSCs interconnected by an
by a same group of authors [16–18], with interesting characteristics autotransformer with unity turns ratio. The study carried out in [34]
inherent to the 3SSC, i.e. minimised size, weight, and volume of demonstrated that the PWM switch model can be successfully used
filter elements, balanced currents through the converter legs, in the representation of 3SSC-based dc–dc converters in CCM,
reduced current stresses, and improved distribution of losses with resulting in the very same transfer functions that are valid for the
consequent minimisation of heat sinks. Among them, high-voltage classical topologies. In fact, the replacement of the high-frequency
step-up non-isolated dc–dc converters deserve special attention autotransformer for coupled inductors could be considered while
[16, 19–28], especially considering that most approaches typically preserving the same operating principle of the former topologies.
found in the literature for this purpose are only feasible to low- However, it is worth mentioning that the current ripple through
power levels. It is worth mentioning that the power levels that can each inductor/winding would increase if compared with the case
be processed by 3SSC-based structures are also limited, though this where the autotransformer is employed instead. Such ripple would
issue was overcome with the introduction of the multi-SSC be equal to that regarding the classical dc–dc converters
(MSSC) in [29]. Being this a modular solution, the aforementioned considering the same design specifications, thus leading to
advantages addressed to the 3SSC can also be extended to the increased current stresses on the semiconductors. In this context, it
conception of topologies adequate for high-power, high-current is then reasonable to state that the autotransformer is better
applications, where current sharing is naturally obtained without recommended for practical applications due to increased overall
the use of special control strategies. efficiency of the resulting converter [14].
Within this context, this paper intends to review key aspects Since the load power is processed by only two semiconductors
associated to the 3SSC and MSSC, while also presenting a detailed in each operating stage considering the complementary operation
discussion on the main topologies that can be found in the of the elements that constitute both legs of the 3SSC, the maximum
literature. First, it is important to demonstrate how it is possible to power levels that can be achieved in practise are limited due to
obtain the 3SSC and MSSC, which have been employed in several maximum current and/or voltage ratings regarding the power stage
topologies as it was previously mentioned. The main differences elements. However, this concept can be extended to multiple
between interleaving and MSSCs are also emphasised, where two switching states as desired in a modular approach, resulting in the
dc–dc boost converters are analysed in detail. An in-depth analysis arrangement called MSSC represented in Fig. 1c [29].
of several topologies is also provided, as well as future Depending on the number of switching states N assumed by the
perspectives on the conception of novel topologies and MSSC, there are N − 1 possible operating modes or regions
development of other related studies. regarding the duty cycle range, while the gating signals that drive
the active switches must be phase shifted by 360°/(N − 1)
2 Conception of the 3SSC and MSSC analogously to interleaving. However, if the autotransformer
presents unity turns ratio, the same impedance is obtained for all
The pulse-width modulation (PWM) switch model was proposed in windings, as it is possible to achieve high-power levels with good
[30, 31] as a three-terminal representation of the canonical current sharing without the need of special control schemes. Other
switching cell or 2SSC that exists in the six classical non-isolated prominent advantages addressed to the MSSC are reduced current
dc–dc converters. It considers that basic current and voltage stresses through the semiconductors, with minimised conduction
waveforms associated to the active (a), passive (b), and common losses when MOSFETs are employed; consequent increase of
(c) terminals can be used to analyse the generic behaviour of the overall efficiency; improved utilisation of heat sinks with proper
topologies in continuous conduction mode (CCM) and distribution of losses; reduced dimensions, size, and weight of filter
discontinuous conduction mode (DCM) as shown in Fig. 1a. elements, which are designed for a multiple of the switching
Besides, it has been successfully used for small-signal modelling frequency. Besides, since the MSSC is composed of multiple
purposes in a rather simpler approach than the well known average 2SSCs, it is reasonable to state that the PWM switch model can be
state-space technique [32, 33]. promptly employed in the small-signal analysis of the resulting
Now, let us consider the isolated dc–dc push–pull converter in topologies [30, 31].
Fig. 1b, which is composed of a high-frequency centre-tapped
transformer, two active switches S1 and S2 in the primary side, and
3 3SSC versus interleaving: analysis of dc–dc
two diodes D1 and D2 in the secondary side. The circuit performs
boost converters
dc–ac–dc power conversion considering the presence of an
intermediate ac–ac stage. If the high-frequency transformer is Since the 3SSC requires the use of two carriers phase shifted by
considered ideal with unity turns ratio, the primary and secondary 180° for the proper operation, it is often mistaken by the
windings can be replaced by magnetising inductances coupled in interleaving technique. To evidence the main differences between
the form of an autotransformer, resulting in the 3SSC as both approaches, let us consider the two-phase dc–dc interleaved
demonstrated in [14]. boost converter and the dc–dc boost converter using the 3SSC
The active switches in the 3SSC must be driven by gating proposed in [14], both operating in CCM as in Figs. 2 and 3 for D
signals phase shifted by 180° similarly to two-phase interleaved < 0.5 and D > 0.5, respectively. It is also worth mentioning that a
converters, but there are some important differences between both similar analysis can be performed involving other topologies with a
approaches as it will be further discussed. Consequently, three higher number of phases and switching states.

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Fig. 1 Unidirectional and bidirectional versions of switching cells
(a) 2SSC, (b) 3SSC, (c) MSSC

First, the analysis is restricted to the operation of the converters to the high-frequency transformer of the isolated full-bridge
in NOM. It can be seen that the input current is shared between two converters [14].
filter inductors in Fig. 2a. Each inductor in this case is designed to
operate at the switching frequency, while reduction of the input 4 Topologies based on the 3SSC
current ripple is achieved due to partial cancellation involving the
phase-shifted currents through each phase. On the other hand, the As it was previously mentioned, the 3SSC was introduced in [14]
input current flows through a single filter inductor in Fig. 2b, more than 16 years ago, from which several topologies were
which operates at twice the switching frequency. In both derived later on up to the present date. It is worth emphasising that
converters, only 50% of the input power is processed by the active the forthcoming analysis includes a detailed discussion on eventual
switches, thus leading to increased efficiency and reduced advantages and drawbacks regarding each one of the structures
conduction losses. Even though an autotransformer is required by previously reported in the literature, being specifically restricted to
the 3SSC boost converter, it contributes to the achievement of 3SSC- and MSSC-based converters only. Besides, most of the
natural current sharing since both magnetically coupled windings works were proposed by a specific group of authors and refer
have the same impedance if the physical implementation of such mainly to conference papers, though some journal articles can also
magnetic element is carefully performed in practise. In this case, be found.
slight differences regarding the inductors, switches, and diodes will
not cause significant current unbalance as demonstrated in [35]. 4.1 dc–dc Converters
This issue is not expected in interleaved converters, which are
prone to current unbalance and additional thermal stress on a given 4.1.1 Basic topologies: A family of dc–dc converters for high-
phase [36]. The very same aspects are valid for the converters power, high-current applications was proposed in [14] based on the
operating in OM in Fig. 3, where the filter inductance of the 3SSC 3SSC. Five distinct switching cells named A, B, C, D, and E are
boost converter is smaller if compared with those employed in the presented as distinct configurations that can be used to replace the
two-phase interleaved boost converter for an operating point where 2SSC in the classical converters. It has been shown that the
the input current ripple is the same. Either in NOM or OM, the qualitative and quantitative analyses of the resulting buck, boost,
autotransformer that constitutes the 3SSC is designed analogously buck–boost, Ćuk, SEPIC, and Zeta topologies is not the same for
the operating modes of the 3SSC, i.e. NOM and OM. In other
words, the resulting conversion ratios vary depending on the duty
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Fig. 2 Operating stages in NOM (D < 0.5)
(a) Interleaved boost converter, (b) 3SSC-based boost converter

cycle range associated to the possible operating modes of the critical inductance that defines the boundary between CCM and
3SSC, except for the structures that employ the cell ‘B’ shown in DCM is reduced. The filter elements, i.e. inductor and capacitor are
Fig. 1b, whose static gains are the same for 0 ≤ D ≤ 1 and equal to designed for twice the switching frequency, with consequent
those regarding the conventional dc–dc topologies. reduction of overall dimensions. The current stresses on the
The dc–dc boost converter represented once again in Fig. 4a semiconductors are minimised since the inductor current is equally
was also thoroughly analysed in CCM and DCM in [14], being the and naturally shared among the converter legs due to the
first 3SSC-based structure effectively evaluated experimentally. It autotransformer. Besides, the efficiency measured from a 2-kW
has been demonstrated that the static gain in CCM is exactly the prototype operating at 25 kHz is higher than 94% over the entire
same as that of the conventional boost converter, while the required load range.

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Fig. 3 Operating stages in OM (D > 0.5)
(a) Interleaved boost converter, (b) 3SSC-based boost converter

The 3SSC dc–dc buck converter shown in Fig. 4b was studied The very same characteristics can then be addressed to the
in [37], where a detailed analysis including the design procedure, 3SSC buck–boost converter in Fig. 4c [35, 38] and extended to
loss mechanism, and comparison with the conventional and other converter topologies such as Ćuk, SEPIC, and Zeta.
interleaved buck converters for the same operating point was Unfortunately, the voltage stresses regarding the aforementioned
carried out. Unlike its conventional counterpart, the input current is topologies are high, i.e. the sum of the input and output voltages,
non-pulsating for D > 0.5, as there is no need to employ input what may lead to the use of MOSFETs with high-voltage ratings
filters to reduce EMI levels. Efficiency measured from a 1-kW and drain-to-source on-resistances RDS(on), with consequent impact
experimental prototype operating at 30 kHz is found to be higher on efficiency. However, it is worth mentioning that such drawback
than 94% over the entire load range, with improved performance also exists in the conventional and interleaved dc–dc converter
compared with similar approaches. topologies for step-up/step-down applications.

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 dc–dc converters with wide conversion range are a modern
research topic in power electronics. Research efforts are justified
not only in terms of the conception of a wide variety of topologies
with improved characteristics, but also due to the need to step low-
voltage levels from batteries, photovoltaic modules, fuel cells,
wind turbines, among others up to high dc voltages necessary to
supply voltage-source inverters without using transformers.
A modular dc–dc boost converter employing capacitors, diodes,
and multiple secondary windings coupled to the autotransformer of
the 3SSC is presented in Fig. 5a [28, 39] as a solution to achieve
high-voltage step-up by extending the static gain not only
according to the duty cycle, but also the turns ratio associated to
the windings. A similar topology with integrated magnetics and
one secondary winding is also described in [40] to reduce overall
dimensions. The generalised analysis of the topology in Fig. 5a
operating in both DCM and CCM is derived in [16], while it is
effectively shown in [41] that the converter is adequate for
applications regarding photovoltaic systems. However, a
significant drawback lies in the fact that the topology is not able to
operate in NOM since the voltages induced in the secondary
windings are low.
Fig. 5b shows that voltage multiplier cells (VMCs) consisting
of capacitors and diodes as associated to the 3SSC allow obtaining
high-voltage step-up in boost-type converters [20, 21]. The voltage
stresses across the main switches are reduced as more VMCs are
added as necessary, while the conversion ratio is extended without
the need to employ extremely high duty ratios. However, high
component count and increase of conduction and switching losses
due to the additional diodes is of major concern, while the topology
is only able to operate in OM. From this converter, a generic
switching cell that can be used in the conception of unidirectional
and bidirectional buck, boost, buck–boost, Ćuk, SEPIC, and Zeta
modular topologies for wide conversion range is developed in [27].
A unidirectional boost converter with two VMCs is also evaluated
experimentally, providing reduced current stresses on the
semiconductors, good current sharing between the legs, and high
efficiency over the entire load range [27]. Its respective small-
signal modelling and the closed-loop control system are also
developed in [42, 43].
To overcome the duty cycle limitation associated to the
converters in [20, 21, 27], a generic topology composed of multiple
secondary windings is introduced in [25] as a proper solution to
supply split-capacitor inverters, e.g. neutral-point-clamped (NPC),
half-bridge, and dual half-bridge topologies. The converter shown
in Fig. 5c is able to operate in either NOM or OM and provide
high-voltage step-up with little influence of the leakage inductance
Fig. 4 dc–dc Converters based on the 3SSC type ‘B’
in the conversion ratio, what also applies to other 3SSC-based dc–
(a) Boost converter, (b) Buck converter, (c) Buck–boost converter
dc converters.
Owing to natural current sharing characteristics associated to
It is possible to establish a fair comparison between the 3SSC- the autotransformer with unity turns ratio, the converter is also able
based non-isolated dc–dc converters and their respective classical to supply unbalanced loads with nearly the same voltage without
counterparts operating in CCM for a same operating point in any special control schemes. The conversion ratio can be extended
Table 1, where several aspects are considered, e.g. conversion ratio, as more windings are added and/or the turns ratio is increased,
input current, current through the output stage (composed of the what may lead to high component count. The small-signal analysis
parallel association of the filter capacitor and the load), and stresses of the topology with the PWM switch model is derived in [44].
on semiconductors. In all cases, the operating frequency of the The literature presents some interesting practical applications
filter elements is twice the switching frequency fs, thus leading to involving converters constituted by the 3SSC, e.g. the high-voltage
respective reduced sizes in 3SSC converters. They also present step-up dc–dc converters in Fig. 6a used in the conception of a
smaller critical inductances when compared with 2SSC topologies, transformerless uninterrupted power supply (UPS) [45, 46]. It is
thus providing a wider region for which the operation in CCM worth mentioning that the structure is able to provide symmetrical
occurs. output voltages that are naturally balanced due to the
It is also worth mentioning that 3SSC-based converters present autotransformer with unity turns ratio without additional control
higher component count, being better recommended for high- schemes. A topological variation is also shown in Fig. 6a [47],
power, high-current applications unlike their respective 2SSC- whose input current is non-pulsating and allows increasing the
based counterparts. Of course, converters employing the 2SSC are useful life of batteries when used as input voltage sources. Besides,
more adequate for low-power levels. the maximum voltage stress across the switches is less than the
output voltage and naturally clamped by the output filter capacitor,
4.1.2 Wide conversion range topologies: Considering that the as snubbers are not necessary. However, the dc path between the
conversion ratio in the dc–dc converters described in [14] is limited battery bank and the capacitors that constitute the dc link causes
similarly to that regarding the classical topologies, several high inrush currents, what can be avoided using negative
solutions for applications that demand high-voltage step-up and temperature coefficient resistors.
high-power levels have been proposed in the literature employing The modified SEPIC topology presented in Fig. 6b is proposed
the 3SSC as a prominent alternative. In this context, non-isolated in [22], whose possible advantages lie in the reduced voltage stress

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across the active switches, i.e. less than a half of the output voltage component count, unidirectional/bidirectional power flow
and reduced conduction losses with improved efficiency as a capability, among others.
consequence. Unfortunately, the converter does not operate
appropriately in NOM due to magnetic induction issues associated 4.1.3 Isolated dc–dc converters: Considering that the 3SSC is
to the transformer. obtained from the high-frequency transformer of the dc–dc push
The buck–boost converter shown in Fig. 6c is also adequate for converter in Fig. 1a, it is also possible to aggregate its prominent
high-voltage step-up [26]. In this case, secondary windings are characteristics to the conception of isolated topologies. The generic
coupled to the primary windings of the autotransformer that current-doubler rectifier in Fig. 7a is proposed in [50] as a solution
constitutes the 3SSC, as it is possible to extend the conversion ratio for novel buck-derived isolated topologies, e.g. push–pull, half-
by increasing the turns ratio as desired, also avoiding the operation bridge, full-bridge, dual-bridge, NPC three-level, among other
at extremely high duty ratios. Although the voltage stress across converters. Since the current through the power stage elements has
the active switch is equal to the sum of the input and output low ripple, reduced conduction losses exist. Besides, the maximum
voltages in the classical dc–dc buck–boost topology, it is lower current through the secondary winding of the transformer is half of
than half of the total output voltage in this case [26]. the average output current, which also contributes to high
A bidirectional dc–dc converter employing the 3SSC is shown efficiency. The increased sizes of the transformer and inductor are
in Fig. 6d [23], which is able to operate in either buck or boost possible drawbacks.
mode to achieve wide conversion range by modifying the turns The modified push–pull converter with active clamping in
ratio of the transformer, though operation in NOM is not possible. Fig. 7b is studied in [51], where a blocking capacitor is connected
A similar structure associated to a family of bidirectional dc–dc in series with the primary winding of the transformer to avoid
converters for dc motor drives is described in [48]. saturation. Besides, the active clamping circuit is responsible for
On the other hand, the three-port bidirectional topology in limiting the maximum voltage stresses across the active switches,
Fig. 6d [49] is adequate for the integration of multiple energy as it is possible to achieve high efficiency at high-power levels
sources in a single conversion stage including a battery bank, a unlike in the conventional push–pull converter. It has also been
photovoltaic module, and a load. The output voltage can be demonstrated that the same circuit can be used as a high-power
properly adjusted according to the turns ratio of the coupled factor rectifier in [52] by simply using a diode bridge or applied to
inductors and/or the duty cycle, while higher conversion ratio is a two-stage isolated dc–ac conversion system in [18].
achieved in OM. The isolated boost converter represented in Fig. 7c employs two
To compare the topologies properly, Table 2 summarises the windings in the isolation transformer, while a series-connected
main characteristics of the previously described converters in terms blocking capacitor is required to avoid saturation [53]. The voltage
of several aspects that are essential to wide conversion range stress regarding the active switches is minimised, allowing the use
applications. It can be seen that the voltage stresses on the active of MOSFETs with reduced voltage ratings and consequent increase
switches are less than the output voltage, thus making them of overall efficiency.
attractive to achieve high-voltage step-up. Another interesting
characteristic lies in the possibility to extend the conversion ratio 4.2 ac–dc Converters
as desired by adding more components to the converters shown in
Figs. 5a–c and 6c, resulting in a modular approach. However, the The first power factor correction (PFC) rectifier employing the
choice of a given structure also depends on other aspects, e.g. 3SSC was proposed in [17], which is similar to the boost topology

Table 1 Comparison between 2SSC- and 3SSC-based non-isolated dc–dc converters operating in CCM
Parameter 2SSC buck converter 3SSC buck converter
static gain Vo Vo
= D, 0 ≤ D ≤ 1 = D, 0 ≤ D ≤ 1
Vi Vi
input current discontinuous (0 ≤ D≤1) discontinuous (D < 0.5); continuous (D > 0.5)
current through the output stage continuous (0 ≤ D≤1) continuous (0 ≤ D≤1)
current stresses on semiconductors proportional to the load current proportional to half of the load current
voltage stresses on semiconductors Vi Vi

Parameter 2SSC boost converter 3SSC boost converter

static gain Vo 1 Vo 1
= ,0≤D≤1 = ,0≤D≤1
Vi 1−D Vi 1−D
input current continuous (0 ≤ D≤1) continuous (0 ≤ D≤1)
current through the output stage discontinuous (0 ≤ D≤1) continuous (D < 0.5); discontinuous (D > 0.5)
current stresses on semiconductors proportional to the input current proportional to half of the input current
voltage stresses on semiconductors Vo Vo

Parameter 2SSC buck–boost converter 3SSC buck–boost converter

static gain Vo D Vo D
= ,0≤D≤1 = ,0≤D≤1
Vi 1−D Vi 1−D
input current discontinuous (0 ≤ D≤1) discontinuous (D < 0.5); continuous (D > 0.5)
current through the output stage discontinuous (0 ≤ D≤1) continuous (D < 0.5); discontinuous (D > 0.5)
current stresses on proportional to the sum of the input and load proportional to half of the sum of the input and load
semiconductors currents currents
voltage stresses on Vi + Vo Vi + Vo
semiconductors

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 less than half of the output voltage. Otherwise, the switches operate
in NOM. This causes a small discontinuity in the inductor current
waveform when transition from one mode to another occurs, even
though it does not affect the power factor and total harmonic
distortion of the input current significantly.
A bridgeless boost converter in Fig. 8b is proposed in [54],
where the 2SSCs that exist in the classical topology introduced in
[55] are replaced by 3SSCs. Four active switches and two
autotransformers are required, but it is effectively demonstrated
that the converter performance is adequate in terms of high input
power factor, reduced harmonic content of the input current, and
high efficiency.
Voltage doubler boost-type rectifiers can also be obtained using
the 3SSC, e.g. the PFC rectifier with two autotransformers, which
requires only two active switches as represented in Fig. 8c [56, 57].
Although a diode bridge is necessary, balanced output voltages
without the need of control schemes and high efficiency result due
to the use of the 3SSC even at low line voltage, where the input
current is typically high. Besides, it is reasonable to state that this
converter is adequate for UPS applications rated at a few kilowatts.
The structure combining the bridgeless single-phase three-level
rectifier introduced in [58, 59] and the 3SSC in Fig. 8d [60–62]
seems to be the most adequate solution for single-phase PFC
applications due to low component count, reduced voltage stresses
on the semiconductors, and balanced voltages across the output
filter capacitors. Three-phase rectifiers can also be obtained from
Fig. 8d for high-power applications [63–65]. A 9-kW prototype
was implemented using digital control embedded in a low-power
field programmable gate array (FPGA) with low computational
burden. By using a modified control strategy based on the one
cycle control technique [66], it is possible to achieve nearly unity
input power factor with reduced overall losses, while size and
volume are reduced by about 53% if compared with a three-phase
Vienna rectifier with the same ratings [65].
A proper comparison among the aforementioned topologies is
given in Table 3.

4.3 dc–ac Converters

Considering that the canonical cell is employed in the conception
of basic topologies, it is reasonable to state that similar converters
can be obtained by replacing it for the 3SSC. A three-level half-
bridge inverter is presented in Fig. 9a [67], whose prominent
advantages are the increased number of levels associated to the
output voltage waveform, with consequent reduction of its
respective harmonic content; reduced dimensions of the output
low-pass filter, whose cut-off frequency is defined as function of
twice the switching frequency; the current is equally shared among
the legs that constitute the 3SSC, with reduced conduction losses.
However, possible drawbacks are the increased number of active
switches and the need for an autotransformer. This concept can be
extended to a higher number of levels for the ac output voltage
using the MSSC as it will be further discussed in this work.
Analogously, a full-bridge inverter with two autotransformers
and eight active switches can be obtained in Fig. 9b [68]. In this
case, the frequency seen by the low-pass filter is four times the
switching frequency and, consequently, its size, weight, and
volume are reduced if compared with the conventional dc–ac full-
bridge topology. The output voltage waveform has five levels, as
the total harmonic distortion is also minimised. Owing to high
component count, this topology is only feasible for high-power
applications.
A five-level T-type inverter is shown in Fig. 9c and studied in
Fig. 5 High-voltage step-up dc–dc converters employing the 3SSC detail in [69] in terms of a 5-kW prototype, whose efficiency is
(a) Boost converter with multiple secondary windings, (b) Boost converter with higher than 96.5% at rated load condition. Since the ripple
VMCs, (c) Boost converter for split-capacitor inverter applications frequency of the output filter is twice the switching frequency,
reduced dimensions are obtained, though eight active switches are
shown in Fig. 4a, though it employs a diode bridge according to required in this case.
Fig. 8a. Average current mode control can be used to achieve
operation with nearly unity input power factor and regulated dc 5 Topologies based on the MSSC
output voltage, while efficiency is higher than 97% over the entire
As it was previously mentioned, the concept of the 3SSC can be
load range for a 3-kW prototype [17]. It is worth mentioning that
extended to a higher number of switching states in the MSSC, as
the switches operate in OM when the instantaneous input voltage is
more windings are added to the autotransformer associated to
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Fig. 6 High-voltage step-up dc–dc converters
(a) Non-isolated dc–dc boost converters employed in a transformerless UPS, (b) dc–dc SEPIC converter for high-voltage step-up, (c) dc–dc buck–boost converter for high-voltage
step-up, (d) Multi-port bidirectional dc–dc converters

switches and diodes as seen in Fig. 1c. Therefore, the load current 5.1 dc–dc Converters
can be properly shared among the various legs with minimisation
of current stresses, while the operating frequency of filter elements The work developed in [29] shows how it is possible to obtain dc–
becomes a multiple of the switching frequency. A possible dc buck, boost, and buck–boost converters derived from the
drawback lies in the need of multiple phase-shifted carriers to MSSC, which are presented in Fig. 10. It is effectively shown that
generate the drive signals for the active switches. Even though this their respective static gains are identical to those regarding their
may be a somewhat complex task if analogue integrated circuits classical counterparts when operation occurs in CCM. However,
are employed in practise, this limitation can be promptly overcome the area for which the converters operate in DCM is narrower, as
when using low-cost microcontrollers such as FPGAs. the required critical inductance is reduced as demonstrated by the

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analysis carried out in [70]. The resulting topologies employ the major concern. If it is not properly designed in practise, severe
four-SSC (4SSC), being similar to three-phase interleaved dc–dc current unbalance will exist. Besides, small differences in the duty
converters. cycle of the active switches may cause such undesirable effect,
A bidirectional dc–dc converter based on the 4SSC is presented eventually leading magnetic components to saturation. This
in Fig. 11a [71], whose operation in buck and boost modes is concern has justified the introduction of passive impedances
evaluated experimentally. Since it employs six active switches, it is between the legs of the MSSC based on small inductors to ensure
only adequate for high-power, high-current applications, where zero average voltage across the windings of the magnetic
minimisation of overall dimensions associated to the filter elements components as in [36]. Active techniques can also be used for this
is necessary. purpose [73], but at the cost of higher complexity associated to a
A potential research field involving the MSSC which has not dedicated control circuit.
yet been fully explored lies in the conception of non-isolated dc–dc
converter for wide conversion range using the generic cell 5.2 ac–dc Converters
presented in Fig. 11b [72]. Buck, boost, buck–boost, Ćuk, SEPIC,
and Zeta converters can be obtained using a modular approach that Single-phase, multilevel PFC rectifiers can be obtained associating
allows extending the conversion ratio by adding more legs and the MSSC to generic bidirectional single-pole, triple-throw
secondary windings coupled to the autotransformer of the MSSC, switches as shown in Fig. 12 [74]. As more legs are added, the
which are associated to series-connected rectifiers. Reduced input current ripple is reduced and the input power factor is
voltage stresses on the active switches, minimisation of filter increased, thus making this approach an interesting choice for
requirements, and ability to operate at high-power levels can be high-power applications, where high efficiency and power density
mentioned as potential advantages. are a must. The detailed analysis of a two-leg converter is also
Considering the existence of many windings, the physical presented in [75–77] regarding the harmonic content of the input
implementation of the autotransformer in the MSSC is also of current for electromagnetic compatibility studies, semiconductor

Table 2 Comparison among non-isolated dc–dc converter topologies based on the 3SSC for high-voltage step-up applications
Characteristic Topology
1 (Fig. 5a) 2 (Fig. 5b) 3 (Fig. 5c) 4 and 5 (Fig. 6a)
voltage stress on the active Vo Vo Vo Vo Vo
, a ≥ 1a – number of VMC – number of
switches a+1 2 ⋅ VMC0.3 n 2 n1 + n2
1 + ∑ aj 1+
secondary windings VMCs j=1 2 ⋅ np
static gain a+1 VMC + 1 1
n 1 n
⋅ 1 + ∑ aj ⋅ 1 + n – turns ratio
1−D 1−D 1−D 1−D 2
j=1
1 n + n2
⋅ 1+ 1
1−D 2 ⋅ np
switches 2 2 2 22
diodes 2·j + 2 2·VMC + 2 2·a + 2 68
capacitors 2·j + 1 2·VMC + 1 2·a + 1 24
inductors 1 1 1 11
total number of windings 2+j 2 2+j 45
distinct magnetic cores 2 2 2 22
duty cycle range 0.5 ≤ D≤1 0.5 ≤ D≤1 0 ≤ D≤1 0 ≤ D≤10 ≤ D≤1
modularity yes yes yes nono
power flow capability unidirectional unidirectional/bidirectional unidirectional unidirectional

Characteristic Topology
6 (Fig. 6b) 7 (Fig. 6c) 8 (Fig. 6d) 8 (Fig. 6d)
voltage stresses on the Vo Vo ⋅ 1 − D D — —
⋅ 1+
active switches n+D D+a 1−D
static gain n+D D+a 2+n 1 2⋅n
n – turns ratio n – turns ratio boost +
1−D 1−D 2 1−D 1−D 1−D+α
2⋅D D < 0.5
buck n – turns ratio
2+n
1 2 ⋅ n ⋅ D2
⋅ 2 +1
1−D D +α⋅ 1−D
D > 0.5
4 ⋅ n ⋅ Io ⋅ Ls
where α =
Vi ⋅ Ts
is the normalised load current
switches 2 2 6 4
diodes 4 4 6 2
capacitors 4 4 3 4
inductors 2 1 1 1
total number of windings 5 3 4 6
distinct magnetic cores 2 2 2 3
duty cycle range 0 ≤ D≤1 0 ≤ D≤1 0 ≤ D≤1 0 ≤ D≤1
modularity no yes no no
power flow capability unidirectional unidirectional bidirectional bidirectional

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losses, and possible modulation techniques that can be employed to multi-interphase transformers, where efficiency is higher than 98%
improve overall performance of the resulting rectifiers. for a 7.5-kW prototype operating at 75 kHz.
This concept can also be extended to modular three-phase
rectifiers as in [78–80], which can be associated to distinct 5.3 dc–ac Converters
modulation strategies. It has been demonstrated in [81] that the
modulation strategy has direct impact on the performance of the The 4SSC can be employed in the generation of the four-level half-
bridge inverter as shown in Fig. 13a [82], where the frequency seen
by the output filter is three times the switching frequency and,
consequently, reduced dimensions are obtained. Besides, the
voltage applied to the low-pass filter is reduced to one third of the
value regarding the classical half-bridge inverter. Since many
switches are required, this topology is only feasible to high-power
levels, considering that the load current is equally shared among
the legs that constitute the 4SSC.
The multilevel MSSC, NPC-MSSC, flying capacitor MSSC,
and H-bridge MSSC are introduced in [83], so that it is possible to
obtain novel inverter topologies capable of operating at high-power
levels with reduced harmonic content of the output voltage. The
five-level NPC inverter shown in Fig. 13b is also thoroughly
evaluated, whose efficiency is 96% at the rated power of 5 kW.
A three-phase, seven-level inverter employing the 4SSC is
analysed in [84, 85], which requires 18 active switches. A 15-kW
prototype is also implemented, whose efficiency is 95.78%. It can
be seen that the frequency of the load voltage is three times the
switching frequency and good current sharing exists due to the use
of a three-phase coupled inductor, with consequent reduction of
conduction losses and use of components with minimised current
ratings.

6 Future perspective
Considering the analysis of previous works related to the 3SSC and
MSSC, it can be stated that there are some aspects that have not yet
been fully explored. For instance, the study of the 3SSC-based dc–
dc buck converter in [37] demonstrated that the static gain in CCM
is the same as that regarding the classical buck topology. However,
the same does not apply to the operation in DCM. Besides, the
unified modelling approach derived in [34] for 3SSC converters
operating in CCM has shown that the very same transfer functions
are also valid for converters employing the 2SSC. On the other
Fig. 7 Conception of novel isolated dc–dc converters hand, it is expected that the dc and ac small-signal analyses lead to
(a) Current-doubler rectifier for buck-based topologies, (b) Active clamping push–pull distinct results regarding 2SSC and 3SSC converters in DCM. In
converter, (c) Isolated boost converter other words, a similar unified model able to represent the operation
in DCM employing the PWM switch model has not been presented

Fig. 8 Single-phase PFC rectifiers based on the 3SSC

(a) Boost converter, (b) Bridgeless boost converter, (c) Three-level voltage doubler boost converter, (d) Three-level voltage doubler bridgeless boost converter

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Table 3 Comparison among single-phase boost-type ac–dc converter topologies based on the 3SSC
Characteristic Topology
1 (Fig. 8a) 2 (Fig. 8b) 3 (Fig. 8c) 4 (Fig. 8d)
voltage stress on the active switches Vo Vo 2·Vo Vo
switches 2 4 2 4
diodes 6 4 8 8
capacitors 1 1 2 2
inductors 1 1 2 1
diode bridge yes no yes no
voltage doubler characteristic no no yes yes
total number of windings 3 5 6 3
distinct magnetic cores 2 3 4 2
power flow capability unidirectional unidirectional unidirectional bidirectional

Fig. 9 dc–ac Converters employing the 3SSC

(a) Half-bridge inverter, (b) Full-bridge inverter, (c) Five-level T-type inverter

so far. Thus, the aforementioned analysis can also be extended to where Vi and Vo are the average input voltage and output voltage,
MSSC-based converters in future work. respectively; and D1 and D2 are the duty cycles imposed to the
Basically, any converter topology employing the 2SSC may active switches of the first and second stages, respectively.
result in a counterpart based on the 3SSC and/or MSSC as In this case, four active switches would be required. However, a
suggested in [14], while distinct structures can be further proposed. dc–dc quadratic boost converter employing the 3SSC with less
For instance, in order to achieve wide conversion range, the active switches can be obtained using the graft scheme as shown in
cascade connection of multiple converters can be considered as a Fig. 14a, being this an interesting topology that provides high-
possible alternative. However, it requires a significant amount of voltage step-up. The static gain of the converter operating in CCM
active switches, whose gating signals must be properly is the same as that regarding the conventional quadratic boost
synchronised. This limitation led to the introduction of the so- converter [86], i.e.
called single-switch quadratic converters in [86]. This concept was
only generalised later on in [87] with the introduction of the graft Vo 1 2

scheme, where it is possible to obtain single-switch topologies = (2)

Vi 1−D
from cascaded converters as long as the active switches are
connected to each other through a common node.
Another potential research field lies in the introduction of wide
If two boost converters as represented in Fig. 4a are cascaded, it
conversion range dc–dc converters for higher-power levels that
can be easily demonstrated that the static gain of the resulting
cannot be typically achieved in practise with the use of the 3SSC.
topology in CCM is
A high-voltage step-up boost converter is presented in Fig. 14b,
Vo where secondary windings are coupled to the former
1 1
= ⋅ (1) autotransformer of the 4SSC, which becomes a three-phase
Vi 1 − D1 1 − D2 transformer in this case. The conversion ratio can be extended
according to the turns ratio associated to the windings, while a
detailed analysis of this structure was not yet developed.

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 Fig. 11 Dc–dc converters based on the MSSC for wide conversion range
applications
(a) Bidirectional dc–dc converter employing the 4SSC, (b) Generic switching cell for
the conception of unidirectional and bidirectional topologies with wide conversion
range

Fig. 10 dc–dc Converters based on the MSSC

(a) Buck converter, (b) Boost converter, (c) Buck–boost converter

A three-level inverter employing the 3SSC is also shown in Fig. 12 Multilevel PFC rectifier based on the MSSC
Fig. 14c. Similarly to the classical half-bridge inverter, it requires
two active switches, but a single dc input voltage source is and especially high-voltage step-up dc–dc converters are among
employed instead. Besides, the output voltage can be higher than the existing approaches that represent interesting choices for many
the input voltage without the need of modulation index values practical applications, which include battery chargers, motor
higher than unity. drives, UPS, grid-connected systems, renewable energy systems,
among others.
As an extension of the 2SSC and the 3SSC, the MSSC becomes
7 Conclusion a modular approach that allows extending the power levels as
The 3SSC has been described as a prominent solution that allows desired at the cost of high component count, but with inherent
achieving high-power levels in distinct power converter categories. high-power density and increased efficiency. Although only a few
Since it was first introduced, numerous topologies have been topologies based on the MSSC have been described in the literature
presented in the literature according to the detailed analysis carried so far, the obtained results are encouraging toward the development
out in this work. It has been shown that the potential advantages of novel structures with good characteristics.
addressed to the 3SSC have led to conception of converters with Considering the existence of few works dedicated to 3SSC- and
minimised dimensions, which are capable of operating at power MSSC-based converters reported in the literature by a same group
levels rated at a few kilowatts with increased efficiency and high- of authors, it is reasonable to state that such topologies are not as
power density. High-power factor rectifiers, multilevel inverters, popular as interleaved structures for practical applications. Besides,

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 it is worth mentioning that numerous works focused on the
interleaving technique existing, which is possibly mistaken by the
3SSC and MSSC due to the use of multiple phase-shifted carriers
to generate the drive signals of the active switches. In this context,
this work has clearly demonstrated that such approaches are clearly
distinct.
Prominent advantages addressed to converter topologies
employing the 3SSC and MSSC include minimised current stresses
on the semiconductors, thus leading to the choice of switches and
diodes with reduced cost, with consequent improved thermal
distribution and utilisation of heat sinks; reduced dimensions
associated to the filter inductor(s) and filter capacitor(s), whose
ripple frequencies become a multiple of the switching frequency
according to the number of switching states; consequent
minimisation of size, weight, and volume associated to increased
power density at high-power applications; narrower region for the
operation in DCM, as the required critical inductance is reduced if
compared with 2SSC-based converters [70]; natural current sharing
due to the autotransformer with unity turns ratio, what cannot be
ensured in interleaved converter without the use of dedicated
control techniques. However, a possible drawback lies in the need
of an autotransformer, though a fair comparison with interleaved
converters must be performed considering the total magnetic
volume of the resulting topologies for each specific operating
Fig. 13 Dc–ac converters employing the MSSC point.
(a) Four-level half-bridge inverter based on the 4SSC, (b) Five-level NPC inverter Considering recent advances on the semiconductor technology,
researchers of the Center for Power Electronics Systems (CPES)
have reported the development of a PFC boost converter
employing GaN devices, resulting in a topology with high-power
density, and high efficiency [88]. In the context of high-power
applications, it is expected that MSSC-based converters would
benefit significantly from the use of SiC and GaN semiconductors
in a near future.

8 Acknowledgments
The authors acknowledge CAPES, CNPq, FAPEMIG, and
INERGE for the support to this work.

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