COMPUTER

PCI Bus
Prototyping Card (1)
Explore the PCI-Bus
By H. Kolter (Kolter Electronic)

The development of a PCI based expansion card is relatively complex

and usually needs a large investment of time and money before success
is achieved. The PCI prototyping card presented here offers a more
convenient solution. Its pre-configured PCI decoder and 16 bit wide
data bus together with a series of port addresses allows you to concen-
trate on development and testing of your prototype circuit without get-
ting bogged down in the detail of the PCI bus standard.

The Peripheral Component Interconnect or address/data bus. One of the original expansion cards fitted to the com-
PCI Bus is a relative newcomer to the com- aims of this bus standard was to puter system and will initialise them
puter interface world but has rapidly replaced ensure that it would not become during the BIOS set-up procedure.
the older and well known ISA Bus. One attrac- obsolete overnight and would still be Once the card has been configured
tive feature for peripheral designers is that in use after many generations of under BIOS, it is assigned an access
this bus is used not only for IBM compatible processor have come and gone. address. There are different PCI rou-
PCs but also for workstations and Apple Mac- The PCI bus is independent of the tines that allow this information to
intosh systems. Basically, the interface is a system processor and is almost a be read or altered.
very powerful multiplexed 32/64 bit wide stand-alone system bus capable of a
relatively high data transfer rate. PCI Controller
Modern PC motherboards use PCI
slots and no longer provide any of
and Vendor ID
the older ISA slots. The disadvan- The central core of the PCI expan-
PCI board features: tage for the designer of a PCI plug-in sion card is the PCI decoder or con-
– 32-bit PCI Controller implemented with card is that the design process is a troller chip. This chip forms the link
ispLSI bit more complex. It is no longer pos- between the PCI bus of the com-
– 16 bit User Interface similar to ISA-Bus
sible to fiddle with hardware puter and your custom circuitry.
– Accessible Decoder GAL22V10 (Synario)
jumpers to select the address space Most commercial PCI controller
– Large 2.54-mm matrix of through-plated
of the expansion card — instead, the chips on the market are not only very
holes
card configuration is performed with complex (and expensive) but are also
– DC/DC converter +/- 15 volts
– Suitable for prototyping digital or analogue
software. The PCI card contains its relatively unwieldy beasts because
circuits own operating system that is ini- of their large package outlines. For
– Selectable Product ID tialised by writing to internal regis- our PCI experimentation card in this
– 8/16 bit Bus with CS signals ters over the PCI interface. The PCI project, the PCI controller has been
BIOS will recognise each of the PCI implemented in an ispLSI1032 pro-

10 Elektor Electronics 2/2001

 COMPUTER

grammable chip from Lattice. This Technical Data

solution is not optimal for every PCI Digital Output: 1 x TTL level (0/+5 V)
application — it was developed to Modes: TTL OUT port polling,
be used for current 16 bit ISA appli- or program controlled
cations. The decoder is intended to PCI Decoder: 1 x ispLSI 1032E (Lattice)
be used for the slow and middle Vendor-ID: KOLTER 0x1001
Product-ID: KOLTER 0x0017 (adjustable)
speed data rate of the PCI specifica-
Addressing: variable, PNP (Plug and Play)
tion less than or equal to 33 MHz,
Bus: 32/64 bit PCI
supporting the specifications 2.1 and
User Interface: 8/16 bit
2.2 of the PCISIG group of the PC98
Connectors:
and PC99 specification. The PCISIG
37 pin sub-D connector (K4), connector on slot bracket
group is also responsible for assign-
Pin strips for the breadboard wiring:
ing a unique Vendor Identity (VID)
1 x 9 pin. (K9), ±15 V, AGND and +5 V, GND, power supply for analogue prototyping
code to each manufacturer of PCI
components.
compatible products and also a 1 x 6 pin. (K8), interrupt select
Device ID code for each type of PCI 2 x 17 pin (K5), patch pins for the output socket. (see Figures 1 and 5)
product that the manufacturer pro- 1 x 3 pin (K6), not defined. Useful for application-specific prototyping signals.
duces. These codes, along with 1 x 6 pin (K10), 3 way power supply +5 V, GND, for prototyping digital circuits.
information of the cards I/O and 1 x 16 pin (K3), data bus
memory address range and inter- 1 x 16 pin (K2), I/O-Bus
rupts, are contained in a 64-byte Dimensions:
information header stored on the 95 x 215 mm (card dimensions without bracket)
card. This information is read by the Temperature range 0-70 °C typical. (continuous operation)
PCI BIOS whenever the computer is Storage temperature −20 to +85 °C
re-booted.

2/2001 Elektor Electronics 11

COMPUTER

Card features
The PCI prototyping card provides an area of
through-plated holes of 87 × 37 solder points
(minus 46 × 21 for the PCI decoder). This
breadboard area provides a useful space to
lay out prototype hardware rapidly and eas-
ily for your specific PCI application, e.g., A/D
or D/A converters, TTL I/O circuitry or gen-
eral-purpose interfaces. A power supply pro-
viding ±15 V from a separate DC/DC con-
verter is also included on the card and a 16
bit data bus together with a series of port
addresses ensures that you will be able to
access your hardware in under 90 ns. All the
necessary components are provided on the
card and configured to transfer data to and
from the PCI bus.
Configuration of the card address occurs
automatically with Plug and Play (PNP).
Extensive PCI tools running under Windows
95/98/NT and 2000 enable the address I/O
address range of the card to be determined.
No further initialisation of the components is
necessary to be able to read and write to the
card at register level.

The circuit
A quick look at the block diagram in Figure 1
shows that the PCI prototyping card consists
of four main parts: Figure 1. Overview of the functional blocks of the PCI prototyping card. An expla-
IC1: PCI bus adapter chip type ISPLSI1032 nation of the abbreviations used is given in the inset.

Abbreviations used in the Block Diagram

PCI/USER Interface: Bus interface with bi-directional port and bus driver for the signals: CLK, System Pin, Address/Data Pins, CBE and
other Interface-Control Pins along with Error Reporting Pins.
STM, DEC and CFG-ID: STM stands for State Machine, this reads out the information to the PCI bus over the 4:1 32-bit multiplexer of
all the 64 bytes of CFG registers when the information request is made by the PCI BIOS, e.g., during computer boot-up. The CFG
register is ‘pre-wired’. The product ID inputs ID0, ID1 and ID2 allow selection of one of eight ID’s. The Vendor ID is pre-pro-
grammed and not selectable.
UIF and Bus-MUX: Bus driver and Turnaround are generated here for the PCI target. The bus multiplexer co-ordinates the address and
data in both directions. All the read and write instructions are used in this interface.
TCB: The Timing Correction Block generates pre-defined Bus Cycles so that the user bus runs with precise timing. This block is neces-
sary to cater for motherboards with different bus timings.
PGM: Programming Interface for the ispLSI chip (not freely accessible).
ALE: Address Latch Enable, switches the multiplexed user bus between address and data.
D0 - D15: 16-bit wide data bus. Data is latched with ALE and CSL/CSH.
A2 - A7: Address lines used to generate the memory mapped chip selects. Address line A0 is not used (decoded from CSL and CSH)
Address line A1 is also not used. Only the lower 16 bits of the 32-bit data word can be decoded.
RW: User Bus Signal Read/Write: for decoding the read and write cycles for the I/O timing
CSL / CSH: Chip Select Low and Chip Select High signal. When an 8-bit input or output is performed CSL will be active when the lower
8 bits of the 16 bit data word are used and CSH will be active when the upper 8 bits are used. If a 16-bit instruction is used then both
lines are active so that a 16-bit word can be read or written in one cycle. It is always the lower 16 bits of a 32-bit data word that are
decoded.
RESET: Activating this line will force the chip into its initialisation configuration.

12 Elektor Electronics 2/2001

 COMPUTER

with ID switch. quency Interference (RFI) suppres- K4 is a sub D type connector providing con-
IC2: address decoder gate array sion components. nections to external signals.
type GAL 22V10. K2 to K10: these rows of pin strips
IC4: DC/DC voltage converter and connectors are free to be wired Looking (ahead) at the circuit diagram (Fig-
chip together with its Radio Fre- to the prototyping area of the card. ure 2) and the PCB layout in Figure 3 you’ll

+5V +5V +5V

C5 K2
CS1

K1 PCI Slot 100n CS2

21 65
CS3
A1 B1 24
TRSI +12V AD24 26 68 AD4 CS4
A2 B2 I/O 0 I/O 32
+12V TCK C/BE3 27 69 AD3 PCI-ALE 1 IO-WR
A3 B3 I/O 1 I/O 33 I1
TMS GND IDSEL 28 70 AD2 D1 2 23 CS1 IO-RD
A4 B4 I/O 2 I/O 34 I2 O1
TDI TDO AD23 29 71 AD1 D2 3 22 CS2 ADR2
A5 B5 I/O 3 I/O 35 I3 O2
+5V +5V AD22 30 72 AD0 D3 4 21 CS3 ADR3
INTA A6 B6 I/O 4 I/O 36 I4 O3
INTA +5V AD21 31 73 PCI-CSL D4 5 IC2 20 CS4 ADR4
INTC A7 B7 INTB I/O 5 I/O 37 I5 O4
INTC INTB AD20 32 74 PCI-CSH D5 6 19 IO-WR DIGI
A8 B8 INTD I/O 6 I/O 38 I6 O5
+5V INTD AD19 33 75 D0 PCI-RW 7 GAL 18 IO-RD PCI-CSL
A9 B9 I/O 7 I/O 39 I7 O6
Reserved PRSNT1 AD18 34 76 D1 PCI-CSL 8 22V10 17 ADR2 PCI-CSH
A10 B10 I/O 8 I/O 40 I8 O7
VCC(5V/3V3) Reserved AD17 35 77 D2 PCI-CSH 9 16 ADR3 PCI-RW
A11 B11 I/O 9 I/O 41 I9 O8
Reserved PRSNT2 AD16 36 IC1 78 D3 D0 10 15 ADR4 PCI-ALE
A12 B12 I/O 10 I/O 42 I10 O9
C/BE2 37 79 D4 D1 11 14 DIGI RST-OUT
A13 B13 I/O 11 I/O 43 I11 O10
FRAME 38 80 D5 RST-OUT 13
A14 B14 I/O 12 I/O 44 I12
Reserved Reserved IRDY 39 81 D6 +5V
RST A15 B15 I/O 13 I/O 45
RST GND TRDY 40 82 D7
A16 B16 CLKPCI I/O 14 I/O 46 12
VCC(5V/3V3) CLK DEVSEL 41 83 D8
A17 B17 I/O 15 I/O 47
* C7 R2

22k
GNT GND +5V
A18 B18 PERR 45 ispLSI1032 3 D9
GND REQ I/O 16 I/O 48
A19 B19 SERR 46 4 D10 100µ
Reserved (5V/3V3)VCC I/O 17 I/O 49
AD30 A20 B20 AD31 PAR 47 5 D11
AD30 AD31 R5 1 8x 10k
I/O 18 I/O 50
* C6 R1

1k
A21 B21 AD29 AD15 48 6 D12
+3V3 AD29 I/O 19 I/O 51
AD28 A22 B22 C/BE1 49 7 D13
AD28 GND I/O 20 I/O 52 100µ
AD26 A23 B23 AD27 AD14 50 8 D14
AD26 AD27 I/O 21 I/O 53
A24 B24 AD25 AD13 51 9 D15
GND AD25 I/O 22 I/O 54 2 3 4 5 6 7 8 9 K3 +5V
AD24 A25 B25 AD12 52 10 PCI-ALE D0
AD24 +3V3 I/O 23 I/O 55
IDSEL A26 B26 C/BE3 AD11 53 11 PCI-RW D1
IDSEL C/BE[3] I/O 24 I/O 56
A27 B27 AD23 AD10 54 12 AD31 D2 IC3
+3V3 AD23 I/O 25 I/O 57 1 8
AD22 A28 B28 AD9 55 13 AD30 D3
AD22 GND I/O 26 I/O 58 EN
AD20 A29 B29 AD21 AD8 56 14 AD29 D4
AD20 AD21 I/O 27 I/O 59 OSC
A30 B30 AD19 C/BE0 57 15 AD28 D5 5
GND AD19 I/O 28 I/O 60 CLK
AD18 A31 B31 AD7 58 16 AD27 D6
AD18 +3V3 I/O 29 I/O 61 4 / 8MHz
AD16 A32 B32 AD17 AD6 59 17 AD26 D7
AD16 AD17 I/O 30 I/O 62
A33 B33 C/BE2 AD5 60 18 AD25 D8
+3V3 C/BE[2] I/O 31 I/O 63 4
FRAME A34 B34 D9
FRAME GND
A35 B35 IRDY ISPSDI 25 20 CLKPCI D10
GND IRDY SDI/IN0 Y0
TRDY A36 B36 ISPMODE 42 66 D11
TRDY +3V3 MODE/IN1 Y1
A37
GND DEVSEL
B37 DEVSEL ISPSDO 44
SDO/IN2 Y2
63 D12
* zie tekst

A38
STOP GND
B38 ISPSCLK 61
SCLK/IN3 Y3
62 D13
* see text
voir texte
A39
+3V3 LOCK
B39 PSW0 67
IN4 K6 *
D14
* siehe Text
A40
A41
SDONE PERR
B40
B41
PERR PSW1
PSW2
84
2
IN5
24 ISPRES
D15
*
SBO +3V3 IN6 RESET 2 3 4 5 6 7 8 9
A42 B42 SERR RST 19 23 ISPEN +5V K4
GND SERR IN7 ispEN
PAR A43 B43
PAR +3V3 1
AD15 A44 B44 C/BE1
AD15 C/BE[1] 1 22 43 64 20
A45 B45 AD14
+3V3 AD14 +5V R6 1 8x 10k DIGI 2
AD13 A46 B46
AD13 GND ST34 21
AD11 A47 B47 AD12 S1
AD11 AD12 ST1 3
A48 B48 AD10 PSW0 8 1 R3
GND AD10 DIGI ST2 22
AD9 A49 B49 PSW1 7 2 C8
3k9

AD9 M66EN ST3 4

PSW2 6 3 D1
10n ST4 23
ISPSDI 5 4
ST5 5
C/BE0 A52 B52 AD8 C9
C/BE[0] AD08 R4 ST6 24
A53 B53 AD7 +5V
+3V3 AD07
1k

10n ST7 6
AD6 A54 B54 ISPSDI
AD6 +3V3 ST8 25
AD4 A55 B55 AD5 +5V
AD4 AD05 C1 C2 C3 C4 ST9 7
A56 B56 AD3
AD2 A57
GND AD03
B57 ISPSDO 2
K7 * 1
ST10 26
AD2 GND 100n 100n 100n 100n
ST11 8
AD0 A58 B58 AD1 ISPEN 4 3
AD0 AD01 ST12 27
A59 B59 ISPMODE 6 5
+5V VCC(5V/3V3) (5V/3V3)VCC ST13 9
A60 B60 ISPSCLK 8 7
REQ64 ACK64 ST14 28
A61 B61
+5V +5V ST15 10
A62 B62 ISPRES K5
+5V +5V ST1 1 2 ST2 ST16 29
ST3 3 4 ST4 ST17 11
K8
INTA ST5 5 6 ST6 ST18 30
INTB ST7 7 8 ST8 ST19 12
INTC ST9 9 10 ST10 ST20 31
INTD ST11 11 12 ST12 ST21 13
RST ST13 13 14 ST14 ST22 32
CLKPCI ST15 15 16 ST16 ST23 14
+5V
ST17 17 18 ST18 ST24 33
L1 +5V ST19 19 20 ST20 ST25 15
14 +VCC 11
-VOUT -15V ST21 21 22 ST22 ST26 34
2µH7
C13 C10 -15V K9 K10 ST23 23 24 ST24 ST27 16
IC4 ST25 25 26 ST26 ST28 35
100n L3 100n AGND
C12 NMH0515S ST27 27 28 ST28 ST29 17
8
COM AGND ST29 29 30 ST30 ST30 36
2µH7
220µ DCDC C14 C11 +15V ST31 31 32 ST32 ST31 18
ST33 33 34 ST34 ST32 37
100n L2 100n
ST33 19
1 9
GND +VOUT +15V
2µH7
+5V 010009 - 11

Figure 2. Circuit diagram of the PCI prototyping card. The biggest part of the circuit, the PCI bridge which links the PCI bus to the proto-
typing area circuits, is implemented in the ispLSI-Chip.

2/2001 Elektor Electronics 13

COMPUTER

R4
D1

R6 R5
K9 K10

010009 C10
K3
K5 C11 S1

K4
L1
L3
L2

K8

IC2
C2 C7
C1 K2

IC1
C14
C13
K6
K7
C4 C6 C5
C9 R2
IC4 R3
R1
C12 C8 IC3
C3

010009

Figure 3. PCB layout and component placement plan.

notice that the most complex function of the the ‘PCI target bridge’. A key to the and in this case has the value
circuit is performed by IC1, the pre-pro- abbreviations used on this diagram 0x1001. This is the VID of Kolter Elec-
grammed LSI chip ispLSI1032 from Lattice. is given at the end of the text. tronic, Germany, and can be used on
The block diagram for the present PCI card The Vendor ID code mentioned all the applications in which the
in shown in Figure 1. IC1 is shown here as earlier is pre-programmed into IC1 ispLSI-chip from Kolter is employed.

14 Elektor Electronics 2/2001

 COMPUTER

ing the bus to 32 bits wide is unfortunately

COMPONENTS LIST 010009-42)* not possible with this LSI.
IC3 = oscillator module in 8-pin DIL
DIP switch S1 has two functions. The
Resistors: case (see text)
IC4 = NMH0515S (see text)
fourth of the four switches, S1-4, allows the
R1,R4 = 1kΩ
switching between the PCI local specification
R2 = 22kΩ
R3 = 3kΩ9 Miscellaneous: 2.1 and 2.2 while switches S1-1, S1-2 and S1-
R5,R6 = array 8 x 10kΩ K1 = PCB edge connector for PCI bus 3 allow the device ID to be changed (Figure
K2,K3 = 16-pin SIL pinheader 4). This allows several PCI prototyping cards
Capacitors: K4 = 37-pin sub-D socket to be plugged into the same PCI bus, and the
C1-C5,C10,C11,C13,C14 = 100nF K5 = 34-pin boxheader or pinheader control software will be able to distinguish
C6,C7 = 100µF 16V K6 = not fitted** between each card on the basis of its vendor
C8,C9 = 10nF K7 = not fitted ** ID, device ID and its slot number.
C12 = 220µF 16V K8,K9,K10= 6-pin pinheader
IC2 is a programmed gate array containing
S1 = 4-way DIP switch
PCB, order code 010009-1*
an address decoder which produces four chip
Inductors:
L1,L2,L3 = 2µH7 (see text)
selects outputs CS1, CS2, CS3 and CS4 and
* For programmed controllers, GALs generates a RD and WR signal along with
Semiconductors: and PCB, see Readers Services pages three decoded address lines ADR2, ADR3 and
D1 = LED elsewhere in this issue, or website at ADR4. A 1-bit digital output also provides an
IC1 = ispLSI1032 (order code http://www.elektor- indication that the circuit is working correctly
010009-41)* electronics.co.uk. by its output to LED D1 via resistor R4. It is
IC2 = GAL22V10 (order code ** See text important to note here that when chip select
CS1 and CS3 are active, data transfer occurs
over the data bus pins D0 to D7. When CS2
and CS4 are active, data transfer occurs over
D8 to D15. When a 16-bit transfer occurs, CS1,
CS3 and CS2, CS4 are active.
The programming data for the GAL is
freely available and is shown in Figure 5. The
IC1 forms the bridge between the leave the other 8 bus bits unused. GAL listing is also given in one of the files
computer PCI bus and the 16-bit The data transfer rate will be halved, that can be downloaded from the Free Down-
wide bus of this prototyping card. If but this is not always an important loads section of the Elektor Electronics web-
your application only requires an 8 criterion and may be perfectly ade- site at http://www.elektor-electronics.co.uk.
bit bus then it is a simple matter to quate for your application. Expand- Using this information it is possible to change

2/2001 Elektor Electronics 15

COMPUTER

Building vers are also example programs

ON together with their source code run-
your own circuits ning on DOS, Windows 9x, Windows
4 When constructing your own circuits 2000/NT and Linux. This software is
on the breadboard area of the card it also available on a CD-ROM called
3 is possible to use IC’s from the ‘PC Card Software CD’ from Kolter
74ALS, 74ACT, 74AHC or 74F fami- Electronics. Also included on the CD
2 lies. The 74HCT family of devices are shareware programs, demos,
has a switching speed that is just on datasheets, PCI card documentation
1 the limit of acceptability when used and useful Internet links.
on the PCI card, and reliable opera-
010009 - 14 tion of the hardware cannot be guar- Use with DOS
anteed. A test circuit was built using
HCT devices in the Elektor Electron- For operation of the PCI prototype
Figure 4. Selecting the Product ID with the DIL ics laboratory, and when these chips card on a computer using DOS, it is
switch (example shown 17 hex). were swapped with HCT devices not necessary to add any drivers in
from a different manufacturer, the cir- the CONFIG.SYS or AUTOEXEC.BAT
cuit failed to work. In the interests of files. DOS software can directly
reliability, it is wise not to include access the hardware using the
the chip selects or generate new I/O signals HCT devices in your designs built on assembler instructions IN and OUT.
for your own applications or special proces- this prototyping card.
sor control signals. If you are interfacing to any of the PCIVIEW
The programming tools for the Lattice GAL PCI bus signals, it is important to This DOS program displays all the
are available from the Internet. If you intend note that the specification for this installed PCI bus components
to redesign the address decoder, it should be bus allows a maximum of one TTL together with information showing
noted that half of the 256 addresses are used load on each of the PCI bus signals each Vendor ID and Device ID. It also
because we only use 16 of the 32 bits avail- with a maximum track capacitance shows (in as far as possible) the man-
able. All addresses with address bit A1 set to of 10 pF. This means that apart from ufacturer’s name and a description of
a ‘1’ are invalid. the PCI decoder chip it is not possi- all devices used on the card. A more
ble to make any further connections important feature of this program is
Additional features to the PCI bus connector. If the PCI that is shows the base address of the
decoder chip IC1 is used in another card connected to the PCI bus. This
In addition to the basic ICs necessary to per- development circuit, it is vital that information allows you to determine
form the PCI interface, there are also some the track layout to this chip is the the I/O address of the card and use
pre-wired IC positions on the PCB to accept same as in this PCI prototyping card. this value in your own software to
additional ICs that may be useful for proto- Changes to the track layout or track read and write to the PCI card.
typing. length can cause timing problems in One important point to watch
Components R1, R2 and C6, C7 can be fit- the PCI decoder chip. The 16-bit here is that the address allocation of
ted to build a reset circuit in one of two vari- data bus is provided for circuit the card may be altered automati-
ants: either active-Low or active-High reset. expansion. cally if there is a change in the PCI
Fitting R1, R2 and C7 will produce an active- system, e.g., installing new compo-
High reset signal at the RST-OUT pin while The Software Driver nents or removal of hardware. In that
fitting R1,R2 and C6 will produce an active- case, you will also need to change
Low reset signal. In this case, R2 is 1 kΩ and The driver for the PCI prototyping the corresponding address in your
R2, 22 kΩ. It should be noted that either C6 or card can be downloaded from the software.
C7 should be fitted but not both. Free Downloads section, February Using the PCI card base address
The position for IC3 will accept a clock 2001 items, on the Elektor Electron- in your program is the most direct
generator chip and that for IC4, a DC/DC con- ics internet site http://www.elektor- method of programming the card,
verter type NMH 0512S or NMH 0515S for electronics.co.uk. Along with the dri- although it means that the resulting
generating either ±12 V or ±15 V respectively. program will not be portable, that is,
These supply voltages are the most useful it will only run in this one environ-
when prototyping with analogue devices. ment and not on another PC or if
Capacitors C10 to C14 and inductors L1 Table 1 changes are made to the hardware
and L2 will filter out any nasty supply spikes. configuration. To make the program
Outputs of the address
Placing jumpers across the pins of K7 will portable it is necessary to make use
allow the ‘In Circuit Programming’ mode to decoder implemented in of the PCI functions of the PC BIOS
be enabled of the LSI IC1. This is primarily GAL IC2 because DOS does not have PCI
intended as an aid for the development of the CS1 Base + 0 Applications Programming Interface,
LSI. Those of you who are not familiar with CS2 Base + 1 API.
these features of this LSI are advised to leave
CS3 Base + 4
K7 unused, otherwise you run the risk that PCI_ADR
CS4 Base + 5
the PCI card may no longer function. This program is similar to PCIVIEW

16 Elektor Electronics 2/2001

 COMPUTER

but only shows information of PCI

devices with the Kolter Electronics
vendor ID (including this PCI proto-
typing card).

Use with Windows

95/98/NT
The installation of the PCI prototyp-
ing card is just as simple as with any
other PCI cards under Windows
95/98. After fitting the card in the PC
it will be recognised by Windows
when the PC is turned on. You will
be presented with the message that
the new PCI card has been detected
and then asked which driver to
install. You now need to refer to the
file KOLTER.INF (see the chapter on
drivers). Windows now looks for the
KLIBNDRV.VXD file and installs the
driver. When the computer is re-
started the PCI prototyping card will
be installed.

HWT
The Hardware Test Program HWT is
a PCI diagnosis program running
under windows. Besides the manu-
facturer’s vendor ID and the equip-
ment device ID it also shows the I/O
base address of the card. The dis-
played base address has been incre-
mented by one so that for example a
address shown as E001 is actually
E000. The address space of the PCI
card extends from this base address
over a 256-byte area. In our example,
the actual address range would be
from E000 to E0FF. Using the base
address, it is possible to access the Figure 5. Overview of the pinheaders and main elements on the board.
ports using 8- or 16-bit data width.
The functions Read*106 and
Write*106 are included and can be
used to determine the maximum can then be launched from Explorer. Use with Linux
data flow through the port of your Users of the Linux operating system will find
computer. Clicking on this function Example Program it generally very simple to program hardware
will perform 1000000 Port cycles. This program, complete with the cards such as I/O cards, A/D and D/A con-
Measuring the time taken will give Delphi source code, allows you to verters using the GNU-C compiler. Compar-
the throughput of your system. The rapidly test your own circuitry in the ing it with the MS operating system you will
hardware table is a standard text file breadboard area of the PCI prototyp- find that there are no hidden access mecha-
and can be easily expanded to your ing card. It also allows you to see if nisms or tricks that you normally find neces-
requirements. the PCI card itself is functioning cor- sary with MS operating system program-
With Windows 95/98/ME you rectly by flashing the test LED on the ming. The Linux operating system and Linux
don’t need any further registration to card. application software is openly available and
use HWT — all the data files can be more often than not free. Programming in
stored in any subdirectory. If you are An NT driver is available for Win- Linux is so much simpler that anyone famil-
using Windows NT4/2000 then it is dows 2000/NT. Details are available iar with ANSI-C should have no problems.
necessary to copy SYS data into the at the web address http://www.pci- The instructions ioperm and iopl give the
directory c:\Winnt\system32\drivers card.com. (see web links at the end program permission to access the I/O ports
and then re-boot the system. HWT of this article). without the need for any additional device

2/2001 Elektor Electronics 17

COMPUTER

drivers or the need for any extra cryptic figuration and the PCI bus connec-
include statements in the compilation tor pin assignments in 5 V and 3.3 V Supplier reference:
process. The programming process is similar systems. Kolter Electronic,
to ANSI-C running in DOS but instead of only (010009-1) PO Box 1127,
an 8-bit wide data access you can also use 16 D-50362 Erftstadt,
or 32 bit. To actually move data through the Germany.
ports, instructions such as Tel. (+49) 2235 76707,
outb(value,address) and Suggested literature: Fax (+49) 2235 72048.
inb(address) are contained in the directory PCI Bus Demystified, by Doug Abbott,
/usr/include/asm/io.h. These routines are all LLH Technology Publishing, ISBN 1-
inline macros so it is only necessary to 878707-54-x.
#include<asm/io.h>. No additional
libraries are required. Compilation of the pro-
gram can be performed with XWPE under
KDE or with gcc from the Linux ‘bash’ shell.
Other compilers can also be used to compile
the code and they generally seem to suffer
fewer problems than when under other oper- Web Links
ating systems. Extensive information on the Links for the PCI prototyping card and PCI decoder:
use of the Linux operating system is available
http://www.pci-card.com/pcintern.htm
as a download from the Elektor Electronics http://www.pci-card.com/neuep.htm#proto3
website. http://www.pci-card.com/Prototim.pdf
http://www.pci-card.com/pcideko.pdf
Data transfer, timing and http://www.pci-card.com/pcideko.html
addressing http://www.pci-card.com/pciversion.html
http://www.pci-card.com/pciboards.html
The second instalment of this article will http://www.pci-card.com/Hwt.zip
explore in detail the high speed data trans- http://www.pci-card.com/pci_pins.htm
fer, timing and addressing of the PCI bus http://www.pci-card.com/pro3pci.zip
architecture, it will also look at the BIOS con-

18 Elektor Electronics 2/2001