0% found this document useful (0 votes)

5 views

C3-Combinational Logic Circuits

Uploaded by

Trung Nghị Phạm

Available Formats

Download as PDF, TXT or read online on Scribd

0% found this document useful (0 votes)

5 views

C3-Combinational Logic Circuits

Uploaded by

Trung Nghị Phạm

Available Formats

Download as PDF, TXT or read online on Scribd

You are on page 1/ 23

12/17/2022

Chapter 3 Objectives
Chapter 3 – Combinational Logic Circuits
• Selected areas covered in this chapter:
– Converting logic expressions to sum-of-products
expressions.
– Boolean algebra and the Karnaugh map as tools to
simplify and design logic circuits.
– Operation of exclusive-OR & exclusive-NOR circuits.
– Designing simple logic circuits without a truth table.
– Basic characteristics of TTL and CMOS digital ICs.
– Basic troubleshooting rules of digital systems.
– Programmable logic device (PLD) fundamentals.
– Hierarchical design methods.
– Logic circuits using HDL control structures IF/ELSE,
IF/ELSIF, and CASE.
Digital Systems: Principles and Applications, 11/e Copyright © 2011, 2007, 2004, 2001, 1998 by Pearson Education, Inc.
Ronald J. Tocci, Neal S. Widmer, Gregory L. Moss Upper Saddle River, New Jersey 07458 • All rights reserved

3-1 Sum-of-Products Form 3-1 Sum-of-Products Form

• A Sum-of-products (SOP) expression will appear • The product-of-sums (POS) form consists of two
as two or more AND terms ORed together. or more OR terms (sums) ANDed together.

Digital Systems: Principles and Applications, 11/e Copyright © 2011, 2007, 2004, 2001, 1998 by Pearson Education, Inc. Digital Systems: Principles and Applications, 11/e Copyright © 2011, 2007, 2004, 2001, 1998 by Pearson Education, Inc.
Ronald J. Tocci, Neal S. Widmer, Gregory L. Moss Upper Saddle River, New Jersey 07458 • All rights reserved Ronald J. Tocci, Neal S. Widmer, Gregory L. Moss Upper Saddle River, New Jersey 07458 • All rights reserved
12/17/2022

3-2 Simplifying Logic Circuits 3-3 Algebraic Simplification

• The circuits shown provide the same output • Place the expression in SOP form by applying
– Circuit (b) is clearly less complex. DeMorgan’s theorems and multiplying terms.
• Check the SOP form for common factors.
– Factoring where possible should eliminate one
or more terms.

Logic circuits can be simplified using

Boolean algebra and Karnaugh mapping.

3-3 Algebraic Simplification 3-3 Algebraic Simplification

Simplify the logic circuit shown. Simplify the logic circuit shown.

The first step is to determine the expression for the output: z = ABC + AB • (A C) Factoring—the first & third terms above have
AC in common, which can be factored out:
Once the expression
is determined, break Since B + B = 1, then…
down large inverter
signs by DeMorgan’s
theorems & multiply Factor out A, which results in…
out all terms.

3-3 Algebraic Simplification

Simplifed logic circuit.

Problems

z = A(C + B)

Digital Systems: Principles and Applications, 11/e Copyright © 2011, 2007, 2004, 2001, 1998 by Pearson Education, Inc. 10
Ronald J. Tocci, Neal S. Widmer, Gregory L. Moss Upper Saddle River, New Jersey 07458 • All rights reserved

3-4 Designing Combinational Logic Circuits

• To solve any logic design problem:

Problems – Interpret the problem and set up its truth table.
– Write the AND (product) term for each case where output = 1.
– Combine the terms in SOP form.
– Simplify the output expression if possible.
– Implement the circuit for the final, simplified expression.

Circuit that
produces a 1
output only for
the A = 0, B = 1
condition.

11 Digital Systems: Principles and Applications, 11/e Copyright © 2011, 2007, 2004, 2001, 1998 by Pearson Education, Inc.
Ronald J. Tocci, Neal S. Widmer, Gregory L. Moss Upper Saddle River, New Jersey 07458 • All rights reserved
12/17/2022

3-4 Designing Combinational Logic Circuits 3-4 Designing Combinational Logic Circuits

Each set of input conditions that is to produce a Truth table for a 3-input circuit.
1 output is implemented by a separate AND gate.
The AND outputs are ORed to produce the final output.
AND terms for each
case where output is 1.

3-4 Designing Combinational Logic Circuits 3-4 Designing Combinational Logic Circuits

Design a logic circuit with three inputs, A, B, and C. Design a logic circuit with three inputs, A, B, and C.
Output to be HIGH only when a majority inputs are HIGH. Output to be HIGH only when a majority inputs are HIGH.
Simplified output expression:
AND terms for each
Truth table. case where output is 1.

Implementing the
circuit after factoring:

SOP expression for the output:

Since the expression is in SOP form, the circuit is a

group of AND gates, working into a single OR gate,

Problems Problems

17 18

Problems

19 20
12/17/2022

3-5 Karnaugh Map Method 3-5 Karnaugh Map Method

• A graphical method of simplifying logic equations Four-variable K-Map.

or truth tables—also called a K map.
• Theoretically can be used for any number of input
variables—practically limited to 5 or 6 variables.

The truth table values are placed in the K map.

Shown here is a two-variable map.

Adjacent K map square differ in only one

variable both horizontally and vertically.
A SOP expression can be obtained by
ORing all squares that contain a 1.

3-5 Karnaugh Map Method 3-5 Karnaugh Map Method

Five-variable K-Map.

3-5 Karnaugh Map Method 3-5 Karnaugh Map Method

Six-variable K-Map. Seven-variable K-Map.

3-5 Karnaugh Map Method 3-5 Karnaugh Map Method

Eight-variable K-Map. • When the largest possible groups have been

looped, only the common terms are placed
in the final expression.
– Looping may also be wrapped between top, bottom,
and sides.

3-5 Karnaugh Map Method 3-5 Karnaugh Map Method

• Looping • Looping Groups of Two (Pairs)

The expression for output X can be simplified by
properly combining those squares in the K map that
contain 1s. The process for combining these 1s is
called looping.

3-5 Karnaugh Map Method 3-5 Karnaugh Map Method

• Looping Groups of Four (Quads) • Looping Groups of Eight (Octets)

3-5 Karnaugh Map Method Problems

• Complete K map simplification process:
– Construct the K map, place 1s as indicated in the truth table.
– Loop 1s that are not adjacent to any other 1s.
– Loop 1s that are in pairs.
– Loop 1s in octets even if they have already been looped.
– Loop quads that have one or more 1s not already looped.
– Loop any pairs necessary to include 1st not already looped.
– Form the OR sum of terms generated by each loop.

When a variable appears in both complemented and

uncomplemented form within a loop, that variable
is eliminated from the expression.

Variables that are the same for all squares of

the loop must appear in the final expression.

Digital Systems: Principles and Applications, 11/e Copyright © 2011, 2007, 2004, 2001, 1998 by Pearson Education, Inc. 34
Ronald J. Tocci, Neal S. Widmer, Gregory L. Moss Upper Saddle River, New Jersey 07458 • All rights reserved

Problems Problems

35 36
12/17/2022

3-6 Exclusive OR and Exclusive NOR Circuits

• The exclusive OR (XOR) produces a HIGH

Problems output whenever the two inputs are at
opposite levels.

37 Digital Systems: Principles and Applications, 11/e Copyright © 2011, 2007, 2004, 2001, 1998 by Pearson Education, Inc.
Ronald J. Tocci, Neal S. Widmer, Gregory L. Moss Upper Saddle River, New Jersey 07458 • All rights reserved

3-6 Exclusive OR and Exclusive NOR Circuits 3-6 Exclusive OR and Exclusive NOR Circuits

Exclusive OR circuit and truth table. Traditional XOR gate symbol.

An XOR gate has only two inputs, combined so that x = AB + AB.

A shorthand way indicate the XOR output expression is: x = A B.
…where the symbol represents the XOR gate operation.
Output is HIGH only when the two inputs are at different levels.

Output expression: x = AB + AB Quad XOR chips containing four XOR gates.

74LS86 Quad XOR (TTL family)
This circuit produces a HIGH output whenever
74C86 Quad XOR (CMOS family)
the two inputs are at opposite levels. 74HC86 Quad XOR (high-speed CMOS)

3-6 Exclusive OR and Exclusive NOR Circuits 3-6 Exclusive OR and Exclusive NOR Circuits

• The exclusive NOR (XNOR) produces a HIGH Exclusive NOR circuit and truth table.
output whenever the two inputs are at the
same level.
– XOR and XNOR outputs are opposite.

Output expression: x = AB + AB
XNOR produces a HIGH output whenever
the two inputs are at the same levels.
Digital Systems: Principles and Applications, 11/e Copyright © 2011, 2007, 2004, 2001, 1998 by Pearson Education, Inc. Digital Systems: Principles and Applications, 11/e Copyright © 2011, 2007, 2004, 2001, 1998 by Pearson Education, Inc.
Ronald J. Tocci, Neal S. Widmer, Gregory L. Moss Upper Saddle River, New Jersey 07458 • All rights reserved Ronald J. Tocci, Neal S. Widmer, Gregory L. Moss Upper Saddle River, New Jersey 07458 • All rights reserved

3-6 Exclusive OR and Exclusive NOR Circuits 3-6 Exclusive OR and Exclusive NOR Circuits

Traditional XNOR gate symbol.

Truth table and circuit

for detecting equality of
An XNOR gate has only two inputs, combined so that x = AB + AB.
two-bit binary numbers.
A shorthand way indicate the XOR output expression is: x = A B.
XNOR represents inverse of the XOR operation.
Output is HIGH only when the two inputs are at the same level.

Quad XNOR chips with four XNOR gates.

74LS266 Quad XNOR (TTL family)
74C266 Quad XNOR (CMOS)
74HC266 Quad XNOR (high-speed CMOS)

Problems

45 46

Problems

47 48
12/17/2022

3-7 Parity generator and checker 3-7 Parity generator and checker

The figure is one type of logic circuitry that is used

for parity generation and parity checking. This
particular example uses a group of four bits as the
data to be transmitted, and it uses an even parity bit.
It can be readily adapted to use odd parity and any
number of bits.

3-8 Enable/Disable Circuits

Problems • Situations requiring enable/disable circuits occur

frequently in digital circuit design.
– A circuit is enabled when it allows the passage
of an input signal to the output.
– A circuit is disabled when it prevents the passage
of an input signal to the output.

51 Digital Systems: Principles and Applications, 11/e Copyright © 2011, 2007, 2004, 2001, 1998 by Pearson Education, Inc.
Ronald J. Tocci, Neal S. Widmer, Gregory L. Moss Upper Saddle River, New Jersey 07458 • All rights reserved
12/17/2022

3-8 Enable/Disable Circuits 3-8 Enable/Disable Circuits

A logic circuit that will allow a signal to pass to output

only when control inputs B and C are both HIGH.
Otherwise, output will stay LOW.

3-8 Enable/Disable Circuits 3-8 Enable/Disable Circuits

A logic circuit that will allow a signal to pass to output A logic circuit with input signal A, control
only when one, but not both control inputs are HIGH. input B, and outputs X and Y, which operates as:
Otherwise, output will stay HIGH. When B = 1, output X will follow input A, and output Y will be 0.
When B = 0, output X will be 0, and output Y will follow input A.