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AMERICAN INTERNATIONAL
UNIVERSITY-BANGLADESH
Faculty of Engineering
Deriving logic equations and truth table from a given statement
Assignment Title: or expression and construction of combinational circuits

Assignment No: 02 Date of Submission: 23 June 2024

Course Title: DIGITAL LOGIC AND CIRCUITS LAB

Course Code: EEE3102 Section: N

Semester: Summer 2023-24 Course Teacher: MD.SHAORAN SAYEM
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Group Name/No.: 05

No Name ID Progra Signatur

m e
1 SOURAV SAHA 22-47911-2 BSc [CSE]

2 MD.ABIDUL ISLAM 22-47875-2 BSc [CSE]

3 MD.ROKIBUL HASAN SOURAV 22-48512-3 BSc [CSE]

4 MD MANSUR ISLAM 22-46550-1 BSc [CSE]

5 TONIMA ISLAM DRISTY 22-46686-1 BSc [CSE]

6 FASIAL AHMED 22-49591-3

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 Table of Contents

Title
Introduction

Theory and methodology

Apparatus
IC Configuration
Experimental Procedure
Hardware Implementation
Simulations
Answers to the Questions in the Lab Manual
Discussion
Conclusion
References
 Title: Deriving logic equations and truth table from a given statement or expression and construction of
combinational circuits

Introduction:
From any given logic statement, it is possible to construct a digital logic circuit. The first step in this process
is to construct a truth table and then determine a standard SOP (sum of products) or POS (product of sums).
At the same time, it is also possible to derive a logic expression from a given combinational circuit diagram
by observing the individual logic operations performed in the circuit and matching them with their
corresponding logic gates. Expressions are simplified using Boolean algebra and De Morgan's law or K-Map
to reduce the number of gates used. Then the circuit is implemented in the breadboard using gate ICs and
observed whether the output verifies the truth table of the given statement.

This experiment shows the students a practical verification of deriving logic equations and truth table from
combinational circuits. Knowing how to derive logic equations and truth table from combinational circuits
helps a person with detecting the output logic expressions from any unknown logic circuit.

Theory and Methodology:

Combinational circuits are built with logic gates and other components. It does not include any values to be

taken from a previous state of the circuit. Designing such a combinational digital system requires use of one

of the following methods: If a problem statement is given, the following steps will help designing the system

1. If a problem statement is given, the following steps will help designing the system
 2. Or if an expression is given, the following steps will help in designing the system

Some useful definitions related to these procedures are given below:

Boolean algebra: In Boolean algebra, a variable is a symbol used to represent an action, a condition, or data.
A single variable can only have a value of 1 or 0.

Variable: A symbol used to represent a logical quantity that can have a value of 1 or 0, usually designated by
an italic letter.

Complement: The inverse or opposite of a number. In Boolean algebra, the inverse function, expressed with
a bar over the variable.

Sum term: The Boolean sum of two or more literals equivalent to an OR operation.

Product term: The Boolean product of two or more literals equivalent to an AND operation.
Sum of Products (SOP): When two or more product terms are summed by Boolean addition, the resulting
expression is a sum of product. E.g.: Implementing an SOP expression simply requires doing OR the outputs
of two or more AND gates. A product term is produced by an AND operation, and the sum (addition) of two
or more product terms is produced by an OR operation. Therefore, an SOP expression can be implemented
by AND-OR logic in which the outputs of a number (equal to the number of product terms in the expression)
of AND gates connect to the inputs of an OR gate. A standard SOP expression is one in which all the
variables in the domain appear in each product term. E.g.: Standard SOP expressions are important in
constructing truthtables and in Karnaugh map simplification method. The SOP expression is equal to 1 only
if one or more of the product terms in the expression is equal to 1.

Product of Sums (POS): When two or more sum terms are multiplied, the resulting expression is a product
of sums (POS). E.g.: Implementing a POS expression simply requires ANDing the outputs of two or more
OR gates. A sum term is produced by an OR operation, and the product of two or more sum terms is
produced by an AND operation. Therefore, a POS expression can be implemented by logic in which the
outputs of a number (equal to the number of sum terms in the expression) of OR gates connect to the inputs
of an AND gate. A standard POS expression is one in which all the variables in the domain appear in each
sum term in the expression. E.g.: A POS expression is equal to 0 only if one or more of the sum terms in the
expression is equal to 0.

Karnaugh Map: A Karnaugh map provides a systematic method for simplifying Boolean expressions and, if
properly used, will produce the simplest SOP or POS expression possible le, known as the minimum
expression. A Karnaugh map is like a truth table because it presents all of the possible values of input
variables and the resulting output of each valued. Instead of being organized into columns and rows like
truth table, the Karnaugh map is an array of cells in which each cell presents binary value of the input
variables. The cells are arranged in a way so that the simplification of a given expression is simply a matter
of properly grouping the cells. Karnaugh maps can be used for expressions with two, three, four and five
variables. The number of cells in a Karnaugh map is equal to the total number of possible input variable
combinations as is the number of rows in a truth table.

Problem1. A Building has 4 floors which share the same water tank for water supply. To start the motor,
each floor has a designated switch- Ground Floor with switch A, 1st Floor with switch B, 2nd Floor with
switch C and 3rd Floor with switch D. The motor starts if someone presses the switch from the 3rd floor or
from both ground and 2nd floor or from 1st and 2nd floor. Our job is to design the system.

Problem2. For the expression K-MAP and the logic gate diagram. We found the truth-table, reduced
expression using Karnaugh Map/K -Map.

From the K-Map it is seen that there could be three combinations of high inputs. From those combinations
the expressions are:

Output Expression: Y = D + AC + BC
 = D + C (A+B)

Apparatus:

1. Digital trainer board

2. IC 7432
3. IC 7408
4. IC 7404
5. IC 7402
6. IC 7400
7. IC 7486
8. Connecting wires

Experimental procedure:
1. Using output Y we formed standard SOP expression.
2. We minimized the SOP expression using Boolean algebra and K-Map.
3. Then we performed hardware implementation of the circuit and compared with our truth table output.

Problem 1:
a) A truth table has been drawn to represent the output Y.
b) The truth table outputs have been used to form standard SOP and POS expressions.
c) The SOP expression has been minimized using Boolean algebra and K-Map. Hardware implementation of
the circuit has been performed and compared with the truth table output.

Problem 2:
a) A step-by-step truth table has been drawn to represent the outputs at each gate (1-6) and then the final
output at Y.
b) Output Y has been used to form a standard SOP expression.
c) The SOP expression has been minimized using Boolean algebra and K-Map. Hardware implementation of
the circuit has been performed and compared with the truth table output.
Hardware Implementation:
Problem 1:

Figure: A=1, B=1, Y=0 Figure: B=1, C=1, Y=1

Figure: A=1, C=1, Y=1 Figure: D=1, Y=1

Figure: A=1, B=1, C=1, D=1, Y=1

Problem 2:

Figure: A=1, B=0, C=0, Y=1 Figure: A=0, B=1, C=1, Y=1

Figure: A=0, B=0, C=0, Y=1 Figure: A=1, B=1, C=1, Y=0
Simulations:
Problem 1:

Figure: 1 Figure:2

Figure:3 Figure:4

Figure: 5 Figure:6
Figure:7 Figure:8

Figure:9 Figure:10

Figure: 11 Figure:12

Figure: 13 Figure:14
Figure: 15 Figure:16

Problem 2 :
 Answers:

Problem 1:

F = AC+BC+D

= (AC+BC+D)''

= ((AC)'(BC)'(D)')' [Using NAND]

F = (AC)” +(BC)” + D”
= ((A’ +C’)’ + (B’+ C’)’ + D)” [Using NOR]

Problem 2:

F=A'+B'C'

=(A'+B'C')''

=(A(B'C')')' [Using NAND]

F = A’ + B’C’
= A’ + (B+C)’
= (A’ + (B+C)’)” [Using NOR]

2. Develop the truth table for a certain three-input logic circuit with the output expression
Y=ABC+(AB)’C+A’BC+AB’C+A(B’+C).
Answer: The expressions can be simplified as:

Y=ABC+(AB)’C+A’BC+AB’C+A(B’+C)

= ABC + (A’+B’) C+ A’BC+ AB’C+AB’+AC

= ABC + A’C + B’C + A’BC+ AB’C+AB’+AC

= ABC+ A’BC + A’C+ AC+B’C+ AB’C+ AB’

= BC (A+A’) + C (A’+A) + B’C(1+A) + AB’

= BC.1+ C.1+B’C.1+ AB’ = BC+C+B’C+AB’

= C(B+1) + B’C+AB’ = C.1+ B’C+AB’

= C(1+B’) + AB’

= C+ AB’
Truth Table:

A B C Output(Y)
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1

3. Implement the following logic expressions with logic gates Y=ABC+AB+AC

Answer:

Simplifying the expression using NOR gate:

Y=(ABC)” + (AB)” + (AC)”

=(A’+B’+C’)’ + (A’ + B’)’ + (A’+C’)’

Simplifying the expression using NAND gate:

Y= (ABC + AB + AC)”
= (ABC)’. (AB)’. (AC)’)’

Result and Discussion: The experiment demonstrated the successful translation of abstract
logic statements into tangible hardware circuits, validating theoretical principles through
practical implementation. Despite encountering challenges such as IC integrity the results
closely aligned with theoretical expectations. Simulation aided in validating circuit
functionality, highlighting the importance of rigorous methodology. We make the circuit
efficiently by reducing the number of gates. The circuit we made connection was not loose,
gates were properly biased, all the output LEDs were working and the ICs that were being
used are not broken. So the practically obtained truth table exactly match the theoretical one.

Conclusion: In this lab we have been introduced with the combination circuits. At first, we
learned to construct a truth table and then to determine SOP or POS. By using logic gates and
other components we built combination circuits. We also used truth table to develop K-map
and by proper grouping in K-map we determined the output expression. The IC contains
protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions were taken to avoid applications of any voltage higher than maximum
rated voltages. For proper operation, Vin and Vout were constrained to the range GND to VCC.
The ICs were connected according to their pin configuration carefully.

References:

1) www.tutorialspoint.com
2) www.electronics-tutorials.ws
3) “Digital Fundamentals” by Thomas L. Floyd