ECEN 665 (ESS)

Radio Frequency Filters

Material courtesy of Fikret Dülger,

Texas A&M University

Electrical and Computer Engineering Department
Analog & Mixed-Signal Design Center
 Outline

] Problem Definition, Motivations and Research Goal

] A Fully-Integrated Q-Enhancement LC Bandpass Filter

\ Noise Analysis
\ Nonlinearity Analysis
\ IC Measurements of the Filter in 0.35μm CMOS

] Comparison with previous reported filters and

Conclusions

2
 Problem Definition and
Motivations

] Wireless Communication systems have become an

important part of our daily lives.

] The demand towards lower cost makes the task of

circuit designers more and more challenging.

] This translates into the circuit specifications with lower

power consumption, smaller die area but without any
compromise from higher performance .

3
 Problem Definition and
Motivations
] Transceiver front-ends are
the sections next to the
Image antenna.
LNA Reject
Filter to the

Frequency range of interest

IF Strip
]
is from 900 MHz to 2.4 GHz.
LO2

Duplexer

Baseband I ] In state-of-the-art solutions,

the bandpass filters are off-
PA BPF 90o LO1 chip.

Baseband Q
] MOTIVATION FOR
INTEGRATION!

4
 Research Goal

] The feasibility of a Q-enhanced bandpass filter designed

with a standard (low cost) CMOS technology at 2 GHz is
investigated.

\ The issue is addressed through the simulations, analyses, and

the experimental verification of a prototype designed and
fabricated in a 0.35μm CMOS technology.

5
 Q-Enhancement Bandpass Filters
Vdd

L L
Frequency
Control
C C
Vout- Vout+
+
+ Gloss -G +
Gm C Vin Gm
Vin Vout 2L
2 2 2

M1 M2
-G
2

Q - Enhancement
Control
1 Qo
Qo ≡ ⇒Q=
ω o LGloss 1−
G
Gloss
(a) (b)
(Gloss > G for stability ) 6
 A CMOS Programmable RF
Bandpass Filter
Vdd
Programmable in:
•Peak Gain (not exploited previously) L L
•Filter Q Vcontrol

•Center Frequency
( Frequency Tuning )

C C
Vout- Vout+

H ( jω o ) ≅ Gm ( jω o ) Q ω o L
M1 M2 M5 M6
+

Vin
Rdeg1 Rdeg2
-
1
ω o ≅
IQboost
LC IBias
( Q Tuning )
( Gain Tuning )

M4
M3 M7 M8

7
A CMOS Programmable Bandpass
Filter

] The peak gain programmability through the input Gm

stage.

Gm ( jω o )
H ( jω o ) ≅ = Gm ( jω o ) Q ω o L
Gloss − G

] Increasing Q also increases the peak gain.

] If ωοand Q are fixed, the peak gain can be modified

through Gm.
8
 Noise Analysis

RS

Cin Vin GmVin 2 L Gloss C 2

-G 2
Id Vout Itank IG
1 1

2
VR
S

Csb Rdeg 2 Mean square noise

IR
deg
Mean square noise current of the LC tank
current of the input
Gm stage

Mean square Mean square noise Mean square noise

noise voltage current of the source current of the negative
of the source resistance degeneration resistor conductance
generator
9
 Noise Analysis (contd.)
] The noise factor at ωo is obtained as
2
8kTGloss + 2 I 2
−G + 2I 2
Rdeg G Z Sin ( jω o )
2
m1 2 I d2in
F = 1+ 2
+
4kTRS G m 4kTRS Gm21

] The calculations yield the following percentage

contributions from the components:

LC Tank: 44.5%, -G: 38%, Input Gm: 13.5%, Rdeg: 2.7%

] Increasing Gm reduces the contribution of -G and the LC

tank
10
 Nonlinearity Analysis

] There are three main nonlinearity contributors:

\ the negative conductance generator

\ the varactor
\ the input Gm stage

] The analyses consider each contributor separately!

] Isolating each contributor allows us to identify the

design trade-offs involved.

11
 Nonlinearity Analysis (contd.)

Contribution of the Negative Conductance Generator

Vin GmVin Vout L Gloss C G=f( Vout )

•The nonlinear behavior of the Negative Conductance is isolated first.

•We use the method proposed by Wambacq/Sansen in “Distortion Analysis of

Analog Integrated Circuits”.

12
 Noise-linearity, Q-selectivity-
linearity trade-offs !
] The 1dB compression point is approximated as:

2.32 × g m5 ⎛ 1 ⎞
V1dB ≅ ⎜⎜ 2 3 3 3 ⎟⎟
⎛ 2 K 2θ 5 g m5 ⎞ ⎝ GmQ ω o L ⎠
⎜⎜ 2 K 2 + ⎟⎟
⎝ 1 + θ 5 (VGS 5 − VT 5 ) ⎠

μ oCOX ⎛ W5 ⎞⎛⎜ 1 ⎞
⎟
K2 ≅ ⎜⎜ ⎟⎟
⎜ ⎟
⎝ L5 ⎠⎝ (1 + θ (VGS 5 − VT 5 )) ⎠
3
2

] The effective bias of the negative conductance should be maximized

] With a higher Qo, a lower gm5 is required: higher eff. bias with given Iss.
] The higher the peak gain, GmQωoL, the worse the linearity.

13
 Nonlinearity Contribution of the
Varactor

1
+ Gloss + j 2ω o (C + CVo )
1.55 j 2ω o L
V1dB ≅ ×
GmQ ω o L
( )
2 3 3 3
K 3C
− V
− jω o 2 K 3C Gloss + 4ω o2 (C + CVo ) K 3C − 2 K 22C
L V V V

] Higher peak voltage gain, GmQωoL, degrades linearity

] Trade-offs between noise-linearity and selectivity-
linearity!

14
 Nonlinearity Contribution of the
Input Gm stage

Gm2 1 (1 + Gm1 Rdeg ) 3

V1dB ≅ 2.32 ×
⎛ 2 K 2Gm1θ1Gm1 ⎞
⎜ 2 K 2G + ⎟
⎜ m1
1 + θ (V − V ) ⎟
⎝ 1 GS 1 T 1 ⎠

] The effective bias of the transistors should be maximized!

] Increasing Rdeg improves the linearity with a penalty in power
consumption for the same input Gm.
] The same applies to adding Rdeg to the cross-coupled pair
linearity-power trade-off

15
Simulated DR vs. Q of the
Resonator Inductor

(Vdd=1.3V, Qfilter=40, fo=2.29GHz)

P1dB
DR = ⋅ Q 2

4kT ( F + 1) BQ 2
o

16
Dynamic Range Simulations

17
Integrated Circuit Measurements
] TSMC 0.35μm CMOS
technology

] The second poly was not used.

Compatibility with a standard
Digital CMOS

] The filter operates with a

supply voltage of 1.3V, and
4mA for a Q= 40 at 2.19GHz

] Chip area+buffers~ 0.1mm2.

18
 Measured Q-Tuning

30MHz
More than 3
octaves at 5dB/div
fo=2.16GHz
Q~170

Q~20
19
 Measured Frequency Tuning

13% around
2.1GHz with
Q~100
1.93GHz 2.19GHz

20
 Measured Peak Gain Tuning

Around Providing gain at

2 octaves with the ωο of an
fo=2.12GHz image-reject filter
and Q=40 is useful in a
receiver front-end
after the LNA, to
relax the NF spec
of the mixer.

21
 Overlaid Measurements
of 10 different ICs
(a) (b)
with the same bias settings programmed for the same fo, gain and Q=40

Q : 20-80

fo : 2.14-2.18GHz

22
 Two-tone IM3 Measurement
*Vdd=1.3V, fo=2.19GHz, Q=40

Pin= -38dBm Pin,1dB= -30dBm

fin1=2.185GHz IIP3=-17.5dBm
fin2=2.195GHz

23
1 dB Compression Comparison
*Vdd=1.5V, fo=2.17GHz

simulation

measurement

24
A Comparison with State-of-the-
art

Reference Tech. fo Bandwidth Vdd PD/Pole Area/Pole SFDR

[1] Bipolar 1.8GHz 51.4MHz 2.8V 12.2mW 0.2mm2 30dB

[3] Bipolar 1GHz 25MHz 5V 34mW 0.3 mm2 36dB

[4] BiCMOS 750MHz 37.5MHz 5V 40mW 0.3 mm2 25dB

[5] BiCMOS 1.9GHz 150MHz 2.7V 12.15mW 1.79 mm2 49dB

25
A Comparison with State-of-the-
art (contd.)

Reference Tech. fo Bandwidth Vdd PD/Pole Area/Pole SFDR

[2] CMOS 850MHz 18MHz 2.7V 52mW 0.5mm2 55dB

[6] CMOS 850MHz 28.3MHz 2V 22.9mW 0.32mm2 28dB

[7] CMOS 2.14GHz 60MHz 2.5V 2.9mW 0.59mm2 55dB

This CMOS 2.19GHz 53.8MHz 1.3V 2.6mW 0.05mm2 31dB

work

26
 Remarks
• Low voltage, low power, compact fully-integrated
programmable bandpass filter in mainstream CMOS at
frequencies higher than 2GHz.

¾ Comparison shows that the proposed RF filter uses the lowest

power supply voltage, lowest power consumption per pole and
occupies at least four times less silicon area per pole

¾ Programmability in the peak gain

¾ Noise and Nonlinearity analyses of the structure provide

simplified approximate expressions to clarify design trade-offs

Reference:
• Fikret Dulger, E. Sanchez-Sinencio, J. Silva-Martinez,
"A 1.3-V 5-mW fully integrated tunable bandpass filter at 2.1 GHz in 0.35 um CMOS,"

IEEE Journal of Solid-State Circuits, Volume :38 Issue:6, June 2003, Page(s): 918- 928
• F. Dulger and E. Sanchez-Sinencio, "Integrated RF Building Blocks for Wireless Communication"

book, details will follow later. 27